fsplmod2e2.mdl

使用ppt对扩频通信的原理进行详细介绍,然后对其原理利用matlab7.0版本软件进行simulink仿真框图设计

      PMode		      "Port"
      WsName		      "ErrorVec"
      RsMode2		      off
      stop		      off
      numErr		      "100"
      maxBits		      "1e6"
    }
    Block {
      BlockType		      Reference
      Name		      "M-DPSK\nDemodulator\nPassband"
      Ports		      [1, 1]
      Position		      [830, 284, 955, 386]
      Orientation	      "left"
      SourceBlock	      "commdigpbndpm2/M-DPSK\nDemodulator\nPassband"
      SourceType	      "M-DPSK Demodulator Passband"
      M			      "2"
      OutType		      "Bit"
      Dec		      "Binary"
      td		      "5e-4"
      numSamp		      "4"
      Fc		      "2e4"
      Ph		      "0"
      InSamp		      "1e-6"
    }
    Block {
      BlockType		      Reference
      Name		      "M-DPSK\nModulator\nPassband"
      Ports		      [1, 1]
      Position		      [855, 59, 955, 141]
      SourceBlock	      "commdigpbndpm2/M-DPSK\nModulator\nPassband"
      SourceType	      "M-DPSK Modulator Passband"
      M			      "2"
      InType		      "Bit"
      Enc		      "Binary"
      td		      "5e-4"
      numSamp		      "4"
      Fc		      "2e4"
      Ph		      "0"
      OutSamp		      "1e-6"
    }
    Block {
      BlockType		      Reference
      Name		      "Rebuffer"
      Ports		      [1, 1]
      Position		      [700, 62, 780, 138]
      SourceBlock	      "dspbuff2/Rebuffer"
      SourceType	      "Rebuffer"
      Specify_Out_Size	      on
      N			      "1"
      V			      "0"
      ic		      "0"
      frame		      on
      num_chans		      "1"
    }
    Block {
      BlockType		      Reference
      Name		      "Rebuffer1"
      Ports		      [1, 1]
      Position		      [675, 285, 755, 385]
      Orientation	      "left"
      SourceBlock	      "dspbuff2/Rebuffer"
      SourceType	      "Rebuffer"
      Specify_Out_Size	      on
      N			      "2"
      V			      "0"
      ic		      "0"
      frame		      on
      num_chans		      "1"
    }
    Block {
      BlockType		      SubSystem
      Name		      "Subsystem1"
      Ports		      [0, 2]
      Position		      [75, 53, 180, 142]
      TreatAsAtomicUnit	      off
      System {
	Name			"Subsystem1"
	Location		[368, 258, 1140, 686]
	Open			on
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"A4"
	PaperUnits		"centimeters"
	ZoomFactor		"100"
	Block {
	  BlockType		  DiscretePulseGenerator
	  Name			  "Pulse\nGenerator"
	  Position		  [80, 81, 180, 129]
	  SampleTime		  "1e-3"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Triggered Signal\nFrom Workspace"
	  Ports			  [0, 1, 0, 1]
	  Position		  [315, 92, 505, 168]
	  SourceBlock		  "dspsrcs4/Triggered Signal\nFrom Workspace"
	  SourceType		  "Triggered Signal From Workspace"
	  Signal		  "[1 1 1 0 1 1 0 0 1 0 1 0 0 0 0]"
	  TriggerType		  "Rising edge"
	  ic			  "0"
	  SamplesPerFrame	  "1"
	  OutputAfterFinalValue	  "Setting to zero"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Triggered Signal\nFrom Workspace1"
	  Ports			  [0, 1, 0, 1]
	  Position		  [150, 216, 290, 314]
	  SourceBlock		  "dspsrcs4/Triggered Signal\nFrom Workspace"
	  SourceType		  "Triggered Signal From Workspace"
	  Signal		  "[zeros(1,30) ones(1,30)]'"
	  TriggerType		  "Either edge"
	  ic			  "0"
	  SamplesPerFrame	  "1"
	  OutputAfterFinalValue	  "Setting to zero"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Triggered Signal\nFrom Workspace2"
	  Ports			  [0, 1, 0, 1]
	  Position		  [415, 226, 570, 314]
	  SourceBlock		  "dspsrcs4/Triggered Signal\nFrom Workspace"
	  SourceType		  "Triggered Signal From Workspace"
	  Signal		  "[randint(1,30000)]"
	  TriggerType		  "Either edge"
	  ic			  "0"
	  SamplesPerFrame	  "1"
	  OutputAfterFinalValue	  "Setting to zero"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out"
	  Position		  [605, 128, 635, 142]
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out1"
	  Position		  [615, 248, 645, 262]
	  Port			  "2"
	}
	Line {
	  SrcBlock		  "Triggered Signal\nFrom Workspace"
	  SrcPort		  1
	  Points		  [0, 5]
	  DstBlock		  "Out"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Triggered Signal\nFrom Workspace2"
	  SrcPort		  1
	  Points		  [0, -15]
	  DstBlock		  "Out1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Pulse\nGenerator"
	  SrcPort		  1
	  Points		  [35, 0]
	  Branch {
	    Points		    [0, -25; 190, 0]
	    DstBlock		    "Triggered Signal\nFrom Workspace"
	    DstPort		    trigger
	  }
	  Branch {
	    Points		    [0, 52]
	    DstBlock		    "Triggered Signal\nFrom Workspace1"
	    DstPort		    trigger
	  }
	}
	Line {
	  SrcBlock		  "Triggered Signal\nFrom Workspace1"
	  SrcPort		  1
	  Points		  [0, -55; 195, 0]
	  DstBlock		  "Triggered Signal\nFrom Workspace2"
	  DstPort		  trigger
	}
      }
    }
    Block {
      BlockType		      Reference
      Name		      "Viterbi Decoder"
      Ports		      [1, 1]
      Position		      [485, 280, 640, 390]
      Orientation	      "left"
      SourceBlock	      "commcnvcod2/Viterbi Decoder"
      SourceType	      "Viterbi Decoder"
      trellis		      "poly2trellis(9, [753 561])"
      dectype		      "Unquantized"
      nsdecb		      "4"
      tbdepth		      "102"
      opmode		      "Continuous"
      reset		      off
    }
    Block {
      BlockType		      Logic
      Name		      "XOR\nExclusive OR"
      Ports		      [2, 1]
      Position		      [370, 52, 430, 143]
      Operator		      "XOR"
      ShowAdditionalParam     on
      AllPortsSameDT	      off
      OutDataTypeMode	      "Specify via dialog"
    }
    Block {
      BlockType		      Logic
      Name		      "XOR\nExclusive OR1"
      Ports		      [2, 1]
      Position		      [370, 226, 430, 304]
      Operator		      "XOR"
      ShowAdditionalParam     on
      AllPortsSameDT	      off
      OutDataTypeMode	      "Specify via dialog"
    }
    Line {
      SrcBlock		      "Subsystem1"
      SrcPort		      2
      Points		      [60, 0]
      Branch {
	DstBlock		"XOR\nExclusive OR"
	DstPort			2
      }
      Branch {
	Points			[0, 335]
	DstBlock		"Error Rate\nCalculation"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "XOR\nExclusive OR"
      SrcPort		      1
      DstBlock		      "Convolutional\nEncoder"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Convolutional\nEncoder"
      SrcPort		      1
      DstBlock		      "Rebuffer"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Rebuffer"
      SrcPort		      1
      DstBlock		      "M-DPSK\nModulator\nPassband"
      DstPort		      1
    }
    Line {
      SrcBlock		      "M-DPSK\nModulator\nPassband"
      SrcPort		      1
      Points		      [60, 0]
      DstBlock		      "AWGN\nChannel"
      DstPort		      1
    }
    Line {
      SrcBlock		      "M-DPSK\nDemodulator\nPassband"
      SrcPort		      1
      DstBlock		      "Rebuffer1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "AWGN\nChannel"
      SrcPort		      1
      Points		      [0, 35]
      DstBlock		      "M-DPSK\nDemodulator\nPassband"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Rebuffer1"
      SrcPort		      1
      DstBlock		      "Viterbi Decoder"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Delay"
      SrcPort		      1
      DstBlock		      "XOR\nExclusive OR1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "XOR\nExclusive OR1"
      SrcPort		      1
      Points		      [5, 0; 0, 235]
      DstBlock		      "Error Rate\nCalculation"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Error Rate\nCalculation"
      SrcPort		      1
      DstBlock		      "Display"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Subsystem1"
      SrcPort		      1
      Points		      [75, 0]
      Branch {
	DstBlock		"XOR\nExclusive OR"
	DstPort			1
      }
      Branch {
	DstBlock		"Delay"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Viterbi Decoder"
      SrcPort		      1
      Points		      [-130, 0; 0, -50]
      DstBlock		      "XOR\nExclusive OR1"
      DstPort		      2
    }
  }
}