📄 gold6a.mdl
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Model {
Name "gold6a"
Version 5.1
SaveDefaultBlockParams on
SampleTimeColors off
LibraryLinkDisplay "none"
WideLines off
ShowLineDimensions off
ShowPortDataTypes off
ShowLoopsOnError on
IgnoreBidirectionalLines off
ShowStorageClass off
SortedOrder off
RecordCoverage off
CovPath "/"
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
covSaveCumulativeToWorkspaceVar on
CovSaveSingleToWorkspaceVar on
CovCumulativeVarName "covCumulativeData"
CovCumulativeReport off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
MinMaxOverflowArchiveMode "Overwrite"
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
Created "Mon Apr 16 16:17:32 2007"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "Administrator"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Mon Apr 16 16:30:10 2007"
ModelVersionFormat "1.%<AutoIncrement:1>"
ConfigurationManager "None"
SimParamPage "Solver"
LinearizationMsg "none"
Profile off
ParamWorkspaceSource "MATLABWorkspace"
AccelSystemTargetFile "accel.tlc"
AccelTemplateMakefile "accel_default_tmf"
AccelMakeCommand "make_rtw"
TryForcingSFcnDF off
ExtModeMexFile "ext_comm"
ExtModeBatchMode off
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
BufferReuse on
RTWExpressionDepthLimit 5
SimulationMode "normal"
Solver "ode45"
SolverMode "Auto"
StartTime "0.0"
StopTime "10.0"
MaxOrder 5
MaxStep "auto"
MinStep "auto"
MaxNumMinSteps "-1"
InitialStep "auto"
FixedStep "auto"
RelTol "1e-3"
AbsTol "auto"
OutputOption "RefineOutputTimes"
OutputTimes "[]"
Refine "1"
LoadExternalInput off
ExternalInput "[t, u]"
LoadInitialState off
InitialState "xInitial"
SaveTime on
TimeSaveName "tout"
SaveState off
StateSaveName "xout"
SaveOutput on
OutputSaveName "yout"
SaveFinalState off
FinalStateName "xFinal"
SaveFormat "Array"
Decimation "1"
LimitDataPoints on
MaxDataPoints "1000"
SignalLoggingName "sigsOut"
ConsistencyChecking "none"
ArrayBoundsChecking "none"
AlgebraicLoopMsg "warning"
BlockPriorityViolationMsg "warning"
MinStepSizeMsg "warning"
InheritedTsInSrcMsg "warning"
DiscreteInheritContinuousMsg "warning"
MultiTaskRateTransMsg "error"
SingleTaskRateTransMsg "none"
CheckForMatrixSingularity "none"
IntegerOverflowMsg "warning"
Int32ToFloatConvMsg "warning"
ParameterDowncastMsg "error"
ParameterOverflowMsg "error"
ParameterPrecisionLossMsg "warning"
UnderSpecifiedDataTypeMsg "none"
UnnecessaryDatatypeConvMsg "none"
VectorMatrixConversionMsg "none"
InvalidFcnCallConnMsg "error"
SignalLabelMismatchMsg "none"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
SfunCompatibilityCheckMsg "none"
RTWInlineParameters off
BlockReductionOpt on
BooleanDataType on
ConditionallyExecuteInputs on
ParameterPooling on
OptimizeBlockIOStorage on
ZeroCross on
AssertionControl "UseLocalSettings"
ProdHWDeviceType "Microprocessor"
ProdHWWordLengths "8,16,32,32"
RTWSystemTargetFile "grt.tlc"
RTWTemplateMakefile "grt_default_tmf"
RTWMakeCommand "make_rtw"
RTWGenerateCodeOnly off
RTWRetainRTWFile off
TLCProfiler off
TLCDebug off
TLCCoverage off
TLCAssertion off
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
BlockParameterDefaults {
Block {
BlockType Logic
Operator "AND"
Inputs "2"
ShowAdditionalParam off
AllPortsSameDT on
OutDataTypeMode "Logical (see Advanced Sim. Parameters)"
LogicDataType "uint(8)"
}
Block {
BlockType ToWorkspace
VariableName "simulink_output"
MaxDataPoints "1000"
Decimation "1"
}
Block {
BlockType UnitDelay
X0 "0"
RTWStateStorageClass "Auto"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "gold6a"
Location [539, 94, 1237, 748]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType ToWorkspace
Name "To Workspace"
Position [585, 410, 645, 440]
VariableName "simout"
MaxDataPoints "inf"
SampleTime "-1"
SaveFormat "Structure"
}
Block {
BlockType UnitDelay
Name "Unit Delay"
Position [195, 235, 230, 275]
FontSize 10
}
Block {
BlockType UnitDelay
Name "Unit Delay1"
Position [295, 450, 330, 490]
FontSize 10
}
Block {
BlockType UnitDelay
Name "Unit Delay10"
Position [435, 450, 470, 490]
FontSize 10
}
Block {
BlockType UnitDelay
Name "Unit Delay11"
Position [360, 450, 395, 490]
FontSize 10
}
Block {
BlockType UnitDelay
Name "Unit Delay2"
Position [230, 450, 265, 490]
FontSize 10
}
Block {
BlockType UnitDelay
Name "Unit Delay3"
Position [415, 235, 450, 275]
FontSize 10
}
Block {
BlockType UnitDelay
Name "Unit Delay4"
Position [340, 235, 375, 275]
FontSize 10
}
Block {
BlockType UnitDelay
Name "Unit Delay5"
Position [265, 235, 300, 275]
FontSize 10
}
Block {
BlockType UnitDelay
Name "Unit Delay6"
Position [165, 450, 200, 490]
FontSize 10
}
Block {
BlockType UnitDelay
Name "Unit Delay7"
Position [130, 235, 165, 275]
FontSize 10
}
Block {
BlockType UnitDelay
Name "Unit Delay8"
Position [95, 450, 130, 490]
FontSize 10
}
Block {
BlockType UnitDelay
Name "Unit Delay9"
Position [475, 235, 510, 275]
FontSize 10
}
Block {
BlockType Logic
Name "XOR\nExclusive OR"
Ports [2, 1]
Position [55, 235, 95, 275]
FontSize 10
Operator "XOR"
ShowAdditionalParam on
AllPortsSameDT off
OutDataTypeMode "Specify via dialog"
}
Block {
BlockType Logic
Name "XOR\nExclusive OR1"
Ports [4, 1]
Position [30, 450, 70, 490]
FontSize 10
Operator "XOR"
Inputs "4"
ShowAdditionalParam on
AllPortsSameDT off
OutDataTypeMode "Specify via dialog"
}
Block {
BlockType Logic
Name "XOR\nExclusive OR2"
Ports [2, 1]
Position [560, 245, 600, 285]
FontSize 10
Operator "XOR"
ShowAdditionalParam on
AllPortsSameDT off
OutDataTypeMode "Specify via dialog"
}
Line {
SrcBlock "Unit Delay7"
SrcPort 1
DstBlock "Unit Delay"
DstPort 1
}
Line {
SrcBlock "Unit Delay"
SrcPort 1
DstBlock "Unit Delay5"
DstPort 1
}
Line {
SrcBlock "Unit Delay5"
SrcPort 1
DstBlock "Unit Delay4"
DstPort 1
}
Line {
SrcBlock "Unit Delay4"
SrcPort 1
DstBlock "Unit Delay3"
DstPort 1
}
Line {
SrcBlock "Unit Delay3"
SrcPort 1
DstBlock "Unit Delay9"
DstPort 1
}
Line {
SrcBlock "XOR\nExclusive OR"
SrcPort 1
Points [5, 0]
Branch {
DstBlock "Unit Delay7"
DstPort 1
}
Branch {
Points [0, 50; -65, 0]
DstBlock "XOR\nExclusive OR"
DstPort 2
}
}
Line {
SrcBlock "Unit Delay9"
SrcPort 1
Points [10, 0]
Branch {
DstBlock "XOR\nExclusive OR2"
DstPort 1
}
Branch {
Points [0, -65; -485, 0]
DstBlock "XOR\nExclusive OR"
DstPort 1
}
}
Line {
SrcBlock "Unit Delay8"
SrcPort 1
Points [5, 0]
Branch {
DstBlock "Unit Delay6"
DstPort 1
}
Branch {
Points [0, 40; -125, 0]
DstBlock "XOR\nExclusive OR1"
DstPort 4
}
}
Line {
SrcBlock "Unit Delay6"
SrcPort 1
Points [10, 0]
Branch {
DstBlock "Unit Delay2"
DstPort 1
}
Branch {
Points [0, 50; -210, 0; 0, -45]
DstBlock "XOR\nExclusive OR1"
DstPort 3
}
}
Line {
SrcBlock "Unit Delay2"
SrcPort 1
DstBlock "Unit Delay1"
DstPort 1
}
Line {
SrcBlock "Unit Delay1"
SrcPort 1
DstBlock "Unit Delay11"
DstPort 1
}
Line {
SrcBlock "Unit Delay11"
SrcPort 1
Points [10, 0]
Branch {
DstBlock "Unit Delay10"
DstPort 1
}
Branch {
Points [0, -55; -395, 0]
DstBlock "XOR\nExclusive OR1"
DstPort 1
}
}
Line {
SrcBlock "XOR\nExclusive OR1"
SrcPort 1
DstBlock "Unit Delay8"
DstPort 1
}
Line {
SrcBlock "Unit Delay10"
SrcPort 1
Points [65, 0; 0, -95]
Branch {
Points [0, -100]
DstBlock "XOR\nExclusive OR2"
DstPort 2
}
Branch {
Points [-535, 0; 0, 90]
DstBlock "XOR\nExclusive OR1"
DstPort 2
}
}
Line {
SrcBlock "XOR\nExclusive OR2"
SrcPort 1
Points [0, 120; -35, 0]
DstBlock "To Workspace"
DstPort 1
}
}
}
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