binutils-2.16.1.patch.svn-base

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+			|| offset_expr.X_add_number < -0x8000))
+		  break;
+
+		s = expr_end;
+		continue;
+
+	      case 's':		/* VFPU source register */
+	      case 't':		/* VFPU target register */
+	      case 'd':		/* VFPU destination register */
+	      case 'v':		/* VFPU destination register */
+	      case 'x':		/* VFPU destination register */
+	      case 'm':		/* VFPU target regsiter (load/store) */
+	      case 'n':		/* VFPU target regsiter (load/store) */
+		{
+		  int dtype_err = 0;
+		  int dnum_err = 0;
+		  int dlen = 0;
+		  char dtype = s[0];
+		  char regtype = *(args + 1);
+
+		  int mtx = 0;
+		  int idx = 0;
+		  int rxc = 0;
+		  int fsl = 0;
+		  int vidx = 0;
+		  int vfsl = 0;
+
+		  if (ISDIGIT (s[1]))
+		    {
+		      int num = 0;
+		      s++;
+		      do
+			{
+			  num *= 10;
+			  num += *s - '0';
+			  dlen++;
+			  s++;
+			}
+		      while (ISDIGIT (*s));
+
+		      if ((s[0] == '.')
+			  && (s[1] == 's' || s[1] == 'p'
+			      || s[1] == 't' || s[1] == 'q'))
+			s += 2;
+
+		      if (ISUPPER(dtype))
+			dtype -= 'A' - 'a';
+
+		      if (dtype == '$')
+			{
+			  regno = num;
+			  if (regno > VF_MAX_MR)
+			    as_bad (_("Invalid VFPU register number (%d)"),
+				    regno);
+
+			  idx = (num >> VF_SH_MR_IDX) & VF_MASK_MR_IDX;
+			  vfsl = (num >> VF_SH_MR_VFSL) & VF_MASK_MR_VFSL;
+			  switch (regtype)
+			    {
+			    case '0':	/* single word */
+			      break;
+			    case '1':	/* pare word */
+			      dnum_err = (vfsl & 0x1);
+			      break;
+			    case '2':	/* triple word */
+			      dnum_err = (vfsl > 1);
+			      break;
+			    case '3':	/* quad word */
+			      dnum_err = (vfsl > 0);
+			      break;
+			    case '5':	/* 2x2 word */
+			      dnum_err = (vfsl & 0x1) || (idx & 0x1);
+			      break;
+			    case '6':	/* 3x3 word */
+			      dnum_err = (vfsl > 1) || (idx > 1);
+			      break;
+			    case '7':	/* 4x4 word */
+			      dnum_err = (vfsl > 0) || (idx > 0);
+			      break;
+			    }
+
+			  if (dnum_err)
+			    as_bad (_("Improper VFPU register number (%d)"),
+				     regno);
+
+			}
+		      else if ((dlen == 3)
+			       && ((dtype == 's')
+				   || (dtype == 'c') || (dtype == 'r')
+				   || (dtype == 'm') || (dtype == 'e')))
+			{
+			  mtx = num / 100;
+			  if ((dtype == 'r') || (dtype == 'e'))
+			    {
+			      vfsl = (num / 10) % 10;
+			      vidx = num % 10;
+			      rxc = 1;
+			    }
+			  else
+			    {
+			      vidx = (num / 10) % 10;
+			      vfsl = num % 10;
+			      rxc = 0;
+			    }
+
+			  switch (regtype)
+			    {
+			    case '0':	/* single word */
+			      idx = vidx;
+			      fsl = vfsl;
+			      dtype_err = (dtype != 's');
+			      break;
+			    case '1':	/* pare word */
+			      idx = vidx;
+			      fsl = (vfsl & 0x2) | rxc;
+			      dnum_err = (vfsl & 0x1);
+			      dtype_err = (dtype != 'c') && (dtype != 'r');
+			      break;
+			    case '2':	/* triple word */
+			      idx = vidx;
+			      fsl = ((vfsl & 0x1) << 1) | rxc;
+			      dnum_err = (vfsl > 1);
+			      dtype_err = (dtype != 'c') && (dtype != 'r');
+			      break;
+			    case '3':	/* quad word */
+			      idx = vidx;
+			      fsl = rxc;
+			      dnum_err = (vfsl > 0);
+			      dtype_err = (dtype != 'c') && (dtype != 'r');
+			      break;
+			    case '5':	/* 2x2 word */
+			      idx = vidx & 0x2;
+			      fsl = (vfsl & 0x2) | rxc;
+			      dnum_err = (vfsl & 0x1) || (vidx & 0x1);
+			      dtype_err = (dtype != 'm') && (dtype != 'e');
+			      break;
+			    case '6':	/* 3x3 word */
+			      idx = vidx & 0x1;
+			      fsl = ((vfsl & 0x1) << 1) | rxc;
+			      dnum_err = (vfsl > 1) || (vidx > 1);
+			      dtype_err = (dtype != 'm') && (dtype != 'e');
+			      break;
+			    case '7':	/* 4x4 word */
+			      idx = 0;
+			      fsl = rxc;
+			      dnum_err = (vfsl > 0) || (vidx > 0);
+			      dtype_err = (dtype != 'm') && (dtype != 'e');
+			      break;
+			    }
+
+			  if (dtype_err)
+			    as_bad (_("Improper VFPU register prefix '%c'"),
+				     dtype);
+			  if (dnum_err)
+			    as_bad (_("Improper VFPU register number (%03d)"),
+				     num);
+
+			  if (mtx > VF_MAX_MR_MTX)
+			    as_bad (_("VFPU matrix range over %d"), mtx);
+			  if (vidx > VF_MAX_MR_IDX)
+			    as_bad (_("VFPU index range over %d"), idx);
+			  if (vfsl > VF_MAX_MR_FSL)
+			    as_bad (_("VFPU field select range over %d"), fsl);
+	      
+			  regno = ((fsl & VF_MASK_MR_FSL) << VF_SH_MR_FSL)
+				| ((mtx & VF_MASK_MR_MTX) << VF_SH_MR_MTX)
+				| ((idx & VF_MASK_MR_IDX) << VF_SH_MR_IDX);
+			}
+		      else
+			{
+			    as_bad (_("Improper VFPU register prefix '%c'"),
+				     dtype);
+			}
+		    }
+		  else
+		    {
+		      as_bad (_("bad operand %s"), s);
+		    }
+
+		  if ((*args == 'v') || (*args == 'x'))
+		    {
+		      vdregno = regno;
+		      vdregt = regtype;
+		      vdregl = (*args == 'v');
+		    }
+		  else if (vdregno <= VF_MAX_MR)
+		    {
+		      static unsigned short used_vreg[8][16] = {
+			{ 0x0001, 0x0010, 0x0100, 0x1000,
+			  0x0002, 0x0020, 0x0200, 0x2000,
+			  0x0004, 0x0040, 0x0400, 0x4000,
+			  0x0008, 0x0080, 0x0800, 0x8000 },
+			{ 0x0003, 0x0030, 0x0300, 0x3000,
+			  0x0011, 0x0022, 0x0044, 0x0088,
+			  0x000c, 0x00c0, 0x0c00, 0xc000,
+			  0x1100, 0x2200, 0x4400, 0x8800 },
+			{ 0x0007, 0x0070, 0x0700, 0x7000,
+			  0x0111, 0x0222, 0x0444, 0x0888,
+			  0x000e, 0x00e0, 0x0e00, 0xe000,
+			  0x1110, 0x2220, 0x4440, 0x8880 },
+			{ 0x000f, 0x00f0, 0x0f00, 0xf000,
+			  0x1111, 0x2222, 0x4444, 0x8888,
+			  0x000f, 0x00f0, 0x0f00, 0xf000,
+			  0x1111, 0x2222, 0x4444, 0x8888 },
+			{ 0x0000, 0x0000, 0x0000, 0x0000,
+			  0x0000, 0x0000, 0x0000, 0x0000,
+			  0x0000, 0x0000, 0x0000, 0x0000,
+			  0x0000, 0x0000, 0x0000, 0x0000 },
+			{ 0x0033, 0x0033, 0x3300, 0x3300,
+			  0x0033, 0x0033, 0x00cc, 0x00cc,
+			  0x00cc, 0x00cc, 0xcc00, 0xcc00,
+			  0x3300, 0x3300, 0xcc00, 0xcc00 },
+			{ 0x0777, 0x7770, 0x0777, 0x7770,
+			  0x0777, 0x0eee, 0x0777, 0x0eee,
+			  0x0eee, 0xeee0, 0x0eee, 0xeee0,
+			  0x7770, 0xeee0, 0x7770, 0xeee0 },
+			{ 0xffff, 0xffff, 0xffff, 0xffff,
+			  0xffff, 0xffff, 0xffff, 0xffff,
+     			  0xffff, 0xffff, 0xffff, 0xffff,
+			  0xffff, 0xffff, 0xffff, 0xffff },
+		      };
+		      int dmtx, smtx;
+		      int dfsl, sfsl;
+		      int didx, sidx;
+		      int drxc, srxc;
+
+		      dmtx = (vdregno >> VF_SH_MR_MTX) & VF_MASK_MR_MTX;
+		      smtx = (regno   >> VF_SH_MR_MTX) & VF_MASK_MR_MTX;
+
+		      if (dmtx == smtx)
+			{
+			  unsigned short dused, sused;
+			  int dtype, stype;
+
+			  dfsl = (vdregno >> VF_SH_MR_FSL) & VF_MASK_MR_FSL;
+			  didx = (vdregno >> VF_SH_MR_IDX) & VF_MASK_MR_IDX;
+			  drxc = (vdregno >> VF_SH_MR_RXC) & VF_MASK_MR_RXC;
+			  sfsl = (regno   >> VF_SH_MR_FSL) & VF_MASK_MR_FSL;
+			  sidx = (regno   >> VF_SH_MR_IDX) & VF_MASK_MR_IDX;
+			  srxc = (regno   >> VF_SH_MR_RXC) & VF_MASK_MR_RXC;
+
+			  dtype = vdregt - '0';
+			  stype = regtype - '0';
+			  dused = used_vreg[dtype][(dfsl << 2) + didx];
+			  sused = used_vreg[stype][(sfsl << 2) + sidx];
+
+			  if ((dused & sused)
+			      && (vdregl || (dused ^ sused) || (drxc != srxc)))
+			    {
+			      int dvfsl;
+			      dvfsl = (vdregno >> VF_SH_MR_VFSL) & VF_MASK_MR_VFSL;
+			      switch (vdregt)
+				{
+				case '1':
+				  dvfsl <<= 1;
+				case '2':
+				case '3':
+				  if (drxc)
+				    as_bad (_("VFPU register conflict(R%d%d%d)"),
+					     dmtx, dvfsl, didx);
+				  else
+				    as_bad (_("VFPU register conflict(C%d%d%d)"),
+					     dmtx, didx, dvfsl);
+				  break;
+				case '5':
+				  dvfsl <<= 1;
+				case '6':
+				case '7':
+				  if (drxc)
+				    as_bad (_("VFPU register conflict(E%d%d%d)"),
+					     dmtx, dvfsl, didx);
+				  else
+				    as_bad (_("VFPU register conflict(M%d%d%d)"),
+					     dmtx, didx, dvfsl);
+				  break;
+				}
+			    }
+			}
+		    }
+
+		  switch (*args++)
+		    {
+		    case 's':
+		      if (
+			  (ip->insn_opcode
+			      & VFPU_MASK_RPT_MMUL) == VFPU_INST_RPT_MMUL)
+			{
+			  if (regno & (VF_MASK_MR_RXC << VF_SH_MR_RXC))
+			    regno &= ~(VF_MASK_MR_RXC << VF_SH_MR_RXC);
+			  else
+			    regno |= (VF_MASK_MR_RXC << VF_SH_MR_RXC);
+			}
+		      ip->insn_opcode |= (regno & VF_MASK_VS) << VF_SH_VS;
+		      break;
+		    case 't':
+		      ip->insn_opcode |= (regno & VF_MASK_VT) << VF_SH_VT;
+		      break;
+		    case 'd':
+		    case 'v':
+		    case 'x':
+		      ip->insn_opcode |= (regno & VF_MASK_VD) << VF_SH_VD;
+		      break;
+		    case 'm':
+		      {
+			int vmregL = (regno >> 0) & VF_MASK_VML;
+			int vmregH = (regno >> 5) & VF_MASK_VMH;
+			ip->insn_opcode |= (vmregL << VF_SH_VML)
+					| (vmregH << VF_SH_VMH);
+		      }
+		      break;
+		    case 'n':
+		      {
+			int vmregL = (regno >> 0) & VF_MASK_VNL;
+			int vmregH = (regno >> 5) & VF_MASK_VNH;
+			ip->insn_opcode |= (vmregL << VF_SH_VNL)
+					| (vmregH << VF_SH_VNH);
+		      }
+		      break;
+		    }
+		  args++;
+
+		  /* now check for vfpu prefixes if necessary */
+		  if (*s == '[')
+		    {
+		      char *prefix_out = NULL;
+		      bfd_boolean *prefix_bool = NULL;
+		      char *prefix_type = NULL;
+		      int num_args = 0;
+		      char *ob = ++s;
+		      bfd_boolean has_w = FALSE;
+		      bfd_boolean has_z = FALSE;
+		      bfd_boolean has_y = FALSE;
+		      bfd_boolean has_operator = FALSE;
+		      bfd_boolean has_saturater = FALSE;
+
+		      switch (*args)
+			{
+			case 'w':	/* only swizzle */
+			case 's':	/* source prefix */
+			  prefix_bool = &vfpu_sprefix;
+			  prefix_out = vfpu_sprefix_str;
+			  prefix_type = "source";
+			  break;
+			case 't':	/* target prefix */
+			  prefix_bool = &vfpu_tprefix;
+			  prefix_out = vfpu_tprefix_str;
+			  prefix_type = "target";
+			  break;
+			case 'm':	/* only write mask */
+			case 'd':	/* destination prefix */
+			  prefix_bool = &vfpu_dprefix;
+			  prefix_out = vfpu_dprefix_str;
+			  prefix_type = "destination";
+			  break;
+			case 'y':	/* inhibit */
+			  prefix_bool = NULL;
+			  prefix_type = "source";
+			  break;
+			case 'x':	/* inhibit */
+			  prefix_bool = NULL;
+			  prefix_type = "target";
+			  break;
+			case 'z':	/* inhibit */
+			  prefix_bool = NULL;
+			  prefix_type = "destination";
+			  break;
+			}
+
+		      for ( ; *s != '\0' && *s != ']'; s++)
+			{
+			  switch (*s)
+			    {
+			    case ',':
+			      /* count no. of params for syntax check */
+			      num_args++;
+			      break;
+			    case ' ':
+			    case '\t':
+			      break;
+			    case 'm':
+			    case 'M':
+			    case 'x':
+			    case 'X':
+			      break;
+			    case 'y':
+			    case 'Y':
+			      has_y = TRUE;
+			      break;
+			    case 'z':
+			    case 'Z':
+			      has_z = TRUE;
+			      break;
+			    case 'w':
+			    case 'W':
+			      has_w = TRUE;
+			      break;
+			    default:
+			      if (*args == 'w')
+				has_operator = TRUE;
+			      if (*args == 'm')
+				has_saturater = TRUE;
+			    }
+			}
+
+		      if (*s == ']')
+			{
+			  if (prefix_bool)
+			    {
+			      *prefix_bool = TRUE;
+			      strncpy (prefix_out, ob, s - ob);
+			      prefix_out[s - ob] = '\0';
+			      s++;
+			    }
+			  else
+			    {
+			      as_bad (_("%s cannot use %s prefix"),
+				      insn->name, prefix_type);
+			      s++;
+			      continue;
+			    }
+			}
+		      else
+			{
+			  as_bad (_("parse error (%s)"), ob - 1);
+			  return;
+			}
+
+		      if (num_args != regtype - '0')
+			{
+			  as_bad (_("%s prefix specification requires %d parameters - [%s]"),
+				  prefix_type, regtype - '0' + 1,
+				  prefix_out);
+			}
+		      else
+			{
+			  int i = 8 - ((3 - num_args) * 2);
+			  char dummy_d[] = " m,m,m,m";
+			  char dummy_st[] = " x,y,z,w";
+
+			  if (*args == 'd' || *args == 'm')
+			    {
+			      strcat (prefix_out, dummy_d + i);
+			      if (has_saturater)
+				{
+				  as_bad (_("%s is restricted to mask destination prefixes only"),
+					  insn->name);
+				}
+			    }
+			  else
+			    {
+			      strcat (prefix_out, dummy_st + i);
+			      if (has_operator)
+				{
+				  as_bad (_("%s is restricted to swizzle %s prefixes only"),
+					  insn->name, prefix_type);
+				}
+			      /* semantic check, w can't be specified for
+				 s, p, or t instructions same goes for
+				 z for p and s, and y for scalars */
+			      if ((has_y && num_args == 0)
+				  || (has_z && num_args < 2)
+				  || (has_w && num_args < 3))
+				{
+				  as_bad (_("%s swizzle operand is out of range in [%s]"),
+					  prefix_type, prefix_out);
+				}
+			    }
+			}
+		    }
+
+		  continue;