📄 binutils-2.16.1.patch.svn-base
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diff -burN binutils-2.16.1/bfd/archures.c binutils-psp/bfd/archures.c--- binutils-2.16.1/bfd/archures.c 2005-01-17 14:08:03.000000000 +0000+++ binutils-psp/bfd/archures.c 2006-05-09 02:55:36.000000000 +0100@@ -155,6 +155,7 @@ .#define bfd_mach_mips16 16 .#define bfd_mach_mips5 5 .#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01 *}+.#define bfd_mach_mips_allegrex 10111431 {* octal 'AL', 31 *} .#define bfd_mach_mipsisa32 32 .#define bfd_mach_mipsisa32r2 33 .#define bfd_mach_mipsisa64 64diff -burN binutils-2.16.1/bfd/bfd-in2.h binutils-psp/bfd/bfd-in2.h--- binutils-2.16.1/bfd/bfd-in2.h 2005-03-02 21:23:20.000000000 +0000+++ binutils-psp/bfd/bfd-in2.h 2006-05-09 02:55:36.000000000 +0100@@ -1600,6 +1600,7 @@ #define bfd_mach_mips16 16 #define bfd_mach_mips5 5 #define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */+#define bfd_mach_mips_allegrex 10111431 /* octal 'AL', 31 */ #define bfd_mach_mipsisa32 32 #define bfd_mach_mipsisa32r2 33 #define bfd_mach_mipsisa64 64diff -burN binutils-2.16.1/bfd/cpu-mips.c binutils-psp/bfd/cpu-mips.c--- binutils-2.16.1/bfd/cpu-mips.c 2005-03-03 11:40:58.000000000 +0000+++ binutils-psp/bfd/cpu-mips.c 2006-05-09 02:55:36.000000000 +0100@@ -86,6 +86,7 @@ I_mipsisa64, I_mipsisa64r2, I_sb1,+ I_allegrex, }; #define NN(index) (&arch_info_struct[(index) + 1])@@ -118,7 +119,8 @@ N (32, 32, bfd_mach_mipsisa32r2,"mips:isa32r2", FALSE, NN(I_mipsisa32r2)), N (64, 64, bfd_mach_mipsisa64, "mips:isa64", FALSE, NN(I_mipsisa64)), N (64, 64, bfd_mach_mipsisa64r2,"mips:isa64r2", FALSE, NN(I_mipsisa64r2)),- N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, 0),+ N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, NN(I_sb1)),+ N (32, 32, bfd_mach_mips_allegrex, "mips:allegrex", FALSE, 0), }; /* The default architecture is mips:3000, but with a machine number ofdiff -burN binutils-2.16.1/bfd/elfxx-mips.c binutils-psp/bfd/elfxx-mips.c--- binutils-2.16.1/bfd/elfxx-mips.c 2005-05-28 22:58:29.000000000 +0100+++ binutils-psp/bfd/elfxx-mips.c 2006-05-09 02:55:36.000000000 +0100@@ -4669,6 +4669,9 @@ case E_MIPS_MACH_SB1: return bfd_mach_mips_sb1; + case E_MIPS_MACH_ALLEGREX:+ return bfd_mach_mips_allegrex;+ default: switch (flags & EF_MIPS_ARCH) {@@ -7941,6 +7944,10 @@ val = E_MIPS_ARCH_64 | E_MIPS_MACH_SB1; break; + case bfd_mach_mips_allegrex:+ val = E_MIPS_ARCH_2 | E_MIPS_MACH_ALLEGREX;+ break;+ case bfd_mach_mipsisa32: val = E_MIPS_ARCH_32; break;@@ -8422,6 +8429,8 @@ if (dynobj != NULL && force_local && h->root.type != STT_TLS) { got = mips_elf_got_section (dynobj, FALSE);+ if (got)+ { g = mips_elf_section_data (got)->u.got_info; if (g->next)@@ -8472,6 +8481,7 @@ g->global_gotno--; } }+ } _bfd_elf_link_hash_hide_symbol (info, &h->root, force_local); }@@ -9641,6 +9651,7 @@ /* MIPS II extensions. */ { bfd_mach_mips4000, bfd_mach_mips6000 }, { bfd_mach_mipsisa32, bfd_mach_mips6000 },+ { bfd_mach_mips_allegrex, bfd_mach_mips6000 }, /* MIPS I extensions. */ { bfd_mach_mips6000, bfd_mach_mips3000 },diff -burN binutils-2.16.1/bfd/Makefile.am binutils-psp/bfd/Makefile.am--- binutils-2.16.1/bfd/Makefile.am 2005-06-12 19:58:52.000000000 +0100+++ binutils-psp/bfd/Makefile.am 2006-05-09 02:55:36.000000000 +0100@@ -3,7 +3,7 @@ AUTOMAKE_OPTIONS = 1.9 cygnus # Uncomment the following line when doing a release.-RELEASE=y+#RELEASE=y INCDIR = $(srcdir)/../include CSEARCH = -I. -I$(srcdir) -I$(INCDIR)diff -burN binutils-2.16.1/bfd/Makefile.in binutils-psp/bfd/Makefile.in--- binutils-2.16.1/bfd/Makefile.in 2005-06-12 19:58:55.000000000 +0100+++ binutils-psp/bfd/Makefile.in 2006-05-09 02:55:36.000000000 +0100@@ -250,7 +250,7 @@ AUTOMAKE_OPTIONS = 1.9 cygnus # Uncomment the following line when doing a release.-RELEASE=y+#RELEASE=y INCDIR = $(srcdir)/../include CSEARCH = -I. -I$(srcdir) -I$(INCDIR) MKDEP = gcc -MMdiff -burN binutils-2.16.1/bfd/version.h binutils-psp/bfd/version.h--- binutils-2.16.1/bfd/version.h 2005-06-12 18:37:59.000000000 +0100+++ binutils-psp/bfd/version.h 2006-05-09 02:55:36.000000000 +0100@@ -1,3 +1,3 @@-#define BFD_VERSION_DATE 20050612+#define BFD_VERSION_DATE (PSPDEV 20060116) #define BFD_VERSION @bfd_version@ #define BFD_VERSION_STRING @bfd_version_string@diff -burN binutils-2.16.1/binutils/readelf.c binutils-psp/binutils/readelf.c--- binutils-2.16.1/binutils/readelf.c 2005-04-20 19:43:36.000000000 +0100+++ binutils-psp/binutils/readelf.c 2006-05-09 02:55:36.000000000 +0100@@ -2043,6 +2043,7 @@ case E_MIPS_MACH_5500: strcat (buf, ", 5500"); break; case E_MIPS_MACH_SB1: strcat (buf, ", sb1"); break; case E_MIPS_MACH_9000: strcat (buf, ", 9000"); break;+ case E_MIPS_MACH_ALLEGREX: strcat (buf, ", allegrex"); break; case 0: /* We simply ignore the field in this case to avoid confusion: MIPS ELF does not specify EF_MIPS_MACH, it is a GNUdiff -burN binutils-2.16.1/config.sub binutils-psp/config.sub--- binutils-2.16.1/config.sub 2005-01-19 00:34:56.000000000 +0000+++ binutils-psp/config.sub 2006-05-09 02:55:36.000000000 +0100@@ -253,6 +253,7 @@ | mipsisa64sb1 | mipsisa64sb1el \ | mipsisa64sr71k | mipsisa64sr71kel \ | mipstx39 | mipstx39el \+ | mipsallegrex | mipsallegrexel \ | mn10200 | mn10300 \ | msp430 \ | ns16k | ns32k \@@ -326,6 +327,7 @@ | mipsisa64sb1-* | mipsisa64sb1el-* \ | mipsisa64sr71k-* | mipsisa64sr71kel-* \ | mipstx39-* | mipstx39el-* \+ | mipsallegrex-* | mipsallegrexel-* \ | mmix-* \ | msp430-* \ | none-* | np1-* | ns16k-* | ns32k-* \@@ -665,6 +667,10 @@ basic_machine=m68k-atari os=-mint ;;+ psp)+ basic_machine=mipsallegrexel-psp+ os=-elf+ ;; mips3*-*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'` ;;diff -burN binutils-2.16.1/configure binutils-psp/configure--- binutils-2.16.1/configure 2005-02-28 14:06:59.000000000 +0000+++ binutils-psp/configure 2006-05-09 02:55:10.000000000 +0100@@ -1034,7 +1034,7 @@ # Some tools are only suitable for building in a "native" situation. # Remove these if host!=target. -native_only="autoconf automake libtool fileutils find gawk gettext gzip hello indent m4 rcs recode sed shellutils tar textutils uudecode wdiff gprof target-groff guile perl time ash bash bzip2 prms gnuserv target-gperf"+native_only="autoconf automake libtool fileutils find gawk gettext gzip hello indent m4 rcs recode sed shellutils tar textutils uudecode wdiff target-groff guile perl time ash bash bzip2 prms gnuserv target-gperf" # Similarly, some are only suitable for cross toolchains. # Remove these if host=target.@@ -1516,7 +1516,7 @@ noconfigdirs="$noconfigdirs target-newlib target-libgloss" ;; mips*-*-*)- noconfigdirs="$noconfigdirs gprof ${libgcj}"+ noconfigdirs="$noconfigdirs ${libgcj}" ;; romp-*-*) noconfigdirs="$noconfigdirs bfd binutils ld gas opcodes target-libgloss ${libgcj}"diff -burN binutils-2.16.1/gas/config/tc-mips.c binutils-psp/gas/config/tc-mips.c--- binutils-2.16.1/gas/config/tc-mips.c 2005-06-12 19:07:03.000000000 +0100+++ binutils-psp/gas/config/tc-mips.c 2006-05-09 02:55:36.000000000 +0100@@ -92,6 +92,32 @@ #define ZERO 0 #define AT 1+#define V0 2+#define V1 3+#define A0 4+#define A1 5+#define A2 6+#define A3 7+#define T0 8+#define T1 9+#define T2 10+#define T3 11+#define T4 12+#define T5 13+#define T6 14+#define T7 15+#define S0 16+#define S1 17+#define S2 18+#define S3 19+#define S4 20+#define S5 21+#define S6 22+#define S7 23+#define T8 24+#define T9 25+#define K0 26+#define K1 27 #define TREG 24 #define PIC_CALL_REG 25 #define KT0 26@@ -365,11 +391,15 @@ #define CPU_HAS_MDMX(cpu) (FALSE \ ) +/* True if the given CPU belongs to the Allegrex family. */+#define CPU_IS_ALLEGREX(CPU) ((CPU) == CPU_ALLEGREX \+ )+ /* True if CPU has a dror instruction. */ #define CPU_HAS_DROR(CPU) ((CPU) == CPU_VR5400 || (CPU) == CPU_VR5500) /* True if CPU has a ror instruction. */-#define CPU_HAS_ROR(CPU) CPU_HAS_DROR (CPU)+#define CPU_HAS_ROR(CPU) CPU_HAS_DROR (CPU) || CPU_IS_ALLEGREX (CPU) /* True if mflo and mfhi can be immediately followed by instructions which write to the HI and LO registers.@@ -393,6 +423,7 @@ || mips_opts.arch == CPU_R12000 \ || mips_opts.arch == CPU_RM7000 \ || mips_opts.arch == CPU_VR5500 \+ || mips_opts.arch == CPU_ALLEGREX \ ) /* Whether the processor uses hardware interlocks to protect reads@@ -1142,6 +1173,8 @@ static expressionS imm_expr; static expressionS imm2_expr; static expressionS offset_expr;+static expressionS vimm_expr[4];+static expressionS voffset_expr[4]; /* Relocs associated with imm_expr and offset_expr. */ @@ -1150,6 +1183,15 @@ static bfd_reloc_code_real_type offset_reloc[3] = {BFD_RELOC_UNUSED, BFD_RELOC_UNUSED, BFD_RELOC_UNUSED}; +/* set by vfpu code for prefix instructions */++static bfd_boolean vfpu_dprefix;+static char vfpu_dprefix_str[64];+static bfd_boolean vfpu_sprefix;+static char vfpu_sprefix_str[64];+static bfd_boolean vfpu_tprefix;+static char vfpu_tprefix_str[64];+ /* These are set by mips16_ip if an explicit extension is used. */ static bfd_boolean mips16_small, mips16_ext;@@ -1641,6 +1683,62 @@ return; } + /* If we've generated operands for a VFPU prefix instruction then we need+ to assemble and append the prefix instruction before emitting the+ instruction it prefixes. Note that in mips_ip prefix operands do not+ cause any side effects with imm_expr or offset_expr. If they did+ we'd have to save and restore them here. */+ if (CPU_IS_ALLEGREX (mips_opts.arch) && ((vfpu_dprefix || vfpu_sprefix || vfpu_tprefix)))+ {++ if (mips_opts.noreorder+ && ( history[0].insn_mo->pinfo & (INSN_UNCOND_BRANCH_DELAY+ | INSN_COND_BRANCH_DELAY+ | INSN_COND_BRANCH_LIKELY)))+ {+ as_bad (_("instruction with prefix cannot be used in branch delay slot"));+ }++ if (vfpu_dprefix)+ {+ struct mips_cl_insn prefix;+ bfd_reloc_code_real_type unused_reloc[3]+ = {BFD_RELOC_UNUSED, BFD_RELOC_UNUSED, BFD_RELOC_UNUSED};+ char buf[256];++ sprintf (buf, "vpfxd %s", vfpu_dprefix_str);+ mips_ip (buf, &prefix);+ append_insn (&prefix, NULL, unused_reloc);+ vfpu_dprefix = FALSE;+ }++ if (vfpu_sprefix)+ {+ struct mips_cl_insn prefix;+ bfd_reloc_code_real_type unused_reloc[3]+ = {BFD_RELOC_UNUSED, BFD_RELOC_UNUSED, BFD_RELOC_UNUSED};+ char buf[256];++ sprintf (buf, "vpfxs %s", vfpu_sprefix_str);+ mips_ip (buf, &prefix);+ append_insn ( &prefix, NULL, unused_reloc);+ vfpu_sprefix = FALSE;+ }+ + if (vfpu_tprefix)+ {+ struct mips_cl_insn prefix;+ bfd_reloc_code_real_type unused_reloc[3]+ = {BFD_RELOC_UNUSED, BFD_RELOC_UNUSED, BFD_RELOC_UNUSED};+ char buf[256];++ sprintf (buf, "vpfxt %s", vfpu_tprefix_str);+ mips_ip (buf, &prefix);+ append_insn (&prefix, NULL, unused_reloc);+ vfpu_tprefix = FALSE;+ }+ }+ if (insn.insn_mo->pinfo == INSN_MACRO) { macro_start ();@@ -3128,6 +3226,55 @@ insn.insn_opcode |= va_arg (args, unsigned long); continue; + /* VFPU fields */+ case '?':+ switch (*fmt++)+ {+ case 'o':+ *r = (bfd_reloc_code_real_type) va_arg (args, int);+ assert (*r == BFD_RELOC_GPREL16+ || *r == BFD_RELOC_MIPS_LITERAL+ || *r == BFD_RELOC_MIPS_HIGHER+ || *r == BFD_RELOC_HI16_S+ || *r == BFD_RELOC_LO16+ || *r == BFD_RELOC_MIPS_GOT16+ || *r == BFD_RELOC_MIPS_CALL16+ || *r == BFD_RELOC_MIPS_GOT_DISP+ || *r == BFD_RELOC_MIPS_GOT_PAGE+ || *r == BFD_RELOC_MIPS_GOT_OFST+ || *r == BFD_RELOC_MIPS_GOT_LO16+ || *r == BFD_RELOC_MIPS_CALL_LO16);+ break;+ case 'd':+ insn.insn_opcode |= va_arg (args, int) << VF_SH_VD;+ fmt += 2;+ break;+ case 's':+ insn.insn_opcode |= va_arg (args, int) << VF_SH_VS;+ fmt += 2;+ break;+ case 'm':+ {+ int vtreg = va_arg (args, int);+ insn.insn_opcode |= (vtreg & VF_MASK_VML) << VF_SH_VML;+ insn.insn_opcode |= ((vtreg >> 5) & VF_MASK_VMH) << VF_SH_VMH;+ fmt += 2;+ }+ break;+ case 'n':+ {+ int vtreg = va_arg (args, int);+ insn.insn_opcode |= (vtreg & VF_MASK_VNL) << VF_SH_VNL;+ insn.insn_opcode |= ((vtreg >> 5) & VF_MASK_VNH) << VF_SH_VNH;+ fmt += 2;+ }+ break;+ case 'e':+ insn.insn_opcode |= va_arg (args, int) << VF_SH_MCOND;+ break;+ }+ continue;+ default: internalError (); }@@ -4103,6 +4250,7 @@ macro (struct mips_cl_insn *ip) { register int treg, sreg, dreg, breg;+ int vsreg, vtreg, vdreg, vmreg, vwb; int tempreg; int mask; int used_at = 0;@@ -4128,6 +4276,13 @@ sreg = breg = (ip->insn_opcode >> 21) & 0x1f; mask = ip->insn_mo->mask; + vmreg = ((ip->insn_opcode >> 16) & 0x1f)+ | ((ip->insn_opcode << 5) & 0x60);+ vtreg = (ip->insn_opcode >> 16) & 0x7f;+ vsreg = (ip->insn_opcode >> 8) & 0x7f;+ vdreg = (ip->insn_opcode >> 0) & 0x7f;+ vwb = (ip->insn_opcode >> 1) & 0x1;+ expr1.X_op = O_constant; expr1.X_op_symbol = NULL; expr1.X_add_symbol = NULL;@@ -5654,6 +5809,26 @@ /* Itbl support may require additional care here. */ coproc = 1; goto ld;+ case M_LV_S_AB:+ s = "lv.s";+ /* Itbl support may require additional care here. */+ coproc = 1;+ goto ld;+ case M_LV_Q_AB:+ s = "lv.q";+ /* Itbl support may require additional care here. */+ coproc = 1;+ goto ld;+ case M_LVL_Q_AB:+ s = "lvl.q";+ /* Itbl support may require additional care here. */+ coproc = 1;+ goto ld;+ case M_LVR_Q_AB:+ s = "lvr.q";+ /* Itbl support may require additional care here. */+ coproc = 1;+ goto ld; case M_LWL_AB: s = "lwl"; lr = 1;@@ -5738,6 +5913,29 @@ /* Itbl support may require additional care here. */ coproc = 1; goto st;+ case M_SV_S_AB:+ s = "sv.s";+ /* Itbl support may require additional care here. */+ coproc = 1;+ goto st;+ case M_SV_Q_AB:+ if (vwb)+ s = "vwb.q";+ else+ s = "sv.q";+ /* Itbl support may require additional care here. */+ coproc = 1;+ goto st;+ case M_SVL_Q_AB:+ s = "svl.q";+ /* Itbl support may require additional care here. */+ coproc = 1;+ goto st;+ case M_SVR_Q_AB:+ s = "svr.q";+ /* Itbl support may require additional care here. */+ coproc = 1;+ goto st; case M_SWL_AB: s = "swl"; goto st;@@ -5787,6 +5985,22 @@⌨️ 快捷键说明
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