📄 tx_ill.s
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;/**************************************************************************/
;/* */
;/* Copyright (c) 1996-1999 by Express Logic Inc. */
;/* */
;/* This software is copyrighted by and is the sole property of Express */
;/* Logic, Inc. All rights, title, ownership, or other interests */
;/* in the software remain the property of Express Logic, Inc. This */
;/* software may only be used in accordance with the corresponding */
;/* license agreement. Any unauthorized use, duplication, transmission, */
;/* distribution, or disclosure of this software is expressly forbidden. */
;/* */
;/* This Copyright notice may not be removed or modified without prior */
;/* written consent of Express Logic, Inc. */
;/* */
;/* Express Logic, Inc. reserves the right to modify this software */
;/* without notice. */
;/* */
;/* Express Logic, Inc. */
;/* 11440 West Bernardo Court info@expresslogic.com */
;/* Suite 300 http://www.expresslogic.com */
;/* San Diego, CA 92127 */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Initialize (INI) */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
;#define TX_SOURCE_CODE
;
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_ini.h"
;#include "tx_thr.h"
;#include "tx_tim.h"
RAM_BASE EQU 0x0 ;
RAM_BASE_BOOT EQU 0x300000 ;
SVC_MODE EQU 0xD3 ; Disable irq,fiq SVC mode
IRQ_MODE EQU 0xD2 ; Disable irq,fiq IRQ mode
FIQ_MODE EQU 0xD1 ; Disable irq,fiq FIQ mode
;
CCR EQU 0xE0024008
VICVectAddr_Base EQU 0xFFFFF100
VICIntEnClr EQU 0xFFFFF014
VICIntEnable EQU 0xFFFFF010
VICIntEntSelect EQU 0xFFFFF00C
VICVectAddr EQU 0xFFFFF030
T0TCR EQU 0xE0004004
T0IR EQU 0xE0004000
ILR EQU 0xE0024000
CIIR EQU 0xE002400C
;TIME_VALUE EQU 0xff
;ALL_INT EQU 0x701FF
IMPORT _tx_thread_system_stack_ptr
IMPORT _tx_initialize_unused_memory
IMPORT _tx_thread_context_save
IMPORT _tx_thread_context_restore
IMPORT _tx_timer_interrupt
IMPORT _tx_timer_stack_start
IMPORT _tx_timer_stack_size
IMPORT _tx_timer_priority
IMPORT main
IMPORT initiate
IMPORT |Image$$RO$$Limit|
IMPORT |Image$$RW$$Base|
IMPORT |Image$$ZI$$Base|
IMPORT |Image$$ZI$$Limit|
;
;
AREA Init, CODE, READONLY
;
;/* Define the ARM7 vector area. This should be located or copied to 0. */
;
EXPORT __vectors
__vectors
LDR PC, ResetAddr ; Reset goes to startup function
LDR PC, UndefinedAddr ; Undefined handler
LDR PC, SWI_Addr ; Software interrupt handler
LDR PC, PrefetchAddr ; Prefetch exeception handler
LDR PC, DataAbortAddr ; Abort exception handler
DCD 0xb9205f80 ; Reserved exception handler
LDR PC, [PC, #-0xff0] ; IRQ interrupt handler
LDR PC, FIQ_Addr ; FIQ interrupt handler
ResetAddr DCD __main
UndefinedAddr DCD __tx_undefined
SWI_Addr DCD __tx_swi_interrupt
PrefetchAddr DCD __tx_prefetch_handler
DataAbortAddr DCD __tx_abort_handler
Nouse DCD 0
IRQ_Addr DCD 0
FIQ_Addr DCD __tx_fiq_handler
;
;
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* __main ARM7/ARM */
;/* 3.0e */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Express Logic, Inc. */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is the entry function for the ARM compiler tools. */
;/* It is responsible for setting up the initialized data area, */
;/* non-initiailzed data area, and the initial stack pointers. When */
;/* processing is finished, the routine jumps to the user's main */
;/* function. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* Reset Vectors */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-15-1997 William E. Lamie Initial Version 3.0 */
;/* 11-11-1997 William E. Lamie Modified comment(s), */
;/* resulting in version 3.0b. */
;/* 03-01-1998 William E. Lamie Modified comment(s), */
;/* resulting in version 3.0d. */
;/* 01-01-1999 William E. Lamie Modified comment(s) and fixed */
;/* ROM copy loop compare, */
;/* resulting in version 3.0e. */
;/* */
;/**************************************************************************/
EXPORT __entryX
__entryX
EXPORT __main
__main
ENTRY
;
MOV a1, #SVC_MODE ; Build interrupt lockout, SVC mode
MSR CPSR_c, a1 ; Ensure ints locked out and SVC mode
;
; /****** NOTE ****** We must be in SVC MODE at this point. Some monitors
; enter this routine in USER mode and require a software interrupt to
; change into SVC mode. */
;
; /*- Perform 16 End Of Interrupt Command to make sure AIC will not lock out nIRQ*/
LDR r0,=VICIntEnClr
LDR r2,=0xffffffff;
STR r2,[r0,#0]
LDR r0,=0xfffff014
LDR r2,=0x1ff
STR r2,[r0,#0]
LDR r0,=AicData
ldmia r0,{r2,r3}
mov r0, #17 ; counter
LoopAic1
str r3, [r2, r0, LSL #2] ; SVRs for IRQs
subs r0, r0, #1 ;
bpl LoopAic1
; /* Perform C memory initialization, i.e. setup initialized C variables and
; clear the uninitialized C variables to 0. */
;
LDR a1, =|Image$$RO$$Limit| ; Get start of ROM copy of data
LDR a2, =|Image$$RW$$Base| ; Get start of RAM destination
LDR a4, =|Image$$ZI$$Base| ; End of RAM copy destination
CMP a1, a2 ; Check for something to initialize
BEQ __tx_ROM_copy_done ; If not, skip the copy loop
;
__tx_ROM_copy_loop
CMP a2, a4 ; Check for completion
LDRCC a3, [a1], #4 ; Pickup ROM data
STRCC a3, [a2], #4 ; Store it in RAM area
BCC __tx_ROM_copy_loop ; Continue if more to copy
;
__tx_ROM_copy_done
;
; /* Clear the Non-Initialized Data area. */
;
LDR a2, =|Image$$ZI$$Limit| ; Get end of non-initialized RAM area
MOV a3, #0 ; Build clear value
__tx_RAM_clear
CMP a4, a2 ; Check for completion
STRCC a3, [a4], #4 ; Clear non-initialized RAM area
BCC __tx_RAM_clear ; Continue if more to clear
;
; /* Setup initial stack pointers for SVC, IRQ, and FIQ modes. */
;
LDR a3, [pc, #FIQ_STACK_SIZE-.-8] ; Pickup stack size
MOV a1, #FIQ_MODE ; Build FIQ mode CPSR
MSR CPSR_c, a1 ; Enter FIQ mode
ADD a2, a2, a3 ; Calculate start of FIQ stack
BIC a2, a2, #3 ; Ensure long word alignment
SUB a2, a2, #4 ; Backup one word
MOV sp, a2 ; Setup FIQ stack pointer
MOV sl, #0 ; Clear sl
MOV fp, #0 ; Clear fp
LDR a3, [pc, #SYS_STACK_SIZE-.-8] ; Pickup IRQ (system stack size)
MOV a1, #IRQ_MODE ; Build IRQ mode CPSR
MSR CPSR_c, a1 ; Enter IRQ mode
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