evmdm6437.h

DM643x Bootloader Flash烧写程序Flash=S29GL512N

#define EMAC_TX7HDP             *( volatile Uint32* )( EMAC_BASE + 0x61C )
#define EMAC_RX0HDP             *( volatile Uint32* )( EMAC_BASE + 0x620 )
#define EMAC_RX1HDP             *( volatile Uint32* )( EMAC_BASE + 0x624 )
#define EMAC_RX2HDP             *( volatile Uint32* )( EMAC_BASE + 0x628 )
#define EMAC_RX3HDP             *( volatile Uint32* )( EMAC_BASE + 0x62C )
#define EMAC_RX4HDP             *( volatile Uint32* )( EMAC_BASE + 0x630 )
#define EMAC_RX5HDP             *( volatile Uint32* )( EMAC_BASE + 0x634 )
#define EMAC_RX6HDP             *( volatile Uint32* )( EMAC_BASE + 0x638 )
#define EMAC_RX7HDP             *( volatile Uint32* )( EMAC_BASE + 0x63C )
#define EMAC_TX0CP              *( volatile Uint32* )( EMAC_BASE + 0x640 )
#define EMAC_TX1CP              *( volatile Uint32* )( EMAC_BASE + 0x644 )
#define EMAC_TX2CP              *( volatile Uint32* )( EMAC_BASE + 0x648 )
#define EMAC_TX3CP              *( volatile Uint32* )( EMAC_BASE + 0x64C )
#define EMAC_TX4CP              *( volatile Uint32* )( EMAC_BASE + 0x650 )
#define EMAC_TX5CP              *( volatile Uint32* )( EMAC_BASE + 0x654 )
#define EMAC_TX6CP              *( volatile Uint32* )( EMAC_BASE + 0x658 )
#define EMAC_TX7CP              *( volatile Uint32* )( EMAC_BASE + 0x65C )
#define EMAC_RX0CP              *( volatile Uint32* )( EMAC_BASE + 0x660 )
#define EMAC_RX1CP              *( volatile Uint32* )( EMAC_BASE + 0x664 )
#define EMAC_RX2CP              *( volatile Uint32* )( EMAC_BASE + 0x668 )
#define EMAC_RX3CP              *( volatile Uint32* )( EMAC_BASE + 0x66C )
#define EMAC_RX4CP              *( volatile Uint32* )( EMAC_BASE + 0x670 )
#define EMAC_RX5CP              *( volatile Uint32* )( EMAC_BASE + 0x674 )
#define EMAC_RX6CP              *( volatile Uint32* )( EMAC_BASE + 0x678 )
#define EMAC_RX7CP              *( volatile Uint32* )( EMAC_BASE + 0x67C )
#define EMAC_RXGOODFRAMES       *( volatile Uint32* )( EMAC_BASE + 0x200 )
#define EMAC_RXBCASTFRAMES      *( volatile Uint32* )( EMAC_BASE + 0x204 )
#define EMAC_RXMCASTFRAMES      *( volatile Uint32* )( EMAC_BASE + 0x208 )
#define EMAC_RXPAUSEFRAMES      *( volatile Uint32* )( EMAC_BASE + 0x20C )
#define EMAC_RXCRCERRORS        *( volatile Uint32* )( EMAC_BASE + 0x210 )
#define EMAC_RXALIGNCODEERRORS  *( volatile Uint32* )( EMAC_BASE + 0x214 )
#define EMAC_RXOVERSIZED        *( volatile Uint32* )( EMAC_BASE + 0x218 )
#define EMAC_RXJABBER           *( volatile Uint32* )( EMAC_BASE + 0x21C )
#define EMAC_RXUNDERSIZED       *( volatile Uint32* )( EMAC_BASE + 0x220 )
#define EMAC_RXFRAGMENTS        *( volatile Uint32* )( EMAC_BASE + 0x224 )
#define EMAC_RXFILTERED         *( volatile Uint32* )( EMAC_BASE + 0x228 )
#define EMAC_RXQOSFILTERED      *( volatile Uint32* )( EMAC_BASE + 0x22C )
#define EMAC_RXOCTETS           *( volatile Uint32* )( EMAC_BASE + 0x230 )
#define EMAC_TXGOODFRAMES       *( volatile Uint32* )( EMAC_BASE + 0x234 )
#define EMAC_TXBCASTFRAMES      *( volatile Uint32* )( EMAC_BASE + 0x238 )
#define EMAC_TXMCASTFRAMES      *( volatile Uint32* )( EMAC_BASE + 0x23C )
#define EMAC_TXPAUSEFRAMES      *( volatile Uint32* )( EMAC_BASE + 0x240 )
#define EMAC_TXDEFERRED         *( volatile Uint32* )( EMAC_BASE + 0x244 )
#define EMAC_TXCOLLISION        *( volatile Uint32* )( EMAC_BASE + 0x248 )
#define EMAC_TXSINGLECOLL       *( volatile Uint32* )( EMAC_BASE + 0x24C )
#define EMAC_TXMULTICOLL        *( volatile Uint32* )( EMAC_BASE + 0x250 )
#define EMAC_TXEXCESSIVECOLL    *( volatile Uint32* )( EMAC_BASE + 0x254 )
#define EMAC_TXLATECOLL         *( volatile Uint32* )( EMAC_BASE + 0x258 )
#define EMAC_TXUNDERRUN         *( volatile Uint32* )( EMAC_BASE + 0x25C )
#define EMAC_TXCARRIERSENSE     *( volatile Uint32* )( EMAC_BASE + 0x260 )
#define EMAC_TXOCTETS           *( volatile Uint32* )( EMAC_BASE + 0x264 )
#define EMAC_FRAME64            *( volatile Uint32* )( EMAC_BASE + 0x268 )
#define EMAC_FRAME65T127        *( volatile Uint32* )( EMAC_BASE + 0x26C )
#define EMAC_FRAME128T255       *( volatile Uint32* )( EMAC_BASE + 0x270 )
#define EMAC_FRAME256T511       *( volatile Uint32* )( EMAC_BASE + 0x274 )
#define EMAC_FRAME512T1023      *( volatile Uint32* )( EMAC_BASE + 0x278 )
#define EMAC_FRAME1024TUP       *( volatile Uint32* )( EMAC_BASE + 0x27C )
#define EMAC_NETOCTETS          *( volatile Uint32* )( EMAC_BASE + 0x280 )
#define EMAC_RXSOFOVERRUNS      *( volatile Uint32* )( EMAC_BASE + 0x284 )
#define EMAC_RXMOFOVERRUNS      *( volatile Uint32* )( EMAC_BASE + 0x288 )
#define EMAC_RXDMAOVERRUNS      *( volatile Uint32* )( EMAC_BASE + 0x28C )

/* EMAC Wrapper */
#define EMAC_EWCTL              *( volatile Uint32* )( EMAC_BASE + 0x1004 )
#define EMAC_EWINTTCNT          *( volatile Uint32* )( EMAC_BASE + 0x1008 )

/* EMAC RAM */
#define EMAC_RAM_BASE           0x01C82000
#define EMAC_RAM_LEN            0x00002000

/* Packet Flags */
#define EMAC_DSC_FLAG_SOP               0x80000000
#define EMAC_DSC_FLAG_EOP               0x40000000
#define EMAC_DSC_FLAG_OWNER             0x20000000
#define EMAC_DSC_FLAG_EOQ               0x10000000
#define EMAC_DSC_FLAG_TDOWNCMPLT        0x08000000
#define EMAC_DSC_FLAG_PASSCRC           0x04000000

/* The following flags are RX only */
#define EMAC_DSC_FLAG_JABBER            0x02000000
#define EMAC_DSC_FLAG_OVERSIZE          0x01000000
#define EMAC_DSC_FLAG_FRAGMENT          0x00800000
#define EMAC_DSC_FLAG_UNDERSIZED        0x00400000
#define EMAC_DSC_FLAG_CONTROL           0x00200000
#define EMAC_DSC_FLAG_OVERRUN           0x00100000
#define EMAC_DSC_FLAG_CODEERROR         0x00080000
#define EMAC_DSC_FLAG_ALIGNERROR        0x00040000
#define EMAC_DSC_FLAG_CRCERROR          0x00020000
#define EMAC_DSC_FLAG_NOMATCH           0x00010000

/* Interrupts */
#define EMAC_MACINVECTOR_USERINT        0x80000000
#define EMAC_MACINVECTOR_LINKINT        0x40000000
#define EMAC_MACINVECTOR_HOSTPEND       0x00020000
#define EMAC_MACINVECTOR_STATPEND       0x00010000
#define EMAC_MACINVECTOR_RXPEND         0x0000FF00
#define EMAC_MACINVECTOR_TXPEND         0x000000FF

/* ------------------------------------------------------------------------ *
 *                                                                          *
 *  GPIO Control                                                            *
 *                                                                          *
 * ------------------------------------------------------------------------ */
#define GPIO_BASE               0x01C67000

#define GPIO_PCR                *( volatile Uint32* )( GPIO_BASE + 0x04 )
#define GPIO_BINTEN             *( volatile Uint32* )( GPIO_BASE + 0x08 )

// For GPIO[0:31]
#define GPIO_DIR_BASE           ( 0x10 )   // Direction Cntl
#define GPIO_OUT_DATA_BASE      ( 0x14 )   // Output data
#define GPIO_SET_DATA_BASE      ( 0x18 )   // Set data
#define GPIO_CLR_DATA_BASE      ( 0x1C )   // Clear data
#define GPIO_IN_DATA_BASE       ( 0x20 )   // Input data
#define GPIO_SET_RIS_TRIG_BASE  ( 0x24 )   // Set rising edge intr
#define GPIO_CLR_RIS_TRIG_BASE  ( 0x28 )   // Clear rising edge intr
#define GPIO_SET_FAL_TRIG_BASE  ( 0x2C )   // Set falling edge intr
#define GPIO_CLR_FAL_TRIG_BASE  ( 0x30 )   // Clear falling edge intr
#define GPIO_INSTAT_BASE        ( 0x34 )   // Intr status
#define GPIO_BASE_OFFSET        0x28

#define GPIO_01_BASE            ( GPIO_BASE + 0x10 )
#define GPIO_23_BASE            ( GPIO_01_BASE + GPIO_BASE_OFFSET )
#define GPIO_45_BASE            ( GPIO_23_BASE + GPIO_BASE_OFFSET )
#define GPIO_6_BASE             ( GPIO_45_BASE + GPIO_BASE_OFFSET )

// For GPIO[0:31]
#define GPIO_DIR01              *( volatile Uint32* )( GPIO_BASE + 0x10 )
#define GPIO_OUT_DATA01         *( volatile Uint32* )( GPIO_BASE + 0x14 )
#define GPIO_SET_DATA01         *( volatile Uint32* )( GPIO_BASE + 0x18 )
#define GPIO_CLR_DATA01         *( volatile Uint32* )( GPIO_BASE + 0x1C )
#define GPIO_IN_DATA01          *( volatile Uint32* )( GPIO_BASE + 0x20 )
#define GPIO_SET_RIS_TRIG01     *( volatile Uint32* )( GPIO_BASE + 0x24 )
#define GPIO_CLR_RIS_TRIG01     *( volatile Uint32* )( GPIO_BASE + 0x28 )
#define GPIO_SET_FAL_TRIG01     *( volatile Uint32* )( GPIO_BASE + 0x2C )
#define GPIO_CLR_FAL_TRIG01     *( volatile Uint32* )( GPIO_BASE + 0x30 )
#define GPIO_INSTAT01           *( volatile Uint32* )( GPIO_BASE + 0x34 )

// For GPIO[32:63]
#define GPIO_DIR23              *( volatile Uint32* )( GPIO_BASE + 0x38 )
#define GPIO_OUT_DATA23         *( volatile Uint32* )( GPIO_BASE + 0x3C )
#define GPIO_SET_DATA23         *( volatile Uint32* )( GPIO_BASE + 0x40 )
#define GPIO_CLR_DATA23         *( volatile Uint32* )( GPIO_BASE + 0x44 )
#define GPIO_IN_DATA23          *( volatile Uint32* )( GPIO_BASE + 0x48 )
#define GPIO_SET_RIS_TRIG23     *( volatile Uint32* )( GPIO_BASE + 0x4C )
#define GPIO_CLR_RIS_TRIG23     *( volatile Uint32* )( GPIO_BASE + 0x50 )
#define GPIO_SET_FAL_TRIG23     *( volatile Uint32* )( GPIO_BASE + 0x54 )
#define GPIO_CLR_FAL_TRIG23     *( volatile Uint32* )( GPIO_BASE + 0x58 )
#define GPIO_INSTAT23           *( volatile Uint32* )( GPIO_BASE + 0x5C )

// For GPIO[64:70]
#define GPIO_DIR45              *( volatile Uint32* )( GPIO_BASE + 0x60 )
#define GPIO_OUT_DATA45         *( volatile Uint32* )( GPIO_BASE + 0x64 )
#define GPIO_SET_DATA45         *( volatile Uint32* )( GPIO_BASE + 0x68 )
#define GPIO_CLR_DATA45         *( volatile Uint32* )( GPIO_BASE + 0x6C )
#define GPIO_IN_DATA45          *( volatile Uint32* )( GPIO_BASE + 0x70 )
#define GPIO_SET_RIS_TRIG45     *( volatile Uint32* )( GPIO_BASE + 0x74 )
#define GPIO_CLR_RIS_TRIG45     *( volatile Uint32* )( GPIO_BASE + 0x78 )
#define GPIO_SET_FAL_TRIG45     *( volatile Uint32* )( GPIO_BASE + 0x7C )
#define GPIO_CLR_FAL_TRIG45     *( volatile Uint32* )( GPIO_BASE + 0x80 )
#define GPIO_INSTAT45           *( volatile Uint32* )( GPIO_BASE + 0x84 )

/* ------------------------------------------------------------------------ *
 *                                                                          *
 *  HECC Control ( DM643x only )                                            *
 *                                                                          *
 * ------------------------------------------------------------------------ */
#define HECC_BASE               0x01C23000
#define HECC_ME                 *( volatile Uint32* )( HECC_BASE + 0x00 )
#define HECC_MD                 *( volatile Uint32* )( HECC_BASE + 0x04 )
#define HECC_TRS                *( volatile Uint32* )( HECC_BASE + 0x08 )
#define HECC_TRR                *( volatile Uint32* )( HECC_BASE + 0x0C )
#define HECC_TA                 *( volatile Uint32* )( HECC_BASE + 0x10 )
#define HECC_AA                 *( volatile Uint32* )( HECC_BASE + 0x14 )
#define HECC_RMP                *( volatile Uint32* )( HECC_BASE + 0x18 )
#define HECC_RML                *( volatile Uint32* )( HECC_BASE + 0x1C )
#define HECC_RFP                *( volatile Uint32* )( HECC_BASE + 0x20 )
#define HECC_GAM                *( volatile Uint32* )( HECC_BASE + 0x24 )
#define HECC_MC                 *( volatile Uint32* )( HECC_BASE + 0x28 )
#define HECC_BTC                *( volatile Uint32* )( HECC_BASE + 0x2C )
#define HECC_ES                 *( volatile Uint32* )( HECC_BASE + 0x30 )
#define HECC_TEC                *( volatile Uint32* )( HECC_BASE + 0x34 )
#define HECC_REC                *( volatile Uint32* )( HECC_BASE + 0x38 )
#define HECC_GIF0               *( volatile Uint32* )( HECC_BASE + 0x3C )
#define HECC_GIM                *( volatile Uint32* )( HECC_BASE + 0x40 )
#define HECC_GIF1               *( volatile Uint32* )( HECC_BASE + 0x44 )
#define HECC_MIM                *( volatile Uint32* )( HECC_BASE + 0x48 )
#define HECC_MIL                *( volatile Uint32* )( HECC_BASE + 0x4C )
#define HECC_OPC                *( volatile Uint32* )( HECC_BASE + 0x50 )
#define HECC_TIOC               *( volatile Uint32* )( HECC_BASE + 0x54 )
#define HECC_RIOC               *( volatile Uint32* )( HECC_BASE + 0x58 )
#define HECC_LNT                *( volatile Uint32* )( HECC_BASE + 0x5C )
#define HECC_TOC                *( volatile Uint32* )( HECC_BASE + 0x60 )
#define HECC_TOS                *( volatile Uint32* )( HECC_BASE + 0x64 )
#define HECC_TIOCE              *( volatile Uint32* )( HECC_BASE + 0x68 )