z8530book.tmpl

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<book id="Z85230Guide">
 <bookinfo>
  <title>Z8530 Programming Guide</title>
  
  <authorgroup>
   <author>
    <firstname>Alan</firstname>
    <surname>Cox</surname>
    <affiliation>
     <address>
      <email>[e-mail]</email>
     </address>
    </affiliation>
   </author>
  </authorgroup>

  <copyright>
   <year>2000</year>
   <holder>Alan Cox</holder>
  </copyright>

  <legalnotice>
   <para>
     This documentation is free software; you can redistribute
     it and/or modify it under the terms of the GNU General Public
     License as published by the Free Software Foundation; either
     version 2 of the License, or (at your option) any later
     version.
   </para>
      
   <para>
     This program is distributed in the hope that it will be
     useful, but WITHOUT ANY WARRANTY; without even the implied
     warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
     See the GNU General Public License for more details.
   </para>
      
   <para>
     You should have received a copy of the GNU General Public
     License along with this program; if not, write to the Free
     Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
     MA 02111-1307 USA
   </para>
      
   <para>
     For more details see the file COPYING in the source
     distribution of Linux.
   </para>
  </legalnotice>
 </bookinfo>

<toc></toc>

  <chapter id="intro">
      <title>Introduction</title>
  <para>
	The Z85x30 family synchronous/asynchronous controller chips are
	used on a large number of cheap network interface cards. The
	kernel provides a core interface layer that is designed to make
	it easy to provide WAN services using this chip.
  </para>
  <para>
	The current driver only support synchronous operation. Merging the
	asynchronous driver support into this code to allow any Z85x30
	device to be used as both a tty interface and as a synchronous 
	controller is a project for Linux post the 2.4 release
  </para>
  <para>
	The support code handles most common card configurations and
	supports running both Cisco HDLC and Synchronous PPP. With extra
	glue the frame relay and X.25 protocols can also be used with this
	driver.
  </para>
  </chapter>
  
  <chapter>
 	<title>Driver Modes</title>
  <para>
	The Z85230 driver layer can drive Z8530, Z85C30 and Z85230 devices
	in three different modes. Each mode can be applied to an individual
	channel on the chip (each chip has two channels).
  </para>
  <para>
	The PIO synchronous mode supports the most common Z8530 wiring. Here
	the chip is interface to the I/O and interrupt facilities of the
	host machine but not to the DMA subsystem. When running PIO the
	Z8530 has extremely tight timing requirements. Doing high speeds,
	even with a Z85230 will be tricky. Typically you should expect to
	achieve at best 9600 baud with a Z8C530 and 64Kbits with a Z85230.
  </para>
  <para>
	The DMA mode supports the chip when it is configured to use dual DMA
	channels on an ISA bus. The better cards tend to support this mode
	of operation for a single channel. With DMA running the Z85230 tops
	out when it starts to hit ISA DMA constraints at about 512Kbits. It
	is worth noting here that many PC machines hang or crash when the
	chip is driven fast enough to hold the ISA bus solid.
  </para>
  <para>
	Transmit DMA mode uses a single DMA channel. The DMA channel is used
	for transmission as the transmit FIFO is smaller than the receive
	FIFO. it gives better performance than pure PIO mode but is nowhere
	near as ideal as pure DMA mode. 
  </para>
  </chapter>

  <chapter>
 	<title>Using the Z85230 driver</title>
  <para>
	The Z85230 driver provides the back end interface to your board. To
	configure a Z8530 interface you need to detect the board and to 
	identify its ports and interrupt resources. It is also your problem
	to verify the resources are available.
  </para>
  <para>
	Having identified the chip you need to fill in a struct z8530_dev,
	which describes each chip. This object must exist until you finally
	shutdown the board. Firstly zero the active field. This ensures 
	nothing goes off without you intending it. The irq field should
	be set to the interrupt number of the chip. (Each chip has a single
	interrupt source rather than each channel). You are responsible
	for allocating the interrupt line. The interrupt handler should be
	set to <function>z8530_interrupt</function>. The device id should
	be set to the z8530_dev structure pointer. Whether the interrupt can
	be shared or not is board dependent, and up to you to initialise.
  </para>
  <para>
	The structure holds two channel structures. 
	Initialise chanA.ctrlio and chanA.dataio with the address of the
	control and data ports. You can or this with Z8530_PORT_SLEEP to
	indicate your interface needs the 5uS delay for chip settling done
	in software. The PORT_SLEEP option is architecture specific. Other
	flags may become available on future platforms, eg for MMIO.
	Initialise the chanA.irqs to &amp;z8530_nop to start the chip up
	as disabled and discarding interrupt events. This ensures that
	stray interrupts will be mopped up and not hang the bus. Set
	chanA.dev to point to the device structure itself. The
	private and name field you may use as you wish. The private field
	is unused by the Z85230 layer. The name is used for error reporting
	and it may thus make sense to make it match the network name.
  </para>
  <para>
	Repeat the same operation with the B channel if your chip has
	both channels wired to something useful. This isn't always the
	case. If it is not wired then the I/O values do not matter, but
	you must initialise chanB.dev.
  </para>
  <para>
	If your board has DMA facilities then initialise the txdma and
	rxdma fields for the relevant channels. You must also allocate the
	ISA DMA channels and do any necessary board level initialisation
	to configure them. The low level driver will do the Z8530 and
	DMA controller programming but not board specific magic.
  </para>
  <para>
	Having initialised the device you can then call
	<function>z8530_init</function>. This will probe the chip and 
	reset it into a known state. An identification sequence is then
	run to identify the chip type. If the checks fail to pass the
	function returns a non zero error code. Typically this indicates
	that the port given is not valid. After this call the
	type field of the z8530_dev structure is initialised to either
	Z8530, Z85C30 or Z85230 according to the chip found.
  </para>
  <para>
	Once you have called z8530_init you can also make use of the utility
	function <function>z8530_describe</function>. This provides a 
	consistent reporting format for the Z8530 devices, and allows all
	the drivers to provide consistent reporting.
  </para>
  </chapter>

  <chapter>
 	<title>Attaching Network Interfaces</title>
  <para>
	If you wish to use the network interface facilities of the driver,
	then you need to attach a network device to each channel that is
	present and in use. In addition to use the SyncPPP and Cisco HDLC
	you need to follow some additional plumbing rules. They may seem 
	complex but a look at the example hostess_sv11 driver should
	reassure you.
  </para>
  <para>
	The network device used for each channel should be pointed to by
	the netdevice field of each channel. The dev-&gt; priv field of the
	network device points to your private data - you will need to be
	able to find your ppp device from this. In addition to use the
	sync ppp layer the private data must start with a void * pointer
	to the syncppp structures.
  </para>