tqm8xx.patch

linux交叉编译环境个软件和内核的补丁。

 	addi	r8,r8,2
-#else	
+# else	/* !CONFIG_APUS */
 	ori	r11,r11,BL_256M<<2|0x2	/* set up BAT registers for 604 */
 	li	r8,2			/* R/W access */
-#ifdef CONFIG_PPC64
+#  ifdef CONFIG_PPC64
 	/* clear out the high 32 bits in the BAT */
 	clrldi	r11,r11,32
 	clrldi	r8,r8,32
 	/* turn off the pagetable mappings just in case */
 	clrldi	r16,r16,63
 	mtsdr1	r16
-#else /* CONFIG_PPC64 */
+#  else /* !CONFIG_PPC64 */
 	/*
 	 * If the MMU is off clear the bats.  See clear_bat() -- Cort
 	 */
@@ -314,15 +314,15 @@
 	mtspr	DBAT2U,r21		/* bit in upper BAT register */
 	mtspr	IBAT2L,r18
 	mtspr	IBAT2U,r21
-#endif /* CONFIG_PPC64 */
-#endif
+#  endif /* CONFIG_PPC64 */
+# endif	/* CONFIG_APUS */
 	mtspr	DBAT0L,r8		/* N.B. 6xx (not 601) have valid */
 	mtspr	DBAT0U,r11		/* bit in upper BAT register */
 	mtspr	IBAT0L,r8
 	mtspr	IBAT0U,r11
 5:	isync
 
-#ifdef CONFIG_APUS
+# ifdef CONFIG_APUS
 	/* Unfortunately the APUS specific instructions bloat the
 	 * code so it cannot fit in the 0x100 bytes available. We have
 	 * to do it the crude way. */
@@ -342,7 +342,7 @@
 	li	r5,0x4000		/* # bytes of memory to copy */
 	li	r6,0
 	bl	copy_and_flush		/* copy the first 0x4000 bytes */
-#else /* CONFIG_APUS */
+# else /* !CONFIG_APUS */
 /*
  * We need to run with _start at physical address 0.
  * On CHRP, we are loaded at 0x10000 since OF on CHRP uses
@@ -364,7 +364,7 @@
 	cmpw	0,r4,r3			/* already running at KERNELBASE? */
 	bne	relocate_kernel
 2:
-#endif /* CONFIG_APUS */
+# endif /* CONFIG_APUS */
 /*
  * we now have the 1st 16M of ram mapped with the bats.
  * prep needs the mmu to be turned on here, but pmac already has it on.
@@ -372,7 +372,7 @@
  * as we jump to our code at KERNELBASE. -- Cort
  */
 	
-#else /* CONFIG_8xx */
+#else /* !CONFIG_8xx */
 	tlbia			/* Invalidate all TLB entries */
 	li	r8, 0
 	mtspr	MI_CTR, r8	/* Set instruction control to zero */
+ diff -u linux-2.2.13/arch/ppc/kernel/m8xx_setup.c.ORIG linux-2.2.13/arch/ppc/kernel/m8xx_setup.c
--- linux-2.2.13/arch/ppc/kernel/m8xx_setup.c.ORIG	Sat Oct 23 00:14:57 1999
+++ linux-2.2.13/arch/ppc/kernel/m8xx_setup.c	Sun Jan  9 16:05:35 2000
@@ -231,9 +231,20 @@
 void
 m8xx_restart(char *cmd)
 {
-	extern void m8xx_gorom(void);
+#if 0
+	extern void m8xx_gorom(bd_t *, unsigned long);
 
-	m8xx_gorom();
+	m8xx_gorom(NULL, TQM_RESET_ADDR);
+#else
+	extern void __clear_msr_me(void);
+	__volatile__ unsigned char dummy;
+	cli();
+	((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr |= 0x00000080;
+	__clear_msr_me();
+	dummy = ((immap_t *)IMAP_ADDR)->im_clkrst.res[0];
+	printk("Restart failed\n");
+	while(1);
+#endif
 }
 
 void
+ diff -u linux-2.2.13/arch/ppc/kernel/ppc-stub.c.ORIG linux-2.2.13/arch/ppc/kernel/ppc-stub.c
--- linux-2.2.13/arch/ppc/kernel/ppc-stub.c.ORIG	Tue Oct 19 22:23:12 1999
+++ linux-2.2.13/arch/ppc/kernel/ppc-stub.c	Sun Jan  9 16:05:35 2000
@@ -351,7 +351,7 @@
 
 static inline void set_msr(int msr)
 {
-	asm volatile("mfmsr %0" : : "r" (msr));
+	asm volatile("mtmsr %0" : : "r" (msr));
 }
 
 /* Set up exception handlers for tracing and breakpoints
+ diff -u linux-2.2.13/arch/ppc/mbxboot/Makefile.ORIG linux-2.2.13/arch/ppc/mbxboot/Makefile
--- linux-2.2.13/arch/ppc/mbxboot/Makefile.ORIG	Sat Oct 23 00:22:21 1999
+++ linux-2.2.13/arch/ppc/mbxboot/Makefile	Sun Jan  9 16:19:31 2000
@@ -25,11 +25,31 @@
 IOFF = 0
 ISZ = 0
 
+TQM_UART_DEBUG=no
+
 TFTPIMAGE=/tftpboot/zImage.mbx
+
+ifeq ($(TQM_UART_DEBUG),yes)
+# To be used when tqm_uart debugging ist used - kernel will  start, but NOT run!
+ZLINKFLAGS = -T ../vmlinux.lds -Ttext 0x40310000
+else
+# For normal linking:
 ZLINKFLAGS = -T ../vmlinux.lds -Ttext 0x00100000
+endif
 GZIP_FLAGS = -v9
 
-OBJECTS := head.o misc.o ../coffboot/zlib.o m8xx_tty.o
+# Use special version of head.S for TQM modules
+ifeq ($(CONFIG_TQM860),y)
+HEAD_O = head_tqm.o
+else
+ifeq ($(CONFIG_TQM8xxL),y)
+HEAD_O = head_tqm.o
+else
+HEAD_O = head.o
+endif
+endif
+
+OBJECTS := $(HEAD_O) misc.o ../coffboot/zlib.o m8xx_tty.o
 CFLAGS = -O2 -DSTDC_HEADERS -fno-builtin -I$(TOPDIR)/include -DCONFIG_8xx
 OBJCOPY = $(CROSS_COMPILE)objcopy
 OBJCOPY_ARGS = -O elf32-powerpc
@@ -37,6 +57,22 @@
 ifeq ($(CONFIG_MBX),y)
 OBJECTS += pci.o qspan_pci.o
 CFLAGS += -DCONFIG_MBX
+endif
+ifeq ($(CONFIG_TQM860),y)
+CFLAGS += -DCONFIG_TQM860
+ifeq ($(TQM_UART_DEBUG),yes)
+# To be used when tqm_uart debugging ist used:
+CFLAGS += -DTQM_UART_DEBUG=1
+OBJECTS += tqm_uart.o
+endif
+endif
+ifeq ($(CONFIG_TQM8xxL),y)
+CFLAGS += -DCONFIG_TQM8xxL
+ifeq ($(TQM_UART_DEBUG),yes)
+# To be used when tqm_uart debugging ist used:
+CFLAGS += -DTQM_UART_DEBUG=1
+OBJECTS += tqm_uart.o
+endif
 endif
 ifeq ($(CONFIG_RPXLITE),y)
 CFLAGS += -DCONFIG_RPXLITE
+ diff -u linux-2.2.13/arch/ppc/mbxboot/m8xx_tty.c.ORIG linux-2.2.13/arch/ppc/mbxboot/m8xx_tty.c
--- linux-2.2.13/arch/ppc/mbxboot/m8xx_tty.c.ORIG	Thu Oct 21 00:33:51 1999
+++ linux-2.2.13/arch/ppc/mbxboot/m8xx_tty.c	Sun Jan  9 16:23:24 2000
@@ -9,6 +9,9 @@
  * Later versions (at least 1.4, maybe earlier) of the MBX EPPC-Bug
  * use COM1 instead of SMC1 as the console port.  This kinda sucks
  * for the rest of the kernel, so here we force the use of SMC1 again.
+ *
+ * TQM8xxL uses COM4 (SMC2) for console I/O.
+ *
  */
 #include <linux/config.h>
 #include <linux/types.h>
@@ -22,6 +25,37 @@
 #endif
 
 static cpm8xx_t	*cpmp = (cpm8xx_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
+#ifdef CONFIG_TQM8xxL
+static iop8xx_t *iopp = (iop8xx_t *)&(((immap_t *)IMAP_ADDR)->im_ioport);
+#endif
+
+#ifdef CONFIG_TQM8xxL
+# define SMC_INDEX	1
+# define PROFF_SMCx	PROFF_SMC2
+# define CPM_CR_CH_SMCx	CPM_CR_CH_SMC2
+#else
+# define SMC_INDEX	0
+# define PROFF_SMCx	PROFF_SMC1
+# define CPM_CR_CH_SMCx	CPM_CR_CH_SMC1
+#endif
+
+#if (defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM860))
+static const char const *penguin =
+       "\n\n                   The unleashed power of\n"
+       "        .--.\n"
+       "       |o_o |      LL      IIII   NN   NN   UU   UU   XX   XX\n"
+       "       |:_/ |      LL       II    NNN  NN   UU   UU    XX XX\n"
+       "      //   \\ \\     LL       II    NN N NN   UU   UU     XXX\n"
+       "     (|     | )    LL       II    NN  NNN   UU   UU    XX XX\n"
+       "    /'\\_   _/`\\    LLLLLL  IIII   NN   NN    UUUUU    XX   XX\n"
+       "    \\___)=(___/\n"
+       "                                        ... brought to you by\n\n"
+       "                                    DENX Software Engineering\n"
+       "\n"
+       "Loading Linux...\n"
+       "\n"
+;
+#endif
 
 void
 serial_init(bd_t *bd)
@@ -29,12 +63,14 @@
 	volatile smc_t		*sp;
 	volatile smc_uart_t	*up;
 	volatile cbd_t	*tbdf, *rbdf;
-	volatile cpm8xx_t	*cp;
+	volatile cpm8xx_t	*cp = cpmp;
+#ifdef	CONFIG_TQM8xxL
+	volatile iop8xx_t	*ip = iopp;
+#endif
 	uint	dpaddr, memaddr;
 
-	cp = cpmp;
-	sp = (smc_t*)&(cp->cp_smc[0]);
-	up = (smc_uart_t *)&cp->cp_dparam[PROFF_SMC1];
+	sp = (smc_t*)&(cp->cp_smc[SMC_INDEX]);
+	up = (smc_uart_t *)&cp->cp_dparam[PROFF_SMCx];
 
 	/* Disable transmitter/receiver.
 	*/
@@ -42,27 +78,38 @@
 
 #ifndef CONFIG_MBX
 	{
-	/* Initialize SMC1 and use it for the console port.
+	/* Initialize SMCx and use it for the console port.
 	 */
 
 	/* Enable SDMA.
 	*/
 	((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sdcr = 1;
 
-	/* Use Port B for SMCs instead of other functions.
+#ifdef CONFIG_TQM8xxL
+	/* Use Port A for SMC2 instead of other functions.
 	*/
-	cp->cp_pbpar |= 0x00000cc0;
+	ip->iop_papar |=  0x00c0;
+	ip->iop_padir &= ~0x00c0;
+	ip->iop_paodr &= ~0x00c0;
+#else
+	/* Use Port B for SMC1 instead of other functions.
+	*/
+	cp->cp_pbpar |=  0x00000cc0;
 	cp->cp_pbdir &= ~0x00000cc0;
 	cp->cp_pbodr &= ~0x00000cc0;
+#endif
 
 	/* Allocate space for two buffer descriptors in the DP ram.
 	 * For now, this address seems OK, but it may have to
-	 * change with newer versions of the firmware.
+	 * be changed with newer versions of the firmware.
 	 */
 	dpaddr = 0x0800;
 
 	/* Grab a few bytes from the top of memory.  EPPC-Bug isn't
 	 * running any more, so we can do this.
+	 *
+	 * On the TQM modules, where we don't have EPPC-Bug, we
+	 * already have reserved this memory.
 	 */
 	memaddr = (bd->bi_memsize - 32) & ~15;
 
@@ -95,10 +142,17 @@
 
 	/* Set up the baud rate generator.
 	 * See 8xx_io/commproc.c for details.
+	 *
+	 * Wire BRG1 to SMC1 and BRG2 to SMC2.
 	 */
 	cp->cp_simode = 0x10000000;
+#ifdef CONFIG_TQM8xxL
+	cp->cp_brgc2 =
+#else
 	cp->cp_brgc1 =
-		((((bd->bi_intfreq * 1000000)/16) / bd->bi_baudrate) << 1) | CPM_BRG_EN;
+#endif
+		(((((bd->bi_intfreq * 1000000)/16) / bd->bi_baudrate)-1) << 1)
+		| CPM_BRG_EN;
 
 #else /* CONFIG_MBX */
 	if (*MBX_CSR1 & CSR1_COMEN) {
@@ -159,7 +213,8 @@
 		 */
 		cp->cp_simode = 0x10000000;
 		cp->cp_brgc1 =
-			((((bd->bi_intfreq * 1000000)/16) / 9600) << 1) | CPM_BRG_EN;
+			(((((bd->bi_intfreq * 1000000)/16) / 9600)-1) << 1)
+			| CPM_BRG_EN;
 
 		/* Enable SMC1 for console output.
 		*/
@@ -167,14 +222,14 @@
 	}
 	else {
 #endif /* ndef CONFIG_MBX */
-		/* SMC1 is used as console port.
+		/* SMCx is used as console port.
 		*/
 		tbdf = (cbd_t *)&cp->cp_dpmem[up->smc_tbase];
 		rbdf = (cbd_t *)&cp->cp_dpmem[up->smc_rbase];
 
 		/* Issue a stop transmit, and wait for it.
 		*/
-		cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SMC1,
+		cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SMCx,
 					CPM_CR_STOP_TX) | CPM_CR_FLG;
 		while (cp->cp_cpcr & CPM_CR_FLG);
 	}
@@ -191,12 +246,16 @@
 
 	/* Initialize Tx/Rx parameters.
 	*/
-	cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SMC1, CPM_CR_INIT_TRX) | CPM_CR_FLG;
+	cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SMCx, CPM_CR_INIT_TRX) | CPM_CR_FLG;
 	while (cp->cp_cpcr & CPM_CR_FLG);
 
 	/* Enable transmitter/receiver.
 	*/
 	sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
+
+#if (defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM860))
+	serial_putstr (penguin);
+#endif
 }
 
 void
@@ -206,7 +265,10 @@
 	volatile char		*buf;
 	volatile smc_uart_t	*up;
 
-	up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC1];
+	if (c == '\n')
+		serial_putchar ('\r');
+
+	up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMCx];
 	tbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
 
 	/* Wait for last character to go.
@@ -219,6 +281,28 @@
 	tbdf->cbd_sc |= BD_SC_READY;
 }
 
+void
+serial_putstr (const char *s)
+{
+	while (*s) {
+		serial_putchar (*s++);
+	}
+}
+
+void
+serial_addr (unsigned int addr)
+{
+	char c;
+	int i;
+
+	serial_putchar (' ');
+	for (i=28; i >= 0; i-=4) {
+		c = (addr >> i) & 0x0F;
+		serial_putchar ("0123456789ABCDEF"[c]);
+	}
+	serial_putchar (' ');
+}
+
 char
 serial_getc()
 {
@@ -227,7 +311,7 @@
 	volatile smc_uart_t	*up;
 	char			c;
 
-	up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC1];
+	up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMCx];
 	rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
 
 	/* Wait for character to show up.
@@ -246,7 +330,7 @@
 	volatile cbd_t		*rbdf;
 	volatile smc_uart_t	*up;
 
-	up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC1];
+	up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMCx];
 	rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
 
 	return(!(rbdf->cbd_sc & BD_SC_EMPTY));
+ diff -u linux-2.2.13/arch/ppc/mbxboot/misc.c.ORIG linux-2.2.13/arch/ppc/mbxboot/misc.c
--- linux-2.2.13/arch/ppc/mbxboot/misc.c.ORIG	Thu Oct 21 00:34:37 1999
+++ linux-2.2.13/arch/ppc/mbxboot/misc.c	Sun Jan  9 23:02:05 2000
@@ -18,10 +18,12 @@
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #ifdef CONFIG_8xx
-#include <asm/mpc8xx.h>
+# include <asm/mpc8xx.h>
 #endif
 
+#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)