📄 tqm8xx.patch
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+ * PC 7 0 0 0 - -> ETH-LOOP+ * -------------------------------------+ * PC 8 0 0 1 - CD for Ethernet (SCC2)+ * PC 9 0 0 1 - CTS for Ethernet (SCC2)+ * PC 10 0 0 0 -+ * PC 11 0 0 0 -+ * -------------------------------------+ * PC 12 0 0 0 -+ * PC 13 0 0 0 -+ * PC 14 * * 0 - TENA/RTS for Ethernet on FPS850+ * PC 15 0 0 0 -+ *+ * Note: Using PC14 as RTS2 (TENA) does not work on the TQM850L when+ * used with the starter-kit mainboard; we *must* use PB18 instead.+ * For the FPS850 system, we *must* use PC14 :-( */ + /* The number of Tx and Rx buffers. These are allocated from the page * pool. The code may assume these are power of two, so it is best * to keep them that size. * We don't need to allocate pages for the transmitter. We just use * the skbuffer directly. */+#if (defined (CONFIG_TQM8xxL) || defined (CONFIG_TQM860))+#define CPM_ENET_RX_PAGES 32+#else #define CPM_ENET_RX_PAGES 4+#endif #define CPM_ENET_RX_FRSIZE 2048 #define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE) #define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)+#if (defined (CONFIG_TQM8xxL) || defined (CONFIG_TQM860))+#define TX_RING_SIZE 64 /* Must be power of two */+#define TX_RING_MOD_MASK 63 /* for this to work */+#else #define TX_RING_SIZE 8 /* Must be power of two */ #define TX_RING_MOD_MASK 7 /* for this to work */+#endif /* The CPM stores dest/src/type, data, and checksum for receive packets. */@@ -177,7 +350,7 @@ #ifdef CONFIG_SCC1_ENET #define CPM_CR_ENET CPM_CR_CH_SCC1 #define PROFF_ENET PROFF_SCC1-#define SCC_ENET 0+#define SCC_ENET 0 /* Index, not number! */ #define CPMVEC_ENET CPMVEC_SCC1 #endif @@ -215,8 +388,9 @@ int i; cbd_t *bdp; printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n",- cep->cur_tx, cep->tx_full ? " (full)" : "",- cep->cur_rx);+ (unsigned int)cep->cur_tx,+ cep->tx_full ? " (full)" : "",+ (unsigned int)cep->cur_rx); bdp = cep->tx_bd_base; for (i = 0 ; i < TX_RING_SIZE; i++, bdp++) printk("%04x %04x %08x\n",@@ -752,26 +926,26 @@ /* Configure port A pins for Txd and Rxd. */- immap->im_ioport.iop_papar |= (PA_ENET_RXD | PA_ENET_TXD);+ immap->im_ioport.iop_papar |= (PA_ENET_RXD | PA_ENET_TXD); immap->im_ioport.iop_padir &= ~(PA_ENET_RXD | PA_ENET_TXD);- immap->im_ioport.iop_paodr &= ~PA_ENET_TXD;+ immap->im_ioport.iop_paodr &= ~PA_ENET_TXD; /* Configure port C pins to enable CLSN and RENA. */ immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA); immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);- immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);+ immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA); /* Configure port A for TCLK and RCLK. */- immap->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK);+ immap->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK); immap->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK); /* Configure Serial Interface clock routing. * First, clear all SCC bits to zero, then set the ones we want. */ cp->cp_sicr &= ~SICR_ENET_MASK;- cp->cp_sicr |= SICR_ENET_CLKRT;+ cp->cp_sicr |= SICR_ENET_CLKRT; /* Manual says set SDDR, but I can't find anything with that * name. I think it is a misprint, and should be SDCR. This@@ -849,15 +1023,18 @@ * If we performed a MBX diskless boot, the Ethernet controller * has been initialized and we copy the address out into our * own structure.+ *+ * All other types of boards supply the address in the board+ * information structure, so we copy that into the controller. */ eap = (unsigned char *)&(ep->sen_paddrh);-#ifndef CONFIG_MBX- for (i=5; i>=0; i--)- *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];-#else+#ifdef CONFIG_MBX for (i=5; i>=0; i--) dev->dev_addr[i] = *eap++;-#endif+#else /* ! MBX */+ for (i=5; i>=0; i--)+ *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];+#endif /* CONFIG_MBX */ ep->sen_pper = 0; /* 'cause the book says so */ ep->sen_taddrl = 0; /* temp address (LSB) */@@ -949,9 +1126,19 @@ /* It is now OK to enable the Ethernet transmitter. * Unfortunately, there are board implementation differences here. */-#ifdef CONFIG_MBX- immap->im_ioport.iop_pcpar |= PC_ENET_TENA;+#if (defined (CONFIG_MBX) || defined (CONFIG_TQM860) || defined (CONFIG_FPS850))+ immap->im_ioport.iop_pcpar |= PC_ENET_TENA;+ immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA;+#endif++#if (defined (CONFIG_TQM8xxL) && !defined(CONFIG_FPS850))+# if defined (CONFIG_MPC860)+ immap->im_ioport.iop_pcpar |= PC_ENET_TENA; /* TQM860L */ immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA;+# else+ cp->cp_pbpar |= PB_ENET_TENA;+ cp->cp_pbdir |= PB_ENET_TENA;+# endif #endif #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)+ diff -u linux-2.2.13/arch/ppc/8xx_io/uart.c.ORIG linux-2.2.13/arch/ppc/8xx_io/uart.c--- linux-2.2.13/arch/ppc/8xx_io/uart.c.ORIG Thu Oct 21 00:02:21 1999+++ linux-2.2.13/arch/ppc/8xx_io/uart.c Sun Jan 9 16:16:29 2000@@ -91,15 +91,27 @@ * want the SMC to work as a uart :-).. * The "type" field is currently set to 0, for PORT_UNKNOWN. It is * not currently used. I should probably use it to indicate the port- * type of CMS or SCC.+ * type of SMC or SCC. * The SMCs do not support any modem control signals. */ #define smc_scc_num hub6-#define SCC_NUM_BASE 2 -/* The index into the CPM registers for the first SCC in the table.+/* Define this as 1 if you want SMC2 as a serial port UART managed by this driver.+ * Define this as 0 if you wish to use SMC2 for something else.+ */+#define USE_SMC2 1++/* Define SCC to ttySx mapping. */-#define SCC_IDX_BASE 1+#define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */++/* Define which SCC is the first one to use for a serial port. These+ * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used+ * for Ethernet, and the first available SCC for serial UART is SCC2.+ * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and+ * interrupt vectors in the table below to match.+ */+#define SCC_IDX_BASE 1 /* table index */ /* Processors other than the 860 only get SMCs configured by default. * Either they don't have SCCs or they are allocated somewhere else.@@ -108,13 +120,13 @@ */ static struct serial_state rs_table[] = { /* UART CLK PORT IRQ FLAGS NUM */- { 0, 0, PROFF_SMC1, CPMVEC_SMC1, 0, 0 }, /* SMC1 ttyS0 */-#if 0 /* TDM Sound */- { 0, 0, PROFF_SMC2, CPMVEC_SMC2, 0, 1 }, /* SMC2 ttyS1 */-#endif-#ifdef CONFIG_MPC860- { 0, 0, PROFF_SCC2, CPMVEC_SCC2, 0, 2 }, /* SCC2 ttyS2 */- { 0, 0, PROFF_SCC3, CPMVEC_SCC3, 0, 3 }, /* SCC3 ttyS3 */+#if USE_SMC2+ { 0, 0, PROFF_SMC2, CPMVEC_SMC2, 0, 1 }, /* SMC2 ttyS0 */+#endif+ { 0, 0, PROFF_SMC1, CPMVEC_SMC1, 0, 0 }, /* SMC1 ttyS[01] */+#if defined(CONFIG_MPC860) || defined(CONFIG_MPC860T)+ { 0, 0, PROFF_SCC2, CPMVEC_SCC2, 0, SCC_NUM_BASE }, /* SCC2 ttyS2 */+ { 0, 0, PROFF_SCC3, CPMVEC_SCC3, 0, SCC_NUM_BASE+1 }, /* SCC3 ttyS3 */ #endif }; @@ -2220,7 +2232,7 @@ static kdev_t serial_console_device(struct console *c) {- return MKDEV(TTYAUX_MAJOR, 64 + c->index);+ return MKDEV(TTY_MAJOR, 64 + c->index); } @@ -2296,10 +2308,10 @@ serial_driver.subtype = SERIAL_TYPE_NORMAL; serial_driver.init_termios = tty_std_termios; serial_driver.init_termios.c_cflag =-#ifndef CONFIG_MBX- baud_idx | CS8 | CREAD | HUPCL | CLOCAL;-#else+#ifdef CONFIG_MBX B9600 | CS8 | CREAD | HUPCL | CLOCAL;+#else+ baud_idx | CS8 | CREAD | HUPCL | CLOCAL; #endif serial_driver.flags = TTY_DRIVER_REAL_RAW; serial_driver.refcount = &serial_refcount;@@ -2342,38 +2354,54 @@ panic("Couldn't register callout driver\n"); cp = cpmp; /* Get pointer to Communication Processor */- immap = (immap_t *)IMAP_ADDR; /* and to internal registers */+ asm( "mfspr %0,638": "=r"(immap) : ); /* and to internal registers */ /* Configure SMCs Tx/Rx instead of port B parallel I/O. */-#if 0- cp->cp_pbpar |= 0x00000cc0;+#if USE_SMC2+# ifdef CONFIG_MPC850+ /* This will enable SMC1 and SMC2 Tx/Rx+ */+ immap->im_ioport.iop_papar |= 0x00C0;+ immap->im_ioport.iop_padir &= 0xFF3F;+ immap->im_ioport.iop_paodr &= 0xFF3F;+ cp->cp_pbpar |= 0x000000c0;+ cp->cp_pbdir &= ~0x000000c0;+ cp->cp_pbodr &= ~0x000000c0;+# else+ cp->cp_pbpar |= 0x00000cc0; cp->cp_pbdir &= ~0x00000cc0; cp->cp_pbodr &= ~0x00000cc0;+# endif #else- cp->cp_pbpar |= 0x000000c0;+ /* This will only enable SMC1 if you want SMC2 for something else.+ */+ cp->cp_pbpar |= 0x000000c0; cp->cp_pbdir &= ~0x000000c0; cp->cp_pbodr &= ~0x000000c0;-#endif+#endif /* USE_SMC2 */ /* Configure SCC2 and SCC3 instead of port A parallel I/O.+ *+ * TQM860: SCC2 and SCC3 not (yet) supported XXX XXX+ * TQM850L: SCC2 used for Eth, SCC3 not (yet) supported XXX XXX */-#ifdef CONFIG_MPC860 /* No async serial SCC on 850 */-#ifndef CONFIG_MBX+#if defined(CONFIG_MPC860) || defined(CONFIG_MPC860T)+# ifndef CONFIG_MBX /* The "standard" configuration through the 860. */- immap->im_ioport.iop_papar |= 0x003c;+ immap->im_ioport.iop_papar |= 0x003c; immap->im_ioport.iop_padir &= ~0x003c; immap->im_ioport.iop_paodr &= ~0x003c;-#else+# else /* On the MBX, SCC3 is through Port D. */- immap->im_ioport.iop_papar |= 0x000c; /* SCC2 on port A */+ immap->im_ioport.iop_papar |= 0x000c; /* SCC2 on port A */ immap->im_ioport.iop_padir &= ~0x000c; immap->im_ioport.iop_paodr &= ~0x000c; - immap->im_ioport.iop_pdpar |= 0x0030; /* SCC3 on port D */-#endif+ immap->im_ioport.iop_pdpar |= 0x0030; /* SCC3 on port D */+# endif /* CONFIG_MBX */ /* Since we don't yet do modem control, connect the port C pins * as general purpose I/O. This will assert CTS and CD for the@@ -2387,7 +2415,7 @@ */ cp->cp_sicr &= ~0x00ffff00; cp->cp_sicr |= 0x001b1200;-#endif+#endif /* CONFIG_MPC860, CONFIG_MPC860T */ /* Wire BRG1 to SMC1 and BRG2 to SMC2. */@@ -2626,15 +2654,21 @@ volatile cpm8xx_t *cp; volatile smc_t *sp; volatile smc_uart_t *up;+ volatile immap_t *immap; #ifndef CONFIG_MBX bd_t *bd; bd = (bd_t *)res; - for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)+ for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++) { if (bd->bi_baudrate == baud_table[bidx]) break;+ }+ /* attempt to get useful default */+ if (bidx == (sizeof(baud_table) / sizeof(int))) {+ bidx = 13; /* B9600 */+ } co->cflag = CREAD|CLOCAL|bidx|CS8; baud_idx = bidx;@@ -2655,7 +2689,18 @@ * from dual port ram, and a character buffer area from host mem. */ up = (smc_uart_t *)&cp->cp_dparam[ser->port];- cp->cp_pbpar = 0x00c0; /* Enable SMC1 instead of Port B I/O */+#ifdef CONFIG_TQM8xxL+ asm( "mfspr %0,638": "=r"(immap) : );++ immap->im_ioport.iop_papar |= 0x00c0; /* Enable SMC2 */+ immap->im_ioport.iop_padir &= ~0x00c0;+ immap->im_ioport.iop_paodr &= ~0x00c0;+#else+ cp->cp_pbpar = 0x00c0; /* Enable SMC1 instead of Port B I/O */+# if USE_SMC2+ cp->cp_pbpar |= 0x0c00; /* Enable SMC2 instead of Port B I/O */+# endif+#endif /* Allocate space for two buffer descriptors in the DP ram. */@@ -2693,6 +2738,9 @@ /* Send the CPM an initialize command. */ cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SMC1, CPM_CR_INIT_TRX) | CPM_CR_FLG;+#ifdef USE_SMC2+ cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SMC2, CPM_CR_INIT_TRX) | CPM_CR_FLG;+#endif /* * delay for a bit - this is necessary on my board! * -- Cort+ diff -u linux-2.2.13/arch/ppc/config.in.ORIG linux-2.2.13/arch/ppc/config.in--- linux-2.2.13/arch/ppc/config.in.ORIG Sun Jan 9 16:04:03 2000+++ linux-2.2.13/arch/ppc/config.in Sun Jan 9 16:09:40 2000@@ -28,11 +28,19 @@ CHRP CONFIG_CHRP \ PowerMac/PReP/CHRP CONFIG_ALL_PPC \ APUS CONFIG_APUS \+ TQM8xxL CONFIG_TQM8xxL \+ TQM860 CONFIG_TQM860 \ MBX CONFIG_MBX \ RPXL CONFIG_RPXLITE \ RPXC CONFIG_RPXCLASSIC \ BSE-IP CONFIG_BSEIP" PowerMac +if [ "$CONFIG_TQM8xxL" = "y" -a "$CONFIG_MPC850" = "y" ]; then+ choice 'Type of Mainboard for TQM850L' \+ "STK8xx CONFIG_STK8xx \+ FPS850 CONFIG_FPS850" STK8xx+fi+ bool 'Symmetric multi-processing support' CONFIG_SMP if [ "$CONFIG_ALL_PPC" != "y" ];then define_bool CONFIG_MACH_SPECIFIC y@@ -217,6 +225,10 @@ if [ "$CONFIG_8xx" = "y" ]; then source arch/ppc/8xx_io/Config.in+fi++if [ "$CONFIG_TQM8xxL" = "y" -o "$CONFIG_TQM860" = y ]; then+source arch/ppc/8xx_io/TQM_Config.in fi mainmenu_option next_comment+ diff -u linux-2.2.13/arch/ppc/kernel/head.S.ORIG linux-2.2.13/arch/ppc/kernel/head.S--- linux-2.2.13/arch/ppc/kernel/head.S.ORIG Sat Oct 23 00:18:03 1999+++ linux-2.2.13/arch/ppc/kernel/head.S Sun Jan 9 16:18:04 2000@@ -255,7 +255,7 @@ * call OF any more. */ lis r11,KERNELBASE@h-#ifndef CONFIG_PPC64+# ifndef CONFIG_PPC64 mfspr r9,PVR rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */ cmpi 0,r9,1@@ -269,26 +269,26 @@ mtspr IBAT1U,r9 mtspr IBAT1L,r10 b 5f-#endif /* CONFIG_PPC64 */+# endif /* CONFIG_PPC64 */ 4:-#ifdef CONFIG_APUS+# ifdef CONFIG_APUS ori r11,r11,BL_8M<<2|0x2 /* set up an 8MB mapping */ ori r11,r11,0xfe /* set up an 8MB mapping */ lis r8,CYBERBASEp@h lwz r8,0(r8) addis r8,r8,KERNELBASE@h⌨️ 快捷键说明
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