101c49k.h

基于AM1单片机的一个RS232串口的通讯程序

			unsigned char ACKS    :1;		/*  Bit 1 */
			unsigned char ACK0    :1;		/*  Bit 0 */
		} BIT;
	} CTR;
	unsigned char TRB;					/* SC3TRB */
	char pad0[2];						/* (+2) */
	union {								/* SC3ODC */
		unsigned char BYTE;				/* Byte Access */
		struct {						/* Bit  Access */
			unsigned char         :6;		/*  Bit 7:2 */
			unsigned char ODC1    :1;		/*  Bit 1 */
			unsigned char ODC0    :1;		/*  Bit 0 */
		} BIT;
	} ODC;
	union {								/* SC3CKS */
		unsigned char BYTE;				/* Byte Access */
		struct {						/* Bit  Access */
			unsigned char         :4;		/*  Bit 7:4 */
			unsigned char TMSEL   :1;		/*  Bit 3 (reserved=0, init=X)*/
			unsigned char PSC     :3;		/*  Bit 2:0 */
		} BIT;
	} CKS;
};


/* A/D */
struct st_ad {
	union {								/* ANCTR0 */
		unsigned char BYTE;				/* Byte Access */
		struct {						/* Bit  Access */
			unsigned char SH      :2;		/*  Bit 7:6 */
			unsigned char CK      :2;		/*  Bit 5:4 */
			unsigned char LADE    :1;		/*  Bit 3 */
			unsigned char         :3;		/*  Bit 2:0 */
		} BIT;
	} CTR0;
	union {								/* ANCTR1 */
		unsigned char BYTE;				/* Byte Access */
		struct {						/* Bit  Access */
			unsigned char         :4;		/*  Bit 7:4 */
			unsigned char         :1;		/*  Bit 3 (reserved=0. init=0) */
			unsigned char CHS     :3;		/*  Bit 2:0 */
		} BIT;
	} CTR1;
	union {								/* ANCTR2 */
		unsigned char BYTE;				/* Byte Access */
		struct {						/* Bit  Access */
			unsigned char ST      :1;		/*  Bit 7 */
			unsigned char STSEL   :1;		/*  Bit 6 */
			unsigned char         :6;		/*  Bit 5:0 */
		} BIT;
	} CTR2;
	union {								/* ANBUF */
		unsigned int WORD;				/* Word Access */
		struct {						/* Byte Access */
			unsigned char BUF0;				/*  Byte low */
			unsigned char BUF1;				/*  Byte hi */
		} BYTE;
	} BUF;
};


/* D/A */
struct st_da {
	union {								/* DACTR */
		unsigned char BYTE;				/* Byte Access */
		struct {						/* Bit  Access */
			unsigned char         :2;		/*  Bit 7:6 */
			unsigned char CKS     :2;		/*  Bit 5:4 */
			unsigned char CMD     :3;		/*  Bit 3:1 */
			unsigned char BUSY    :1;		/*  Bit 0 */
		} BIT;
	} CTR;
	unsigned char DR0;					/* DADR0 */
	unsigned char DR1;					/* DADR1 */
	unsigned char DR2;					/* DADR2 */
	unsigned char DR3;					/* DADR3 */
};


/* ROM CORRECTION */
#if MON_RESOURCE
union un_rcctr {					/* RCCTR */
	unsigned char BYTE;				/* Byte Access */
	struct {						/* Bit  Access */
		unsigned char         :5;		/*  Bit 7:3 */
		unsigned char RC2EN   :1;		/*  Bit 2 */
		unsigned char RC1EN   :1;		/*  Bit 1 */
		unsigned char RC0EN   :1;		/*  Bit 0 */
	} BIT;
};

struct st_rc {
	unsigned char APL;					/* RCnAPL */
	unsigned char APM;					/* RCnAPM */
	unsigned char APH;					/* RCnAPH */
};
#endif


/* ATC */
struct st_atc1 {
	union {								/* AT1CNT0 */
		unsigned char BYTE;				/* Byte Access */
		struct {						/* Bit  Access */
			unsigned char FMODE   :1;		/*  Bit 7 */
			unsigned char ACT     :1;		/*  Bit 6 */
			unsigned char MD      :4;		/*  Bit 5:2 */
			unsigned char         :1;		/*  Bit 1 */
			unsigned char EN      :1;		/*  Bit 0 */
		} BIT;
	} CNT0;
	union {								/* AT1CNT1 */
		unsigned char BYTE;				/* Byte Access */
		struct {						/* Bit  Access */
			unsigned char         :3;		/*  Bit 7:5 */
			unsigned char BTSTP   :1;		/*  Bit 4 */
			unsigned char IR      :4;		/*  Bit 3:0 */
		} BIT;
	} CNT1;
	unsigned char TRC;					/* AT1TRC */
	unsigned char MAP0L;					/* AT1MAP0L */
	unsigned char MAP0M;					/* AT1MAP0M */
	unsigned char MAP0H;					/* AT1MAP0H */
	unsigned char MAP1L;					/* AT1MAP1L */
	unsigned char MAP1M;					/* AT1MAP1M */
	unsigned char MAP1H;					/* AT1MAP1H */
};


/* INTERRUPT */
union un_nmicr {					/* NMICR */
	unsigned char BYTE;				/* Byte Access */
	struct {						/* Bit  Access */
		unsigned char         :5;		/*  Bit 7:3 */
		unsigned char PIR     :1;		/*  Bit 2 */
		unsigned char WDIR    :1;		/*  Bit 1 */
		unsigned char         :1;		/*  Bit 0 */
	} BIT;
};

union un_irqicr {					/* IRQnICR */
	unsigned char BYTE;				/* Byte Access */
	struct {						/* Bit  Access */
		unsigned char LV      :2;		/*  Bit 7:6 */
		unsigned char REDG    :1;		/*  Bit 5 */
		unsigned char         :3;		/*  Bit 4:2 */
		unsigned char IE      :1;		/*  Bit 1 */
		unsigned char IR      :1;		/*  Bit 0 */
	} BIT;
};

union un_icr {						/* ICR */
	unsigned char BYTE;				/* Byte Access */
	struct {						/* Bit  Access */
		unsigned char LV      :2;		/*  Bit 7:6 */
		unsigned char         :4;		/*  Bit 5:2 */
		unsigned char IE      :1;		/*  Bit 1 */
		unsigned char IR      :1;		/*  Bit 0 */
	} BIT;
};


struct st_icr {
	union un_nmicr NMICR;			/* NMICR */
	union un_irqicr IRQ0ICR;		/* IRQ0ICR */
	union un_irqicr IRQ1ICR;		/* IRQ1ICR */
	union un_irqicr IRQ2ICR;		/* IRQ2ICR */
	union un_irqicr IRQ3ICR;		/* IRQ3ICR */
	union un_irqicr IRQ4ICR;		/* IRQ4ICR */
	union un_irqicr IRQ5ICR;		/* IRQ5ICR */
	char pad0;						/* (+1) */
	union un_icr TM0ICR;			/* TM0ICR */
	union un_icr TM1ICR;			/* TM1ICR */
	union un_icr TM2ICR;			/* TM2ICR */
	union un_icr TM3ICR;			/* TM3ICR */
	union un_icr TM4ICR;			/* TM4ICR */
	char pad1;						/* (+1) */
	union un_icr TM6ICR;			/* TM6ICR */
	union un_icr TBICR;				/* TBICR */
	union un_icr TM7ICR;			/* TM7ICR */
	union un_icr T7OC2ICR;			/* T7OC2ICR */
	char pad2[2];					/* (+2) */
	union un_icr SC0RICR;			/* SC0RICR */
	union un_icr SC0TICR;			/* SC0TICR */
	union un_icr SC1ICR;			/* SC1ICR */
	union un_icr SC2ICR;			/* SC2ICR */
	union un_icr SC3ICR;			/* SC3ICR */
	union un_icr ADICR;				/* ADICR */
	char pad3;						/* (+1) */
	union un_icr ATC1ICR;			/* ATC1ICR */
};

union un_p4imd {					/* P4IMD */
	unsigned char BYTE;				/* Byte Access */
	struct {						/* Bit  Access */
		unsigned char IRQ4SEL :1;		/*  Bit 7 */
		unsigned char         :3;		/*  Bit 6:4 */
		unsigned char P4KYEN4 :1;		/*  Bit 3 */
		unsigned char P4KYEN3 :1;		/*  Bit 2 */
		unsigned char P4KYEN2 :1;		/*  Bit 1 */
		unsigned char P4KYEN1 :1;		/*  Bit 0 */
	} BIT;
};

union un_nfctr {					/* NFCTR */
	unsigned char BYTE;				/* Byte Access */
	struct {						/* Bit  Access */
		unsigned char P21IM   :1;		/*  Bit 7 */
		unsigned char NF1SCK  :2;		/*  Bit 6:5 */
		unsigned char NF1EN   :1;		/*  Bit 4 */
		unsigned char         :1;		/*  Bit 3 */
		unsigned char NF0SCK  :2;		/*  Bit 2:1 */
		unsigned char NF0EN   :1;		/*  Bit 0 */
	} BIT;
};

union un_edgdt {					/* EDGDT */
	unsigned char BYTE;				/* Byte Access */
	struct {						/* Bit  Access */
		unsigned char         :4;		/*  Bit 7:4 */
		unsigned char EDGSEL3 :1;		/*  Bit 3 */
		unsigned char EDGSEL2 :1;		/*  Bit 2 */
		unsigned char         :2;		/*  Bit 1:0 */
	} BIT;
};



/* CPU */
#define CPUM     (*(volatile union un_cpum     *)0x03f00) /* CPU Mode Register */
#define MEMCTR   (*(volatile union un_memctr   *)0x03f01) /* Memory Control Register */
#define WDCTR    (*(volatile union un_wdctr    *)0x03f02) /* Watch Dog Timer Control Register */
#define DLYCTR   (*(volatile union un_dlyctr   *)0x03f03) /* Delay Control Register for Waiting Oscillator Stability */
#define ACTMD    (*(volatile union un_actmd    *)0x03f06) /* AC Timing Mode Register */
#define SBNKR    (*(volatile union un_sbnkr    *)0x03f0a) /* Source Address Bank Register */
#define DBNKR    (*(volatile union un_dbnkr    *)0x03f0b) /* Destination Address Bank Register */
#define OSCMD    (*(volatile union un_oscmd    *)0x03f0d) /* Oscillator Frequency Mode Register */
#define EXADV    (*(volatile union un_exadv    *)0x03f0e) /* Extend Address Valid Control Register */

/* I/O */
#define P0       (*(volatile struct st_p0      *)0x03f10) /* P0 */
#define P1       (*(volatile struct st_p1      *)0x03f11) /* P1 */
#define P2       (*(volatile struct st_p2      *)0x03f12) /* P2 */
#define st_p3		st_p0
#define P3       (*(volatile struct st_p3      *)0x03f13) /* P3 */
#define P4       (*(volatile struct st_p4      *)0x03f14) /* P4 */
#define P5       (*(volatile struct st_p5      *)0x03f15) /* P5 */
#define st_p6		st_p0
#define P6       (*(volatile struct st_p6      *)0x03f16) /* P6 */
#define st_p7		st_p4
#define P7       (*(volatile struct st_p7      *)0x03f17) /* P7 */
#define st_p8		st_p0
#define P8       (*(volatile struct st_p8      *)0x03f18) /* P8 */
#define PA       (*(volatile struct st_pa      *)0x03f2a) /* PA */
#define PC       (*(volatile struct st_pc      *)0x03f1c) /* PC */
#define PD       (*(volatile struct st_pd      *)0x03f1d) /* PD */
#define FLOAT    (*(volatile union un_float    *)0x03f2e) /* pull-up,down and FLOATing Control Register */

/* TIMER */
#define TM0      (*(volatile struct st_tm0     *)0x03f50) /* Timer 0 Mode Register */
#define TM1      (*(volatile struct st_tm1     *)0x03f51) /* Timer 1 Mode Register */
#define st_tm2		st_tm0
#define TM2      (*(volatile struct st_tm2     *)0x03f58) /* Timer 2 Mode Register */
#define st_tm3		st_tm1
#define TM3      (*(volatile struct st_tm3     *)0x03f59) /* Timer 3 Mode Register */
#define st_tm4		st_tm0
#define TM4      (*(volatile struct st_tm4     *)0x03f60) /* Timer 4 Mode Register */
#define TM6      (*(volatile struct st_tm6     *)0x03f68) /* Timer 6 Mode Register */
#define TM7      (*(volatile struct st_tm7     *)0x03f70) /* Timer 7 Mode Register */
#define RMCTR    (*(volatile union un_rmctr    *)0x03f6e) /* carrier Control Register of Remote Controller */
#define PSCMD    (*(volatile union un_pscmd    *)0x03f6f) /* Pre-scaler Mode */

/* SERIAL PORT */
#define SC0      (*(volatile struct st_sc0     *)0x03f90) /* Serial Port Control 0 */
#define SC1      (*(volatile struct st_sc1     *)0x03f98) /* Serial Port Control 1 */
#if MON_RESOURCE
#define SC2      (*(volatile struct st_sc2     *)0x03fa0) /* Serial Port Control 2 */
#endif
#define SC3      (*(volatile struct st_sc3     *)0x03fa8) /* Serial Port Control 3 */

/* A/D */
#define AD       (*(volatile struct st_ad      *)0x03fb0) /* A/D */

/* D/A */
#define DA       (*(volatile struct st_da      *)0x03fbb) /* D/A */

/* ROM CORRECTION */
#if MON_RESOURCE
#define RCCTR    (*(volatile union un_rcctr    *)0x03f09) /* ROM Correction Control Register */
#define RC0      (*(volatile struct st_rc0     *)0x03fc7) /* ROM Correction 0 */
#define st_rc1		st_rc0
#define RC1      (*(volatile struct st_rc1     *)0x03fca) /* ROM Correction 1 */
#define st_rc2		st_rc0
#define RC2      (*(volatile struct st_rc2     *)0x03fcd) /* ROM Correction 2 */
#endif

/* ATC */
#define ATC1     (*(volatile struct st_atc1    *)0x03fd0) /* ATC1 */

/* INTERRUPT */
#define ICR      (*(volatile struct st_icr     *)0x03fe1) /* Interrupt Control Register */
#define P4IMD    (*(volatile union un_p4imd    *)0x03f3e) /* Port 4 Key Interrupt Mode */
#define NFCTR    (*(volatile union un_nfctr    *)0x03f8e) /* Noise Filter Control Register */
#define EDGDT    (*(volatile union un_edgdt    *)0x03f8f) /* Both Edge Detection Control Register */

#endif		/* _101C49K_H_ */