spi3310.qsf

FPGA模拟SPI接口驱动3310液晶屏的 详细驱动

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
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# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		spi3310_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C5Q208C8
set_global_assignment -name TOP_LEVEL_ENTITY Block1
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "6.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:56:26  DECEMBER 20, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION "6.0 SP1"
set_global_assignment -name GLITCH_DETECTION OFF
set_global_assignment -name END_TIME "50 us"
set_global_assignment -name VECTOR_INPUT_SOURCE "E:\\FPGA\\work\\spi3310\\Waveform1.vwf"
set_global_assignment -name VERILOG_FILE clk.v
set_global_assignment -name VERILOG_FILE spi3310.v
set_global_assignment -name VECTOR_WAVEFORM_FILE spi3310.vwf
set_global_assignment -name VERILOG_FILE main.v
set_global_assignment -name VECTOR_WAVEFORM_FILE main.vwf
set_global_assignment -name BDF_FILE Block1.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform1.vwf
set_location_assignment PIN_132 -to clk
set_location_assignment PIN_144 -to sck
set_location_assignment PIN_142 -to mosi
set_location_assignment PIN_134 -to rst_out
set_location_assignment PIN_137 -to ce
set_location_assignment PIN_139 -to dc