spi3310.smp_dump.txt

FPGA模拟SPI接口驱动3310液晶屏的 详细驱动

State Machine - |Block1|spi3310:inst1|current_state
Name current_state.Idle current_state.CE_L current_state.DC current_state.s0 current_state.s1 current_state.s2 current_state.s3 current_state.s4 current_state.s5 current_state.s6 current_state.s7 current_state.CE_H 
current_state.CE_H 0 0 0 0 0 0 0 0 0 0 0 0 
current_state.s7 0 0 0 0 0 0 0 0 0 0 1 1 
current_state.s6 0 0 0 0 0 0 0 0 0 1 0 1 
current_state.s5 0 0 0 0 0 0 0 0 1 0 0 1 
current_state.s4 0 0 0 0 0 0 0 1 0 0 0 1 
current_state.s3 0 0 0 0 0 0 1 0 0 0 0 1 
current_state.s2 0 0 0 0 0 1 0 0 0 0 0 1 
current_state.s1 0 0 0 0 1 0 0 0 0 0 0 1 
current_state.s0 0 0 0 1 0 0 0 0 0 0 0 1 
current_state.DC 0 0 1 0 0 0 0 0 0 0 0 1 
current_state.CE_L 0 1 0 0 0 0 0 0 0 0 0 1 
current_state.Idle 1 0 0 0 0 0 0 0 0 0 0 1 

State Machine - |Block1|main:inst|current_state
Name current_state.rst_L current_state.rst_H current_state.ce_L current_state.ce_H current_state.s1 current_state.s2 current_state.s3 current_state.s4 current_state.s5 current_state.s6 current_state.s7 current_state.s8 current_state.s9 current_state.d0 current_state.d1 current_state.d2 current_state.d3 current_state.d4 current_state.d5 current_state.d6 current_state.d7 current_state.d8 current_state.d9 current_state.Idle current_state.Empty 
current_state.Idle 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
current_state.d9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 
current_state.d8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 
current_state.d7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 
current_state.d6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 
current_state.d5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 
current_state.d4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 
current_state.d3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 
current_state.d2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 
current_state.d1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 
current_state.d0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 
current_state.s9 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.s8 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.s7 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.s6 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.s5 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.s4 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.s3 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.s2 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.s1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.ce_H 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.ce_L 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.rst_H 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.rst_L 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 
current_state.Empty 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1