spi3310.map.qmsg

FPGA模拟SPI接口驱动3310液晶屏的 详细驱动

{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(60) " "Warning (10235): Verilog HDL Always Construct warning at main.v(60): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 60 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(63) " "Warning (10235): Verilog HDL Always Construct warning at main.v(63): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 63 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(66) " "Warning (10235): Verilog HDL Always Construct warning at main.v(66): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 66 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(69) " "Warning (10235): Verilog HDL Always Construct warning at main.v(69): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 69 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(72) " "Warning (10235): Verilog HDL Always Construct warning at main.v(72): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 72 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(75) " "Warning (10235): Verilog HDL Always Construct warning at main.v(75): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 75 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(78) " "Warning (10235): Verilog HDL Always Construct warning at main.v(78): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 78 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(81) " "Warning (10235): Verilog HDL Always Construct warning at main.v(81): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 81 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(84) " "Warning (10235): Verilog HDL Always Construct warning at main.v(84): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 84 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(87) " "Warning (10235): Verilog HDL Always Construct warning at main.v(87): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 87 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(90) " "Warning (10235): Verilog HDL Always Construct warning at main.v(90): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 90 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(93) " "Warning (10235): Verilog HDL Always Construct warning at main.v(93): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 93 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(96) " "Warning (10235): Verilog HDL Always Construct warning at main.v(96): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 96 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(99) " "Warning (10235): Verilog HDL Always Construct warning at main.v(99): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 99 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(102) " "Warning (10235): Verilog HDL Always Construct warning at main.v(102): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 102 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "i main.v(105) " "Warning (10235): Verilog HDL Always Construct warning at main.v(105): variable \"i\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 105 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Info" "IVRFX_VERI_ALMOST_ONEHOT_CASE_STATEMENT" "main.v(119) " "Info (10264): Verilog HDL Case Statement information at main.v(119): all case item expressions in this case statement are onehot" {  } { { "main.v" "" { Text "E:/FPGA/work/spi3310/main.v" 119 0 0 } }  } 0 10264 "Verilog HDL Case Statement information at %1!s!: all case item expressions in this case statement are onehot" 0 0}