main.v

FPGA模拟SPI接口驱动3310液晶屏的 详细驱动

module main(clk, rst, en_out, data_out, rst_out ,ce_out, cmd_out);
input clk,rst;
output en_out, rst_out, ce_out, cmd_out;
output [7:0] data_out;

reg en_out, rst_out=1, ce_out, cmd_out ;
reg [7:0] data_out;

parameter 	Idle=8'd0,Empty=8'd100,
			rst_L=8'd10, rst_H=8'd11, ce_L=8'd12, ce_H=8'd13, 
			s1=8'd1,s2=8'd2,s3=8'd3,s4=8'd4,s5=8'd5,s6=8'd6,s7=8'd7,s8=8'd8,s9=8'd9,
			d0=8'd20,d1=8'd21,d2=8'd22,d3=8'd23,d4=8'd24,
			d5=8'd25,d6=8'd26,d7=8'd27,d8=8'd28,d9=8'd29;

reg[7:0] current_state;
reg[7:0] next_state;
reg[7:0] last_state;
reg[9:0] i;			

//状态机第一个进程
always @(posedge clk or posedge rst)
if(rst)
begin
current_state <= Idle;
i <= 0;
end
else
begin
i <= i+1;
current_state <= next_state;
end

//状态机第二个进程
always @(current_state)
begin
	case(current_state)
	Idle:
		next_state = rst_L;
	rst_L:
		next_state = rst_H;
	rst_H:
		if(i>3) next_state = ce_L;
		else	next_state = rst_H;
	ce_L:
		if(i>5) next_state = ce_H;
		else	next_state = ce_L;
	ce_H:
		next_state = s1;
	s1:
		if(i>20)next_state = s2;
		else	next_state = s1;
		
	s2:
		if(i>35)next_state = s3;
		else	next_state = s2;
	s3:
		if(i>50)next_state = s4;
		else	next_state = s3;
	s4:
		if(i>65)next_state = s5;
		else	next_state = s4;
	s5:
		if(i>80)next_state = s6;
		else	next_state = s5;
	s6:
		if(i>95)next_state = s7;
		else	next_state = s6;
	s7:
		if(i>110) next_state = s8;
		else	  next_state = s7;
	s8:
		if(i>125) next_state = s9;
		else	  next_state = s8;
	s9:
		if(i>140) next_state = d0;
		else	  next_state = s9;
	d0: 
		if(i>155) next_state = d1;
		else	  next_state = d0;
	d1: 
		if(i>170) next_state = d2;
		else	  next_state = d1;
	d2: 
		if(i>185) next_state = d3;
		else	  next_state = d2;
	d3: 
		if(i>200) next_state = d4;
		else	  next_state = d3;
	d4: 
		if(i>215) next_state = d5;
		else	  next_state = d4;
	d5: 
		if(i>230) next_state = d6;
		else	  next_state = d5;
	d6: 
		if(i>245) next_state = Empty;
		else	  next_state = d6;
	d7: 
		if(i>260) next_state = d8;
		else	  next_state = d7;
	d8: 
		if(i>275) next_state = d9;
		else	  next_state = d8;
	d9: 
		if(i>290) next_state = Empty;
		else	  next_state = d9;
	
	Empty:
		next_state = Empty;
	default:
		next_state = Idle;
	
	endcase
end

//the third 
always @(posedge clk)
begin
	case(next_state)
	Idle:
		begin
		data_out <= 8'b00000000;
		en_out	 <= 0;
		ce_out   <= 1;
		rst_out	 = 1;
		end
	rst_L:
		begin
		rst_out	 = 1;		
		en_out	 <= 0;
		ce_out   <= 1;
		end
	rst_H:
		rst_out	<= 0;
	ce_L:
		begin
		rst_out	<= 1;
		ce_out  <= 0;
		end
	ce_H:
		ce_out  <= 1;
	s1://cmd 0 0x21=0b00100001 // 使用扩展命令设置LCD模式
		begin
		cmd_out <= 0;
		data_out <= 8'b00100001;
		if(i>7)	en_out <= 0;
		else 	en_out <= 1;
		end
	s2://cmd 0 0xc8=0b11001000 // 设置偏置电压
		begin
		cmd_out <= 0;
		data_out <= 8'b11001000;
		if(i>21)en_out <= 0;
		else	en_out <= 1;
		end
	s3://cmd 0 0x06=0b00000110 // 温度校正
		begin
		cmd_out <= 0;
		data_out <= 8'b00000110;
		if(i>36)en_out <= 0;
		else	en_out <= 1;
		
		end
	s4://cmd 0 0x13=0b00010011 // 1:48
		begin
		cmd_out <= 0;
		data_out <= 8'b00010011;
		if(i>51)en_out <= 0;
		else	en_out <= 1;
		end
	s5://cmd 0 0x20=00100000 // 使用基本命令
		begin
		data_out <= 8'b00100000;
		cmd_out <= 0;
		if(i>66)en_out <= 0;
		else	en_out <= 1;
		end
	s6://cmd 0 0x0c=00001100// 清屏1
		begin
		cmd_out <= 0;
		data_out <= 8'b00001100;
		if(i>81)en_out <= 0;
		else	en_out <= 1;
		end
	s7://cmd 0 0x80=0b10000000 //清屏2
		begin
		cmd_out <= 0;
		data_out <= 8'b10000000;
		if(i>96)en_out <= 0;
		else	en_out <= 1;
		end
	s8://cmd 1 0xff 写入一点测试数据
		begin
		cmd_out <= 1;
		data_out <= 8'b00011111;
		if(i>111)en_out <= 0;
		else	en_out <= 1;
		end
	
	s9://cmd 1 
		begin
		cmd_out <= 1;
		data_out <= 8'b00000101;
		if(i>126)en_out <= 0;
		else	en_out <= 1;
		end
		
	d0://cmd 1 
		begin
		cmd_out <= 1;
		data_out <= 8'b00000111;
		if(i>141)en_out <= 0;
		else	en_out <= 1;
		end
	
	d1://cmd 1 
		begin
		cmd_out <= 1;
		data_out <= 8'b00000000;
		if(i>156)en_out <= 0;
		else	en_out <= 1;
		end	
	
	d2://cmd 1 
		begin
		cmd_out <= 1;
		data_out <= 8'b00011111;
		if(i>171)en_out <= 0;
		else	en_out <= 1;
		end
	
	d3://cmd 1 
		begin
		cmd_out <= 1;
		data_out <= 8'b00000100;
		if(i>186)en_out <= 0;
		else	en_out <= 1;
		end
	
	d4://cmd 1 
		begin
		cmd_out <= 1;
		data_out <= 8'b00000100;
		if(i>201)en_out <= 0;
		else	en_out <= 1;
		end
		
	d5://cmd 1 
		begin
		cmd_out <= 1;
		data_out <= 8'b00011111;
		if(i>216)en_out <= 0;
		else	en_out <= 1;
		end
	

	
	d6://cmd 0 0x0c=0b00001100 // 设定显示模式，显示
		begin
		cmd_out <= 0;
		data_out <= 8'b00001100;
		if(i>231)en_out <= 0;
		else	en_out <= 1;
		end
	
	Empty:
		begin
		ce_out <= 0;
		en_out <= 0;
		end 
	default :
		begin
		en_out <= 0;
		rst_out = 1;
		end
	
	endcase
end

endmodule