spi3310.fit.summary

来自「FPGA模拟SPI接口驱动3310液晶屏的 详细驱动」· SUMMARY 代码 · 共 15 行

Fitter Status : Successful - Sat Dec 22 18:18:54 2007
Quartus II Version : 6.0 Build 202 06/20/2006 SP 1 SJ Full Version
Revision Name : spi3310
Top-level Entity Name : Block1
Family : Cyclone II
Device : EP2C5Q208C8
Timing Models : Final
Total logic elements : 201 / 4,608 ( 4 % )
Total registers : 92
Total pins : 6 / 142 ( 4 % )
Total virtual pins : 0
Total memory bits : 0 / 119,808 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )