spi3310.map.summary

来自「FPGA模拟SPI接口驱动3310液晶屏的 详细驱动」· SUMMARY 代码 · 共 13 行

Analysis & Synthesis Status : Successful - Sat Dec 22 18:18:42 2007
Quartus II Version : 6.0 Build 202 06/20/2006 SP 1 SJ Full Version
Revision Name : spi3310
Top-level Entity Name : Block1
Family : Cyclone II
Total logic elements : 197
Total registers : 92
Total pins : 6
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0