⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 l4.h

📁 这同样是FS8610相关的代码.看起来不错啊.
💻 H
📖 第 1 页 / 共 3 页
字号:
#define IGMPV2_SP         0x40
#define	IGMP_MUX          0x20
#define IGMP_MAC_TCIA     0x10
#define IGMP_ETHERPKT     0x08
#define IGMP_QTAG_EN      0x04
#define IGMP_PPPOE_EN     0x02
#define IGMP_IP_LBKEN     0x01

/* IGMP Group Control                                  */
#define JN_GP3            0x80
#define JN_GP2            0x40
#define JN_GP1            0x20
#define JN_GP0            0x10
#define LV_GP3            0x08
#define LV_GP2            0x04
#define LV_GP1            0x02
#define LV_GP0            0x01

/* IGMP Group Status                                    */
#define GP3_STS           0x08
#define GP2_STS           0x04
#define GP1_STS           0x02
#define GP0_STS           0x01

/* Socket Layer */
/* Socket n TX Descriptor Control/Status                 */
#define SOCK_TDSC_RC      0x80
#define SOCK_TXOK         0x01

/* Socket n UDP Command(for UDP only)                     */
#define UDP_ASU           0x20
#define UDP_AAU           0x10
#define UDP_AM            0x08
#define UDP_AB            0x04
#define UDP_AAP           0x01

/* Socket n TCP Retransmission Control(for TCP only)      */
#define TCP_TMINI_MASK    0xe0
#define TCP_TMINI_SHIFT   0x05
#define TCP_RTIE          0x10
#define TCP_FRE           0x02

/* Socket n TCP Retransmission Counter(for TCP only)       */
#define TCP_RTR1_MASK     0xf0
#define TCP_RTR1_SHIFT    0x04
#define TCP_RTR2_MASK     0x0f
#define TCP_RTR2_SHIFT    0x00

/* Socket n TCP Delayed ACK Control(for TCP only)          */
#define TCP_DACKE         0x80
#define TCP_DACKT_MASK    0x60
#define TCP_DACKT_100MS   0x00
#define TCP_DACKT_200MS   0x20
#define TCP_DACKT_300MS   0x40
#define TCP_DACKT_400MS   0x60
#define TCP_PRBC_MASK     0x1E
#define TCP_PRBC_SHIFT    0x01
#define TCP_DFEN          0x01

/* Socket n TCP Persist Timer & 2MSL(for TCP only)         */
#define TCP_PERINI_MASK   0xe0
#define TCP_PERINI_SHIFT  0x05
#define TCP_2MSL_MASK        0x18
#define TCP_2MSL_1MIN     0x00
#define TCP_2MSL_2MIN     0x08
#define TCP_2MSL_3MIN     0x10
#define TCP_2MSL_4MIN     0x18

/* Socket n Channel Control 0                              */
#define SOCK_CE           0x80
#define SOCK_TXEN         0x40
#define SOCK_RXEN         0x20
#define SOCK_PTL          0x10
#define CH_COFGMD         0x08
#define JN_GPADDV         0x04
#define JN_GPADD_MASK     0x03
#define JN_GPADD_0        0x00
#define JN_GPADD_1        0x01
#define JN_GPADD_2        0x02
#define JN_GPADD_3        0x03

/* Socket n Channel Control 1                              */
#define RF_DISE           0x80
#define UDP_TF_ABT        0x40
#define TCP_MAC_TCIA      0x20
#define TCP_ETHERPKT      0x10
#define TCP_QTAG_EN       0x08
#define TCP_PPPOE_EN      0x04
#define TCP_CH_TCIA       0x02
#define TCP_IP_LBKEN      0x01
 
/* Socket n TCP Command                                     */
#define TCP_CMD_MASK         0x07
#define TCP_CMD_IDLE         0x00
#define TCP_CMD_OPEN         0x01
#define TCP_CMD_LISTEN       0x02
#define TCP_CMD_CONNECT      0x03
#define TCP_CMD_DISCONNECT   0x04
#define TCP_CMD_CLOSE        0x05
#define TCP_CMD_RESET        0x06

/* Socket n TCP State Machine Status 0(Hardware Debug)      */
#define TCP_CLOSED        0x80
#define TCP_OPEND         0x40
#define TCP_LISTEN        0x20
#define TCP_SYNCS         0x10
#define TCP_SYNCR         0x08
#define TCP_EST           0x04
#define TCP_WAIT1         0x02
#define TCP_WAIT2         0x01

/* Socket n TCP State Machine Status 1                       */
#define TCP_CLOSING       0x80
#define TCP_TM_WT         0x40
#define TCP_CLS_W         0x20
#define TCP_LASTACK       0x10

#define CUR_TCPST_MASK       0x0f
#define CUR_TCPST_SHIFT      0x00
#define CUR_TCPST_CLOSED     0x00
#define CUR_TCPST_OPENED     0x01
#define CUR_TCPST_LISTEN     0x02
#define CUR_TCPST_SYNCS      0x03
#define CUR_TCPST_SYNCR      0x04
#define CUR_TCPST_EST        0x05
#define CUR_TCPST_WAIT1      0x06
#define CUR_TCPST_WAIT2      0x07
#define CUR_TCPST_CLOSING    0x08
#define CUR_TCPST_TM_WT      0x09
#define CUR_TCPST_CLS_W      0x0A
#define CUR_TCPST_LASTACK    0x0B

/* Socket n TCP Retransmission/Event Interrupt Enable         */
#define SOCK_ESTE         0x40
#define SOCK_CLSE         0x20
#define SOCK_RFE          0x10
#define SOCK_RRE          0x08
#define SOCK_RUE          0x04
#define SOCK_R2TOE        0x02
#define SOCK_R1OVE        0x01

/* Socket n TCP Retransmission/Event Interrupt Status         */
#define SOCK_EST          0x40
#define SOCK_CLS          0x20
#define SOCK_RF           0x10
#define SOCK_RR           0x08
#define SOCK_RU           0x04
#define SOCK_R2TO         0x02
#define SOCK_R1OV         0x01

/* Socket n TX Flag(Hardware Debug)                           */
#define SOCK_TXURG        0x20
#define SOCK_TXACK        0x10
#define SOCK_TXPSH        0x08
#define SOCK_TXRST        0x04
#define SOCK_TXSYN        0x02
#define SOCK_TXFIN        0x01

/* Socket n RX Flag(Hardware Debug)                           */
#define SOCK_RXURG        0x20
#define SOCK_RXACK        0x10
#define SOCK_RXPSH        0x08
#define SOCK_RXRST        0x04
#define SOCK_RXSYN        0x02
#define SOCK_RXFIN        0x01 

/* PPPoE Layer */
/* PPPoE TX Descriptor Control/Status                          */
#define PPPOE_TDSC_RC     0x80
#define PPPOE_TXOK        0x01

/* PPPoE Channel Control                                       */
#define PPPOE_CE              0x80
#define PPPOE_TXEN            0x40
#define PPPOE_RXEN            0x20
#define PPPOE_STG_MASK        0x1c
#define PPPOE_STG_DISCOVERY   0x00
#define PPPOE_STG_LCP         0x04
#define PPPOE_STG_AUTH        0x08
#define PPPOE_STG_NCP         0x0C
#define PPPOE_STG_TERMINATE	  0x10
#define PPPOE_RF_DISE         0x02
#define PPPOE_CC 			0x01

/* PPPoE Retransmit Control                                    */
#define PPPOE_TV_MASK     0xf0
#define PPPOE_TV_SHIFT    4
#define PPPOE_RCNT_MASK   0x0e
#define PPPOE_RCNT_SHIFT  1
#define PPPOE_RTE         0x01

/* PPPoE Timeout Status     */
#define IPCP_TO		0x10
#define CHAP_TO           0x08
#define PAP_TO            0x04
#define PADS_TO           0x02
#define PADO_TO           0x01

/* MIB Status */
/* MIB Control/Status 0(Hardware Debug)                         */
#define FAC               0x80
#define CAC               0x40
#define RX_OF             0x20
#define RX_UPF            0x10
#define RX_NPF            0x08
#define RX_DPF            0x04
#define RX_EPF            0x02
#define RX_CEPF           0x01

/* MIB Status 1(Hardware Debug)                                  */
#define RX_AEPF           0x80
#define RX_IPEPF          0x40
#define RX_ICEPF          0x20
#define RX_IGEPF          0x10
#define RX_TCPEPF         0x08
#define RX_UDPEPF         0x04
#define RX_DISIPF         0x02
#define RX_DISPPPF        0x01

/* MIB Status 2(Hardware Debug)                                  */
#define TX_OF             0x80
#define TX_UPF            0x40
#define TX_NPF            0x20


/* L4 TX_Descriptor & RX_Descriptor Defination */
struct tx_descriptor_t
{                             
    UINT8 macctrl_lenl;       /* CH_TDSC00 */
    UINT8 ip_lb_lenh;         /* CH_TDSC01 */
    UINT8 pkttype_ctrl;       /* CH_TDSC02 */
    UINT8 protocol_ctrl;      /* CH_TDSC03 */
    UINT8 tcp_ctrl;           /* CH_TDSC04 */
    UINT8 pppoe_ctrl;         /* CH_TDSC05 */
    UINT8 tos_lnurg0;         /* CH_TDSC06 */
    UINT8 ttl_lnurg1;         /* CH_TDSC07 */
    UINT8 icmp_dip0;          /* CH_TDSC08 */
    UINT8 icmp_dip1;          /* CH_TDSC09 */
    UINT8 icmp_dip2;          /* CH_TDSC10 */
    UINT8 icmp_dip3;          /* CH_TDSC11 */
    UINT8 udp_dp0;            /* CH_TDSC12 */
    UINT8 udp_dp1;            /* CH_TDSC13 */
    UINT8 udp_ck0;            /* CH_TDSC14 */
    UINT8 udp_ck1;            /* CH_TDSC15 */
};

struct rx_descriptor_t
{
    UINT8 error_type;         /* CH_RDSC00 */
    UINT8 link_type;          /* CH_RDSC01 */
    UINT8 payload_lenl;       /* CH_RDSC02 */
    UINT8 pkt_type_lenh;      /* CH_RDSC03 */
    UINT8 address_type;       /* CH_RDSC04 */
    UINT8 ip_tcp_flag;        /* CH_RDSC05 */
    UINT8 ip_tcp_opt;         /* CH_RDSC06 */
    UINT8 ip_tos;             /* CH_RDSC07 */
    UINT8 type_tcp_up0;       /* CH_RDSC08 */
    UINT8 code_tcp_up1;       /* CH_RDSC09 */
    UINT8 udp_rsp0;           /* CH_RDSC10 */
    UINT8 udp_rsp1;           /* CH_RDSC11 */
    UINT8 udp_rsip0;          /* CH_RDSC12 */
    UINT8 udp_rsip1;          /* CH_RDSC13 */
    UINT8 udp_rsip2;          /* CH_RDSC14 */
    UINT8 udp_rsip3;          /* CH_RDSC15 */
};

/* L4 Channel TX Descriptor Bit Defination */
/* CH_TDSC00 */
#define TXD_TXPL_BCL_MASK      0xf0
#define TXD_TXPL_BCL_SHIFT     0x04
#define TXD_MAC_TCIA           0x08
#define TXD_MAC_TAC            0x01

/* CH_TDSC01 */
#define TXD_IP_LBKEN           0x80
#define TXD_TXPL_BCH_MASK      0x7F
#define TXD_TXPL_BCH_SHIFT     0x04

/* CH_TDSC02 */
#define TXD_DSC_IDX_SIG        0x00
#define TXD_DSC_IDX_FST        0x40
#define TXD_DSC_IDX_MID        0x80
#define TXD_DSC_IDX_LST        0xC0
#define TXD_ETHERPKT           0x20
#define TXD_QTAG_EN            0x10
#define TXD_PPPOE_EN           0x08
#define TXD_CH_TCIA            0x04
#define TXD_CH_TAC             0x02

/* CH_TDSC03 */
#define TXD_IP_PTL_ICMP        0x00
#define TXD_IP_PTL_IGMP        0x40
#define TXD_IP_PTL_TCP         0x80   
#define TXD_IP_PTL_UDP         0xC0
#define TXD_IP_OPTVLD          0x20
#define TXD_TCP_OPTVLD         0x10   //????????????????????????
#define TXD_IP_OPTLN_MASK      0x0F
#define TXD_IP_OPTLN_SHIFT     0x00

/* CH_TDSC04 */
#define TXD_TCP_OPTLN_MASK     0xF0    //?????????????????????
#define TXD_TCP_OPTLN_SHIFT    0x04    //?????????????????????
#define TXD_TCP_URGA           0x08
#define TXD_TCP_PSHA           0x02

/* CH_TDSC05 */
#define TXD_PPPOE_PADI         0x80
#define TXD_PPPOE_PADR         0x40
#define TXD_PPPOE_PADT         0x20
#define TXD_PPPOE_PAP          0x10
#define TXD_PPPOE_CHAP         0x08
#define TXD_PPPOE_LCP_REQ    0x04
#define TXD_PPPOE_LCP_TERMINATE 0x02
#define TXD_PPPOE_NCP_REQ  0x01

/* CH_TDSC06 ~ CH_TDSC15 */


/* L4 RX Descriptor Bit Defination */
/* CH_RDSC00 */
#define RXD_VTP                0x80
#define RXD_VTR                0x40
#define RXD_PTL                0x20
#define RXD_RP                 0x10
#define RXD_AE                 0x08
#define RXD_CRCE               0x04
#define RXD_CH_RXOK            0x02
#define RXD_CH_RAC             0x01

/* CH_RDSC01 */
#define RXD_ETHERPKT           0x80
#define RXD_PPPOE_PKT          0x40
#define RXD_PPPOE_PT_PADO      0x00
#define RXD_PPPOE_PT_PADS      0x04
#define RXD_PPPOE_PT_PADT      0x08
#define RXD_PPPOE_PT_LCP       0x0C
#define RXD_PPPOE_PT_LQR       0x10
#define RXD_PPPOE_PT_PAPACK    0x14
#define RXD_PPPOE_PT_PAPNAK    0x18
#define RXD_PPPOE_PT_CHAPCHAG  0x1C
#define RXD_PPPOE_PT_CHAPSUCS  0x20
#define RXD_PPPOE_PT_CHAPFAIL  0x24
#define RXD_PPPOE_PT_NCP       0x28
#define RXD_PPPOE_PT_IP        0x2C
#define RXD_ARP_PKT            0x02
#define RXD_RARP_PKT           0X01

/* CH_RDSC02 */
#define RXD_RXPL_BCL_MASK      0xFF
#define RXD_RXPL_BCL_SHIFT     0x00

/* CH_RDSC03 */
#define RXD_IP_PKT             0x80
#define RXD_ICMP_PKT           0x40
#define RXD_IGMP_PKT           0x20
#define RXD_TCP_PKT            0x10
#define RXD_UDP_PKT            0x08
#define RXD_RXPL_BCH_MASK      0x07
#define RXD_RXPL_BCH_SHIFT     0x00

/* CH_RDSC04 */
#define RXD_MAC_BP             0x80
#define RXD_MAC_MP             0x40
#define RXD_MAC_DP             0x20
#define RXD_IP_BP              0x10
#define RXD_IP_MP              0x08
#define RXD_IP_DP              0x04
#define RXD_IP_LB              0x02
#define RXD_IP_FRAG            0x01

/* CH_RDSC05 */
#define RXD_IP_PTLUR           0x80
#define RXD_TUP_PTUR           0x40
#define RXD_TCP_UF             0x20
#define RXD_TCP_PF             0x10
#define RXD_TCP_RF             0x08    //??????????????????
#define RXD_IP_OPTVLD          0x02
#define RXD_TCP_OPTVLD         0x01

/* CH_RDSC06 */
#define RXD_IP_OPTLN_MASK      0xF0
#define RXD_IP_OPTLN_SHIFT     0x04
#define RXD_TCP_OPTLN_MASK     0x0F
#define RXD_TCP_OPTLN_SHIFT    0x00

/* CH_RDSC07~CHRDSC15 */

#define GET_GLB_INT_STATUS()    inb(SYS_GLBINTSTAT)
/// @endcond

#endif /* __L4_H__ */

/** @} */

/** @} */

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -