ics_554_test.c

软件无线电的平台

/***************************************************************************
             ics_554_test.c  -  ICS-564 test-functions
                            -------------------
    begin                :  2003
    authors              :  Linus Gasser
    emails               :  [e-mail]
 ***************************************************************************/

/***************************************************************************
                                 Changes
                                 -------
 date - name - description
 03-09-25 - ineiti - create
 
 **************************************************************************/

/***************************************************************************
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 ***************************************************************************/

#include <rtl_debug.h>
#include <linux/pci.h>
#include <math.h>
#include <time.h>
#include "system.h"
#include "ics_554.h"
#include "ql_5064.h"
#include "debugging.h"
#include "memory.h"
#include "std.h"
#include "filters.h"
#include "antenna.h"
#include "ics_helper.h"

#define DBG_LVL 0

int test_554_loop;
swr_ant_param_t board_params_554[ ADA_PER_BOARD ];


// Captures some data at the full rate
void *test_capture( void *arg ){
  struct ics_dev *board = arg;
  short count;

  board->params[0]->addr_rx = swr_malloc( 32768 * sizeof(u32) );
  if ( board->params[0]->addr_rx == NULL ){
    PR_DBG( 0, "Unable to allocate memory for board->data\n");
  }

  ics554_board_reset( board, 0x3, 0x3 );
  ics554_capture( board, 0xfff );
  ics554_fifo_size( board, 0, 0xf801 );
  ics554_adc_reset( board );
  ics554_enable( board, 1, 1 );

  ics554_trigger( board );
  
  PR_DBG(0, "Status: %8x\n", READ_ICS554_U32( board, STATUS ) ); 
  rtl_udelay( 100000 );  
  PR_DBG(0, "Status after: %8x\n", READ_ICS554_U32( board, STATUS ) ); 

  adc_start_dma(board,0,board->params[0]->addr_rx,1024 * 4);
  rtl_udelay( 100000 );  

  for( count = 0; count < 16; count++){
    u32 *d = board->params[0]->addr_rx;
    short int val;
    val = d[count] & 0xffff;
    PR_DBG(0,"Data[%4x] = %6hi \n", 2 * count, val / 4 );
    val = d[count] >> 16;
    PR_DBG(0,"Data[%4x] = %6hi \n", 2 * count + 1, val / 4 );
    rtl_udelay( 1000 );
  }

  swr_free( board->params[0]->addr_rx );

  return NULL;
}


// Captures some data and uses the interrupt-cond-vars to show off
void *test_capture_int( void *arg ){
  struct ics_dev *board = arg;
  short count, line, i;
  s16 *d;

  board->flags |= ICS554_INT_BROADCAST;
  // Get some data-space
  board->params[0]->addr_rx = swr_malloc( 32768 * sizeof(u32) );
  if ( board->params[0]->addr_rx == NULL ){
    PR_DBG( 0, "Unable to allocate memory for board->data\n");
  }

  // Reset the board
  ics554_board_reset( board, 0, 0x3 );
  ics554_capture( board, 0xfff );
  ics554_fifo_size( board, 0, 0xf801 );

  // Let's do it once every 200ms
  pthread_make_periodic_np( pthread_self(), gethrtime(), 1000*1000*200 );
  for ( i=0; (i<1000)&&test_554_loop; i++ ){

    // Everytime we have to reset and enable
    ics554_adc_reset( board );
    ics554_enable( board, 1, 1 );

    // Prepare the interrupt and trigger the ADC
    pthread_mutex_lock( &int_554_mutex );
    ics554_trigger( board );
    pthread_cond_wait( &int_554_cond, &int_554_mutex );

    // ADC finished, now do the DMA
    adc_start_dma(board,0,board->params[0]->addr_rx,4096 * 4);
    pthread_cond_wait( &int_554_cond, &int_554_mutex );
    pthread_mutex_unlock( &int_554_mutex );

    // Show what we got from the DMA
#define MULT 2
    d = (s16*)board->params[0]->addr_rx;
    for( count = 0; count < 32 * MULT; count+=MULT){
      PR_DBG(0,"Data[%4x..%4x] = ", count, count + 3 );
      for ( line=0; line<MULT; line++ ){
	PR_DBG_CL( 0, "%5li ", d[count + line] / 4 );
      }
      PR_DBG_CL( 0, "\n" );
      // Wait a bit so that the syslogger can do it's job
      rtl_udelay( 200 );
    }

    // Wait for next period
    pthread_wait_np();
  }

  swr_free( board->params[0]->addr_rx );
  return NULL;
}


// Captures some data and uses the interrupt-cond-vars to show off
void *test_capture_bichannel( void *arg ){
  struct ics_dev *board = arg;
  int ddc, channel, i, block_size = 0x1000;

  // Get some data-space
  board->params[0]->addr_rx = swr_malloc( 32768 * sizeof(u32) );
  if ( board->params[0]->addr_rx == NULL ){
    PR_DBG( 0, "Unable to allocate memory for board->data\n");
  }

  // Reset the board
  ics554_board_reset( board, 0, 0x3 );
  ics554_capture( board, block_size - 1 );
  ics554_fifo_size( board, 0, 0x10000 - block_size - 2 );
  ics554_decimation( board, 0 );

  // Setup the DDCs
  ics554_channel_count( board, 15, 0 );
  ics554_ddc_enable( board, 1 );
  
  // Let's do it once every 200ms
  for ( i=0; (i<1000)&&test_554_loop; i++ ){

    for ( ddc=1; ddc>=0; ddc-- ){
      ics554_ddc_select( board, ddc );
    
      // Setup the channels of the DDC
      for ( channel = 0; channel < 4; channel++ ){
	ics554_ddc_set_channel( board, channel, 0,
				2, cfir_80, pfir_80, 
				channel%2 ? 0xc000:0, 30 + 0 * ddc,8,0 );
      }
    
      ics554_ddc_finalize( board, 2, res_9x32_60, 2 );
    
      // Clean the DDC-selection
      ics554_ddc_deselect( board );
    
    }
    // Everytime we have to reset and enable
    ics554_adc_reset( board );
    ics554_enable( board, 1, 1 );

    ics554_trigger( board );
    PR_DBG(0, "Status:       %8x\n", ics554_status( board ) );
    rtl_udelay( 10000 );
    PR_DBG(0, "Status After: %8x\n", ics554_status( board ) );

    adc_start_dma(board,0,board->params[0]->addr_rx,4096 * 4);
    PR_DBG(0, "Status:       %8x\n", ics554_status( board ) );
    rtl_udelay( 10000 );
    PR_DBG(0, "Status After: %8x\n", ics554_status( board ) );

    PR_DBG( 0, "\n********************\n\n" );
    // Show what we got from the DMA
    {
      s32 *d32, count;
      // Show what we got from the DMA
      for ( ddc = 0; ddc < 2; ddc++ ){
	d32 = (s32*)board->params[ddc / 2]->addr_rx;
	PR_DBG( 0, "DDC %i gives\n", ddc );
	for( count = 0; count < 8; count++){
	  int re, im;
	  int index = ( ddc % 2 ) * 8 + 
	    count * 2 + ( ( count / 4 ) * 8 );
	  re = d32[ index ] >> 8;
	  im = d32[ index + 1 ] >> 8;
	  PR_DBG(0,"Data[%4x] = %8i, %8i = |%8i|\n", count,
		 re, im, (int)hypot( re, im ) );
	  // Wait a bit so that the syslogger can do it's job
	  rtl_udelay( 50 );
	}
      }
#if 0
      for ( ddc=1, count = 0; count < block_size; count++ ){
	int re, im;
	int index = ( ddc % 2 ) * 8 + 
	  count * 2 + ( ( count / 4 ) * 8 );
	re = d32[ index ] >> 8;
	im = d32[ index + 1 ] >> 8;
	if ( ( re == -1 ) || ( im == -1 ) ){
	  PR_DBG_CL( 0, "%4x ", count );
	  rtl_udelay( 50 );
	}
      }
      PR_DBG_CL( 0, "\n" );
#endif
    }

    // Wait for next period
    pthread_make_periodic_np( pthread_self(), gethrtime(), 1000*1000*200 );
    pthread_wait_np();
  }

  swr_free( board->params[0]->addr_rx );
  return NULL;
}


void *test_thread( void *arg ){
  struct sched_param p;
  p.sched_priority=100;
  pthread_setschedparam ( pthread_self(), SCHED_FIFO, &p);

  PR_DBG( 0, "Setting up periodicity, %i\n", pthread_self()->magic );
  pthread_make_periodic_np( pthread_self(), gethrtime(), 1*1000*1000 );
  PR_DBG( 0, "Waiting one period at %x\n", (u32)gethrtime() );
  pthread_wait_np();
  PR_DBG( 0, "Finished waiting at %x\n", (u32)gethrtime() );
  return NULL;
}



// Captures some data at the full rate and downconverts using the 
// graychip
void *test_down_gray_simple( void *arg ){
  struct ics_dev *board = arg;
  short count, i;
  short channel, ddc;
  s32 *d32, freq;
  struct timespec tp;

  board->flags |= ICS554_INT_BROADCAST;
  // Get some data-space
  board->params[0]->addr_rx = swr_malloc( 32768 * sizeof(u32) );
  if ( board->params[0]->addr_rx == NULL ){
    PR_DBG( 0, "Unable to allocate memory for board->data\n");
    return 0;
  }

  // Reset the board
  ics554_board_reset( board, 0, 0x3 );
  ics554_capture( board, 0x8000 );
  ics554_fifo_size( board, 0, 0xf800 );
  ics554_decimation( board, 0 );

  // Setup the DDCs
  ics554_channel_count( board, 15, 15 );
  ics554_ddc_enable( board, 1 );
  
  for ( ddc=0; ddc<2; ddc++ ){
    ics554_ddc_select( board, ddc );
    
    // Setup the channels of the DDC
    for ( channel = 0; channel < 4; channel++ ){
      freq = 10 + channel * 2;
      PR_DBG( 0, "Frequency for channel %i: %i\n", channel, freq );
      ics554_ddc_set_channel( board, channel, ddc,
			      3, cfir_17, pfir_17, 0, freq ,8,0);
    }

    ics554_ddc_finalize( board, 3, res_empty, 3 );
  }

  // Reset all other DDCs to 0
  for ( ddc=2; ddc<4; ddc++ ){
    ics554_ddc_select( board, ddc );
    for ( channel = 0; channel < 4; channel++ ){
      wr_ddc_page( channel * 8, 16, 0x80 );
    }
    ics554_ddc_finalize( board, 0, 0, 0 );
  }

  // Clean the DDC-selection
  ics554_ddc_deselect( board );

  // Let's do it once every second
  pthread_make_periodic_np( pthread_self(), gethrtime(), 1000*1000*500 );
  for ( i=0; (i<1000)&&test_554_loop; i++ ){

    // Everytime we have to reset and enable
    ics554_adc_reset( board );
    ics554_enable( board, 1, 1 );

    PR_DBG( 0, "Status: %x\n", ics554_status( board ) );

    // Prepare the interrupt and trigger the ADC
    pthread_mutex_lock( &int_554_mutex );
    PR_DBG( 0, "waiting for adc\n" );
    clock_gettime( CLOCK_REALTIME, &tp );
    tp.tv_sec+=2;
    ics554_trigger( board );

    if ( pthread_cond_timedwait( &int_554_cond, &int_554_mutex, &tp ) ){
      PR_DBG( 0, "Time-out while waiting for the ADC...\n" );
      pthread_mutex_unlock( &int_554_mutex );
      return 0;
    }

    PR_DBG( 0, "Status: %x\n", ics554_status( board ) );

    // ADC finished, now do the DMA
    PR_DBG( 0, "waiting for dma\n" );
    clock_gettime( CLOCK_REALTIME, &tp );
    tp.tv_sec+=2;

    adc_start_dma(board,0x800000*0,board->params[0]->addr_rx,4096 * 4);
    if ( pthread_cond_timedwait( &int_554_cond, &int_554_mutex, &tp ) ){
      PR_DBG( 0, "Time-out while waiting for the DMA...\n" );
      pthread_mutex_unlock( &int_554_mutex );
      return 0;
    }
    pthread_mutex_unlock( &int_554_mutex );

    PR_DBG( 0, "Status: %x\n", ics554_status( board ) );

    // Show what we got from the DMA
    d32 = (s32*)board->params[0]->addr_rx;
    for ( channel=0; channel<8; channel++ ){
      PR_DBG( 0, "Input %i, Channel %i at %iMHz\n", channel / 4, channel % 4,
	      ( channel % 4 ) * 2 + 10 );
      for( count = 0; count < 4; count++){
	int re, im, a;
	re = d32[ channel * 2 + count * 16 ] >> 16;
	im = d32[ channel * 2 + count * 16 + 1 ] >> 16;
	a = hypot( re, im );
	PR_DBG(0,"Data[%4x] = %8i, %8i = |%8i|\n", count,
	       re, im, a );
	// Wait a bit so that the syslogger can do it's job
	rtl_udelay( 200 );
      }
    }

    // Wait for next period
    pthread_wait_np();
  }

  swr_free( board->params[0]->addr_rx );
  return NULL;
}


// Captures some data at the full rate and downconverts using the 
// graychip
void *test_down_gray( void *arg ){
  struct ics_dev *board = arg;
  short count, i;
  short channel, ddc;
  struct timespec tp;
  int dft_len = 50;
  int a_max[ dft_len ];

  board->flags |= ICS554_INT_BROADCAST;
  for ( i=0; i<dft_len; i++ ){
    a_max[ i ] = 0;
  }

  // Get some data-space
  board->params[0]->addr_rx = swr_malloc( 32768 * sizeof(u32) );
  if ( board->params[0]->addr_rx == NULL ){
    PR_DBG( 0, "Unable to allocate memory for board->data\n");
    return 0;
  }

  // Reset the board
  ics554_board_reset( board, 0, 0x3 );
  ics554_capture( board, 0x8000 );
  ics554_fifo_size( board, 0, 0xf800 );
  ics554_decimation( board, 0 );

  // Setup the DDCs
  ics554_channel_count( board, 7, 0 );
  ics554_ddc_enable( board, 1 );
  
  for ( ddc=0; ddc<1; ddc++ ){
    ics554_ddc_select( board, ddc );

    // Setup the channels of the DDC
    for ( channel = 0; channel < 4; channel++ ){
      ics554_ddc_set_channel( board, channel, 0,
			      2, cfir_80, pfir_80, 
			      channel%2 ? 0xc000:0, 30,8,0 );
    }

    ics554_ddc_finalize( board, 2, res_9x32_60, 2 );
  }

  // Reset all other DDCs to 0
  for ( ddc=1; ddc<4; ddc++ ){
    ics554_ddc_select( board, ddc );
    for ( channel = 0; channel < 4; channel++ ){
      wr_ddc_page( channel * 8, 16, 0x80 );
    }
    
    wr_ddc( 0, 0x08 );
    wr_ddc( 5, 0x5c );
  }

  // Clean the DDC-selection
  ics554_ddc_deselect( board );

  // Let's do it once every second
  pthread_make_periodic_np( pthread_self(), gethrtime(), 1000*1000*500 );
  for ( i=0; (i<1000)&&test_554_loop; i++ ){

    if ( ! ( i % 100 ) || i == 2 ){
      for ( count=0; count<dft_len; count++ ){
	a_max[ count ] = 0;
      }
    }

    // Everytime we have to reset and enable
    ics554_adc_reset( board );
    ics554_enable( board, 1, 1 );

    PR_DBG( 0, "Status: %x\n", ics554_status( board ) );
    PR_DBG( 0, "waiting for adc\n" );
    clock_gettime( CLOCK_REALTIME, &tp );
    tp.tv_sec+=2;

    // Prepare the interrupt and trigger the ADC
    pthread_mutex_lock( &int_554_mutex );
    ics554_trigger( board );
    if ( pthread_cond_timedwait( &int_554_cond, &int_554_mutex, &tp ) ){
      pthread_mutex_unlock( &int_554_mutex );
      PR_DBG( 0, "Time-out while waiting for the ADC...\n" );
      return 0;
    }

    PR_DBG( 0, "Status: %x\n", ics554_status( board ) );

    // ADC finished, now do the DMA
    PR_DBG( 0, "waiting for dma\n" );
    clock_gettime( CLOCK_REALTIME, &tp );
    tp.tv_sec+=2;

    adc_start_dma(board,0,board->params[0]->addr_rx,4096 * 4);
    if ( pthread_cond_timedwait( &int_554_cond, &int_554_mutex, &tp ) ){
      pthread_mutex_unlock( &int_554_mutex );
      PR_DBG( 0, "Time-out while waiting for the DMA...\n" );
      return 0;
    }
    pthread_mutex_unlock( &int_554_mutex );

    PR_DBG( 0, "Status: %x\n", ics554_status( board ) );

#if 0
    // Show what we got from the DMA
    d32 = (s32*)board->params[0]->addr_rx;
    for( count = 0; count < 50; count++){
      int re, im, a;
      re = d32[ 2 * count ] >> 8;
      im = d32[ 2 * count + 1 ] >> 8;
      a = hypot( re, im );
      PR_DBG(0,"Data[%4x] = %8i, %8i = |%8i|\n", count,
	     re, im, a );
      // Wait a bit so that the syslogger can do it's job
      rtl_udelay( 200 );
    }
#else
    // Show the FFT we got from the DMA
    show_dft( board->params[0]->addr_rx, dft_len, 0 );
#endif

    // Wait for next period
    pthread_wait_np();
  }

  swr_free( board->params[0]->addr_rx );
  return NULL;
}



// Captures some data at the full rate and downconverts using the 
// graychip
void *test_down_gray_cont( void *arg ){
  struct ics_dev *board = arg;
  short i;
  short channel, ddc;
  struct timespec tp;
  int dft_len = 50;
  int a_max[ dft_len ];
  u64 t;

  for ( i=0; i<dft_len; i++ ){
    a_max[ i ] = 0;
  }

  // Get some data-space
  board->block_size = 0x1000;