ics_564_test.c

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/***************************************************************************
             ics_564_test.c  -  ICS-564 test-functions
                            -------------------
    begin                :  2003
    authors              :  Linus Gasser
    emails               :  [e-mail]
 ***************************************************************************/

/***************************************************************************
                                 Changes
                                 -------
 date - name - description
 03-09-25 - ineiti - create
 
 **************************************************************************/

/***************************************************************************
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 ***************************************************************************/

#include "system.h"
#include "ics_564.h"
#include "ql_5064.h"
#include <linux/pci.h>
#include "debugging.h"
#include <math.h>
#include "memory.h"
#include "antenna.h"
#include "ics_helper.h"
#include "rf_ics.h"
#include "ics_554.h"

#define DBG_LVL 4

#define MAX_CHANNELS 4
swr_ant_param_t params[ MAX_CHANNELS ];
int test_564_loop;

// Outputs a single tone
void *test_single( void *arg ){
  struct ics_dev *board = arg;
  
  ics564_dac_set_base( board, 0, ics564_dac_config_base( 0x1, 1, 0, 1,
					     0, 0, 0,
					     0, 0 ) );
  ics564_dac_write( board, 0, 0, 0xa4 );
  ics564_dac_write( board, 0, 1, 0x1 );
  ics564_dac_write( board, 0, 6, 0x0 );
  ics564_dac_write( board, 0, 7, 0x80 );
  ics564_freq( board, 0, 0x40000000ULL * 7 / 5 );
  PR_DBG( 0, "Going for a single tone\n" );
  
  return NULL;
}


/** Uses the interpolation mode
 * Put the oscilloscope to 400us total width to see
 * some triangles.
 */
#define BUFFER_LEN 0x1000
#define BUFFER_SIZE ( BUFFER_LEN * sizeof( u16 ) )
#define DAC 0
void *test_inter( void *arg ){
  struct ics_dev *board = arg;
  s16 *buf;

  // Configure DAC1 for interpolation
  ics564_dac_set_base( board, DAC, ics564_dac_config_base( 0x4, 1, 0, 1,
					     2, 0, 0,
					     0, 0 ) );
  ics564_dac_set_profile( board, DAC, 0, 
		   ics564_dac_config_profile( 0x10000000, 1, 0, 1, 0x80 ) );

  // setup FIFOs
  ics564_fifo_setup( board, FIFO_SIZE_2K );

  // Set data-path
  ics564_setup_datapath( board, 1 << DAC, 1 );
  
  // Enable loop in dac1
  ics564_setup_control( board, DAC_MODE_LOOP, DAC_MODE_LOOP, 
		     DAC_MODE_LOOP, DAC_MODE_LOOP, 1, 0, 0 );
  rtl_udelay( 10000 );

  ics564_set_buffer_size( board, BUFFER_LEN );

  ics564_load( board, 0xf );

  // Write Data
  buf = swr_malloc( BUFFER_SIZE );
  if ( !buf ){
    PR_DBG( 0, "Buffer-size %x too big!\n", BUFFER_SIZE );
    return NULL;
  }
  
  init_dma_s16_buffer( buf, BUFFER_LEN, 5 );

  /* Write using DMA */
  ics564_start_dma( board, 0, buf, BUFFER_SIZE );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );

  // TRIGGER
  PR_DBG( 4, "Trigger!\n" );
  ics564_trigger( board );

  // Clean up a bit
  swr_free( buf );

  return NULL;
}


void *test_quad_cont( void *arg ){
  struct ics_dev *board = arg;
  int count;
  u32 *buf;
  
  ics564_reset( board );
  
  PR_DBG( 0, "Going into quad-cont-mode\n" );
  board->block_size = BUFFER_LEN * 4;
  buf = (u32*)swr_malloc( board->block_size * sizeof( u32 ) );

  // Configure DAC1 
  ics564_dac_set_base( board, DAC, ics564_dac_config_base( 0x4, 1, 0, 1,
					     0, 0, 0,
					     0, 0 ) );
  ics564_dac_set_profile( board, DAC, 0, 
		   ics564_dac_config_profile( 0x59999999, 1, 0, 0x1, 0x80 ) );

  ics564_set_buffer_size( board, BUFFER_LEN );

  // setup FIFOs
  ics564_fifo_setup( board, FIFO_SIZE_1K );

  // Set data-path
  ics564_setup_datapath( board, 1 << DAC, 1 );
  
  ics564_setup_control( board, DAC_MODE_LOOP, DAC_MODE_LOOP, 
		     DAC_MODE_LOOP, DAC_MODE_LOOP, 1, 0, 0 );
  rtl_udelay( 10000 );
  
  ics564_load( board, 1 << DAC );

  buf = buf;
  PR_DBG(0,"ics_buf Addr = %p, buff_length[u32] = %i \n",buf, board->block_size ); 

  for ( count=0; count< board->block_size; count++ ){
    switch( 1 ){
      case 0:
	buf[ count ]    = 0x7fff7fff * ( count % 2 );
      break;
      case 1:
	buf[ count ]    = 0x7fff7fff;
      break;
      case 2:
	buf[ count ]    = 0x7fff7fff * ( !( count % 256 ) );
      break;
    }
  }
  
  board->flags |= ICS564_RUN;
  ics564_start_dma( board, 0, buf, board->block_size * 4 );

  rtl_udelay( 10000 );

  ics564_trigger( board );

  return 0;
}

//Quad mode, number of blocks per frame => 1
void *test_quad_all( void *arg ){
  struct ics_dev *board = arg;
  int count, count2, j;
  short i;
  int block_begin;
  u32 *buf[4];

  PR_DBG( 0, "Going into quad-cont-mode\n" );   
 
  board->block_size = 1 << 12; //DAQ_DMA_BLOCK_SIZE_BYTES; //32 bit
  board->number_channels = 4;
  board->blocks_per_frame = 2;

  for (i = 0; i < board->number_channels; i++){
    // Copy the parameter-structure
    board->params[i] = &params[i];

    //Allocate Memory for the DAC channels
    board->params[i]->addr_tx = (u32*)swr_malloc( board->block_size * 
						  sizeof( u32 ) * 
						  board->blocks_per_frame );
    buf[i] = board->params[i]->addr_tx;
    
    if ( board->params[i]->addr_tx == NULL ){
      PR_DBG(0,"Unable to Allocate memory for DAC Channels\nExiting...");
      return 0;
    }
   
    //DACs for Quad mode
    ics564_dac_set_base( board, i, ics564_dac_config_base( 1, 1, 0, 1,
					     0, 0, 0,
					     0, 0 ) );
    //Setting Carrier frequency 
    ics564_dac_set_profile( board, i, 0,
		     ics564_dac_config_profile( CARRIER_FREQUENCY_70, 1, 0, 
					 0x3f, 
					 0x80 ) );
  }

  //setup FIFOs
  ics564_fifo_setup( board, FIFO_SIZE_0_5K );
  ics564_setup_control( board, DAC_MODE_CONTINOUS, DAC_MODE_CONTINOUS, 
		     DAC_MODE_CONTINOUS, DAC_MODE_CONTINOUS, 1, 0, 0 );
  rtl_udelay( 10000 ); //Necessary for the next instruction
  
  //Transfer the above DAC control information  to AD9857
  ics564_load( board, ( 1 << board->number_channels ) - 1 );  
    
  PR_DBG(0,"ics_buf Addr = %p, buff_length[u32] = %i \n",buf[0], 
	 board->block_size ); 


  for ( count2 = 0; count2 < board->blocks_per_frame; count2++){
    block_begin = count2 * board->block_size;
    for ( count = block_begin; count< block_begin + board->block_size; count++ ){
      switch( 1 ){
      case 0:
	for ( i=0; i<board->number_channels; i++ ){
	  buf[i][ count ]    = 0x5fff5fff;// * ( 2 * (count % 2) - 1);
	}
	break;

      case 1:
	for ( i=0; i<board->number_channels; i++ ){  //rising and falling ramp
	  if (count2 % 2){
	    j = (  board->block_size - count % board->block_size ) * 0x7fff / board->block_size;
	  } else {
	    j = ( count % board->block_size ) * 0x7ff / board->block_size;
	  }
	  buf[i][ count ] = 0x10001 * j;
	}
	break;

      case 2:
	for ( i=0; i<board->number_channels; i++ ){
	  buf[i][ count ]  = (count % 2 ?  0x7fff7fff : 0x80008000 );
	}
	break;
      }
    }
  }
  
  //Set data-path for DAC #0
  ics564_setup_datapath( board, 1 << 0, 1 );
  board->flags |= ICS564_RUN;
  
  //Set the block count
  board->block_count = 0; 
  
  //First Data transfer
  ics564_start_dma( board, 0, buf, 
		    board->block_size * 4 );
  rtl_udelay( 20000 );

  PR_DBG(0,"Did the interrupt happen ?");
  
  return 0;
}

void *test_quad_loop( void *arg ){
  struct ics_dev *board = arg;
  s16 *buf;
  int i;

  ics564_reset( board );

  for ( i=0; i<4; i++ ){
    // Configure DAC1 for interpolation
    ics564_dac_set_base( board, i, ics564_dac_config_base( 0x4, 1, 0, 1,
					     0, 0, 0,
					     0, 0 ) );
    ics564_dac_set_profile( board, i, 0, 
		     ics564_dac_config_profile( 0x59999999, 0, 0, 
					 0x3f, 0x80 ) );
  }

  // setup FIFOs
  ics564_fifo_setup( board, FIFO_SIZE_2K );

  // Set data-path
  ics564_setup_datapath( board, 0xf, 1 );
  
  // Enable loop in dac1
  ics564_setup_control( board, DAC_MODE_LOOP, DAC_MODE_LOOP, 
		     DAC_MODE_LOOP, DAC_MODE_LOOP, 1, 0, 0 );
  rtl_udelay( 10000 );

  ics564_set_buffer_size( board, BUFFER_LEN );

  ics564_load( board, 0xf );

  // Write Data
  buf = swr_malloc( BUFFER_SIZE );
  if ( !buf ){
    PR_DBG( 0, "Buffer-size %x too big!\n", BUFFER_SIZE );
    return NULL;
  }

  init_dma_s16_buffer( buf, BUFFER_LEN, 6 );

  /* Write using DMA */
  ics564_start_dma( board, 0, buf, BUFFER_SIZE * 2 );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );

  // TRIGGER
  PR_DBG( 4, "Trigger!\n" );
  ics564_trigger( board );

  // Clean up a bit
  swr_free( buf );

  return NULL;
}


void *test_quad_simultaneous( void *arg ){
  struct ics_dev *board = arg;
  u32 *tx_block[4];
  short i, bpf;
  int nbr_ch = 2;

  bpf = 1;
  board->blocks_per_frame = bpf;
  for ( i=0; i<nbr_ch; i++){
    // Set channel parameters
    swr_ant_ch_init( params + i );
    // Allocate some memroy
    tx_block[i] = (u32*)swr_malloc( board->block_size * 
				    sizeof( u32 ) * bpf );
    
    PR_DBG( 3, "Channel %i with  tx_block-adress %p\n", i, tx_block[i] );
 
    if ( tx_block[i] == NULL ){
      PR_DBG(0,"Unable to Allocate memory for DAC Channels\nExiting...");
      return NULL;
    }
    
    // Set the datablock
    params[i].addr_tx = tx_block[i];
    params[i].frame_blocks = bpf;

    // Put some data in tx_block[i]
    init_dma_s32_buffer( board, i, 4 );
  }

  PR_DBG( 0, "Starting\n" );
  swr_ant_ch_start( ); // Starts All channels
  return NULL;
}


void *test_user_io( void *arg ){
  struct ics_dev *board = arg;
  int i = 0;

  while ( test_564_loop ){
    i++;
    WRITE_ICS564_U16( board, USER_IO, i );
    if ( !( i % 100000 ) ){
      PR_DBG( 0, "Counting: %i\n", i );
    }
    usleep( 10 );
  }

  return NULL;
}

void *test_serial_send( void *arg ){
  struct ics_dev *board = arg;
  u8  w_size = 24;
  u32 word = 0x0;
  u8  chip=0;
  while ( test_564_loop ){
    ics564_send_serial( board, w_size,  word, chip,0,0);
    word++;
  }
  
  return NULL;
}

void *test_att_setup(void *arg){
  struct ics_dev *board = arg;

  while ( test_564_loop ){
    // Configuration of the RF board freq synthetiser Si4136-BT
    // Main configuration of the RF freq synth: 0x40 in register 0
    ics564_send_serial( board, ICS_564_SYNTH_W_SIZE, (0x000040 << 4)+0x0, 
  		      ICS_564_SYNTH_CHIP,0,0);
    // Phase detector gain of the RF freq synth:0x3  in register 1
    ics564_send_serial( board, ICS_564_SYNTH_W_SIZE, (0x000003 << 4)+0x1, 
		      ICS_564_SYNTH_CHIP,0,0);
    // RF1_N ref frequency multiplier, N=117200=0x01c9d0 in register 0x3
    ics564_send_serial( board, ICS_564_SYNTH_W_SIZE, (0x01c9d0 << 4)+0x3, 
		      ICS_564_SYNTH_CHIP,0,0);
    // RF1_R ref frequency divider, R=2500=0x9c4 in register 0x6
    ics564_send_serial( board, ICS_564_SYNTH_W_SIZE, (0x0009c4 << 4)+0x6, 
		      ICS_564_SYNTH_CHIP,0,0);
  
    //Configuration of the RF board RX and TX attenuators: full att
    ics564_send_serial( board, ICS_564_ATT_W_SIZE, 0xffffff, 
		      ICS_564_ATT_CHIP,0,0);
  }
  return NULL;
}


void *test_564_empty( void *arg ){
  PR_DBG( 0, "Empty test\n" );
  
  return NULL;
}

void *test_jitter( void *arg ){
  struct ics_dev *board = arg;
  s16 *buf;
  int i;
  int clock_extern = 1;

  ics554_init();
  ics564_reset( board );

  for ( i=0; i<4; i++ ){
    // Configure DAC1 for interpolation
    ics564_dac_set_base( board, i, ics564_dac_config_base( 0x1, 1, 0, 1,
					     0, 0, 0,
					     0, clock_extern ) );
    ics564_dac_set_profile( board, i, 0, 
		     ics564_dac_config_profile( 0x40000000ULL * 7 / 5, 0, 0, 
					 0x3f, 0xc0 ) );
  }

  // setup FIFOs
  ics564_fifo_setup( board, FIFO_SIZE_2K );

  // Set data-path
  ics564_setup_datapath( board, 0xf, 1 );
  
  // Enable loop in dac1
  ics564_setup_control( board, DAC_MODE_LOOP, DAC_MODE_LOOP, 
		     DAC_MODE_LOOP, DAC_MODE_LOOP, 1, 0, clock_extern );
  rtl_udelay( 10000 );

  ics564_set_buffer_size( board, BUFFER_LEN - 1 );

  ics564_load( board, 0xf );

  // Write Data
  buf = swr_malloc( BUFFER_SIZE );
  if ( !buf ){
    PR_DBG( 0, "Buffer-size %x too big!\n", BUFFER_SIZE );
    return NULL;
  }

  init_dma_s16_buffer( buf, BUFFER_LEN, 8 );

  /* Write using DMA */
  ics564_start_dma( board, 0, buf, BUFFER_SIZE * 2 );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );
  rtl_udelay( 20000 );

  // TRIGGER
  PR_DBG( 4, "Trigger!\n" );
  ics564_trigger( board );

  // Clean up a bit
  swr_free( buf );

  return NULL;
}

struct thread test_564;
swr_ant_param_t board_params_564[ ADA_PER_BOARD ];
void ics564_test_start( struct ics_dev *board ){
  int i;

  for ( i=0; i<ADA_PER_BOARD; i++ ){
    board_tx.params[ i ] = board_params_564 + i;
    board_tx.params[ i ]->addr_tx = NULL;
  }

  board->flags |= ICS564_STARTED;
  board->flags |= ICS564_NO_INT | ICS564_TEST;
  test_564_loop = 1;

  // Put the new flags into honor
  ics564_setup( board );

  switch( 9 ){
  case -1:
    swr_thread_init( &test_564, test_564_empty, board );
    break;
  case 0:
    swr_thread_init( &test_564, test_single, board );
    break;
  case 1:
    swr_thread_init( &test_564, test_inter, board );
    break;
  case 2:
    swr_thread_init( &test_564, test_quad_cont, board );
    break;
  case 3:
    board->flags &= ~ICS564_NO_INT;
    swr_thread_init( &test_564, test_quad_all, board );
    break;
  case 4:
    swr_thread_init( &test_564, test_quad_loop, board );
    break;
  case 5:
    board->flags &= ~ICS564_NO_INT;
    swr_thread_init( &test_564, test_quad_simultaneous, board );
    break;
  case 6:
    swr_thread_init( &test_564, test_user_io, board );
    break;
  case 7:
    swr_thread_init( &test_564, test_serial_send, board );
    break;
  case 8:
    swr_thread_init( &test_564, test_att_setup, board );
    break;
  case 9:
    swr_thread_init( &test_564, test_jitter, board );
    break;
  }
  
  return;
}

void ics564_test_stop( struct ics_dev *board ){
  int i;

  PR_DBG( 1, "Test_stop\n" );
  test_564_loop = 0;
  if ( board_tx.flags & ICS564_STARTED ){
    PR_DBG( 1, "Ant_ch_stop\n" );
    swr_ant_ch_stop( ); // Stops All channels
    board_tx.flags &= ~ICS564_STARTED; 
  }

  for (i = 0; i< board->number_channels; i++){
    if (board->params[i]->addr_tx){
      PR_DBG( 3, "Channel %i for adress %p\n", i, board->params[i]->addr_tx );
      swr_free( board->params[i]->addr_tx );
    }
  }
  PR_DBG( 1, "Freed memory\n" );

  swr_thread_free( &test_564, NULL );
  PR_DBG( 1, "Freed test\n" );
}