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📄 ics_564.h

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/***************************************************************************             ics.h  -  ICS-5x4 driver                            -------------------    begin                :  2003    authors              :  Linus Gasser    emails               :  linus.gasser@epfl.ch ***************************************************************************//*************************************************************************** *                                                                         * *   This program is free software; you can redistribute it and/or modify  * *   it under the terms of the GNU General Public License as published by  * *   the Free Software Foundation; either version 2 of the License, or     * *   (at your option) any later version.                                   * *                                                                         * ***************************************************************************/#ifndef ICS_564_H__#define ICS_564_H__#include "ics_dev.h"#include <linux/pci.h>// The ICS-564 register set @ addr[1]#define ICS_564_USER_STATUS  0x00#define ICS_564_USER_CONTROL 0x08#define ICS_564_STATUS       0x10#define ICS_564_CONTROL      0x18#define ICS_564_DAC_CONFIG   0x20#define ICS_564_DAC_RESET    0x28#define ICS_564_DAC_INSTR    0x30#define ICS_564_INT_TRIGGER  0x38#define ICS_564_FIFO         0x40#define ICS_564_DAC1_COUNT   0x48#define ICS_564_DAC2_COUNT   0x50#define ICS_564_BUFFER       0x58#define ICS_564_JTAG         0x60#define ICS_564_CONTROL2     0x68#define ICS_564_LOAD         0x70#define ICS_564_IRQ_MASK     0x78#define ICS_564_IRQ_STAT     0x80#define ICS_564_USER_IO      0x88#define DAC_INSTRUCTION_OFFSET               0x30#define DAC_INSTRUCTION_DATA_BYTE            (0xFF<< 0)#define DAC_INSTRUCTION_ADDRESS              (0x1F<< 8)#define DAC_INSTRUCTION_DAC_SEL              (0x03<<13)#define DAC_INSTRUCTION_RW                   (0x01<<15)#define DATA_BIT0                  (1<< 0)#define RES_ICS 1#define ICS564_INITIALIZED (1<<0)#define ICS564_STARTED     (1<<1)#define ICS564_RUN         (1<<2)#define ICS564_NO_INT      (1<<3)#define ICS564_TRIGGER_INT (1<<4)#define ICS564_TEST        (1<<5)// Sampling frequency in MHz - 100 because linked with 554#define ICS564_SAMPLE_FREQ 100// Converts frequency in MHz to u64 for dac_config_profile#define ICS564_CARRIER(x) ((u64)(((double)(x))/ICS564_SAMPLE_FREQ*(1ULL<<32)))#define READ_ICS564_U8(x,y) readb( x->iobase[RES_ICS] + (ICS_564_##y) )#define READ_ICS564_U16(x,y) readw( x->iobase[RES_ICS] + (ICS_564_##y) )#define READ_ICS564_U32(x,y) readl( x->iobase[RES_ICS] + (ICS_564_##y) )#define READ_ICS564_U64(x,y) ( (u64)READ_ICS564_U32(x,y) + ( (u64)READ_ICS564_U32(x,(y)+4) << 32 ) )#define WR_DELAY 0#define WRITE_ICS564_U8(x,y,z) writeb( (u8)(z), x->iobase[RES_ICS] + (ICS_564_##y) ); rtl_udelay( WR_DELAY )#define WRITE_ICS564_U16(x,y,z) writew( (u16)(z), x->iobase[RES_ICS] + (ICS_564_##y) ); rtl_udelay( WR_DELAY )#define WRITE_ICS564_U32(x,y,z) writel( (u32)(z), x->iobase[RES_ICS] + (ICS_564_##y) ); rtl_udelay( WR_DELAY )#define WRITE_ICS564_U64(x,y,z) (*(volatile u64*)((u8*)(x)->iobase[RES_ICS]+(ICS_564_##y))=cpu_to_le64((u64)(z)));\ rtl_udelay( WR_DELAY )void ics564_dac_write( struct ics_dev *board, u8 dac, u8 addr, u8 data );u8 ics564_dac_read( struct ics_dev *board, u8 dac, u8 addr );void ics564_dac_set_base( struct ics_dev *board, int dac, u16 config );u16 ics564_dac_config_base( u16 refclk, u16 pll_lock, u16 lsb_first, u16 sdio,		     u16 mode, u16 auto_power, u16 sleep,		     u16 bypass_inv_sinc, u16 cic_clear );void ics564_dac_set_profile( struct ics_dev *board, int dac, int profile, u64 config );u64 ics564_dac_config_profile( u64 frequency,			u64 bypass_inv_cic, u64 inv_spect, u64 cic_u64erp,			u64 scaling );#define FIFO_SIZE_0_5K 0#define FIFO_SIZE_1K 7#define FIFO_SIZE_2K 5#define FIFO_SIZE_4K 4#define FIFO_SIZE_8K 6#define FIFO_SIZE_16K 3#define FIFO_SIZE_32K 1#define FIFO_SIZE_64K 2void ics564_fifo_setup( struct ics_dev *board, int size );void ics564_setup_datapath( struct ics_dev *board, u32 dacs, u32 enable);/*#define ics564_dac_setup_datapath(board,dacs,enable) WRITE_ICS564_U32( board,\  USER_CONTROL, ( ( ((u32) (dacs) ) & 0xf ) << 1 ) + !!( (u32)(enable) ) )*/// Very simplified, not all actions included#define DAC_MODE_              0#define DAC_MODE_0             0#define DAC_MODE_CONTINOUS     0#define DAC_MODE_ONESHOT_RL    1#define DAC_MODE_ONESHOT_NO_RL 2#define DAC_MODE_LOOP          3void ics564_setup_control( struct ics_dev *board, u32 m1, u32 m2, u32 m3, u32 m4,			u32 enable, u32 ext_trig, u32 ext_clock );#define ics564_set_buffer_size(board,size) \    WRITE_ICS564_U32( (board), BUFFER, (u32)size - 1 )void ics564_load( struct ics_dev *board, u32 dacs );#define ics564_trigger(board) WRITE_ICS564_U32( (board), INT_TRIGGER, 1 )void ics564_freq( struct ics_dev *board, int dac, u32 freq );void ics564_freq_quad( struct ics_dev *board, int dac, 		       int profile, u32 freq );void ics564_set_imr( struct ics_dev *board, u8 dac );void ics564_clear_imr( struct ics_dev *board, u8 dac );void ics564_start_dma( struct ics_dev *board, u64 dac, 		    void *from, u64 count );void ics564_cancel_dma( struct ics_dev *board );void ics564_send_serial( struct ics_dev *board,u8 w_size, u32 word, u8 chip, u16 tx, u16 adr);void ics564_test( struct ics_dev *board );void ics564_dma_next_block( struct ics_dev *board );unsigned int ics564_interrupt( unsigned int irq, struct pt_regs *r);unsigned int ics564_interrupt_old( unsigned int irq, struct pt_regs *r);int ics564_start(struct ics_dev *board);void ics564_reset( struct ics_dev *board );void ics564_setup( struct ics_dev *board );int ics564_stop(struct ics_dev *board);int ics564_init( void );int ics564_free(struct ics_dev *board);#endif

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