📄 ics_554.h
字号:
/*************************************************************************** ics.h - ICS-5x4 driver ------------------- begin : 2003 authors : Linus Gasser emails : linus.gasser@epfl.ch ***************************************************************************//*************************************************************************** * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * * (at your option) any later version. * * * ***************************************************************************/#ifndef ICS_554_H__#define ICS_554_H__ #include "ics_dev.h"extern pthread_cond_t int_554_cond;extern pthread_mutex_t int_554_mutex;#define ICS_554_STATUS 0x00#define ICS_554_IRQ_MASK 0x08#define ICS_554_CONTROL1 0x10#define ICS_554_CONTROL2 0x18#define ICS_554_JTAG 0x20#define ICS_554_ADC_CH12_DEC 0x80#define ICS_554_ADC_CH12_ACQ 0x88#define ICS_554_ADC_CH34_DEC 0x90#define ICS_554_ADC_CH34_ACQ 0x98#define ICS_554_FIFO 0xD8#define ICS_554_TRIGGER 0xE0#define ICS_554_SOFT_ADC_RESET 0xF0#define ICS_554_SOFT_BOARD_RESET 0xF8#define ICS_554_GC4016 0x100 //till 0x1F8#define ICS_554_USR_PROG_FPGA 0x200 //till 0x2F8#define ICS_554_CHANNEL_COUNT 0x200#define ICS_554_DATA_FIFO_1 0x00000000#define ICS_554_DATA_FIFO_2 0x00800000// The board has been found and memory mapped#define ICS554_INITIALIZED (1<<0)#define ICS554_STARTED (1<<1)// A transfer is going on#define ICS554_RUN (1<<2)// Interrupts shall be disabled#define ICS554_NO_INT (1<<3)// Some test is running#define ICS554_TEST (1<<4)// The DMA is handled by the interrupt#define ICS554_INT_DMA (1<<5)// Send a broadcast-signal once an interrupt has been received#define ICS554_INT_BROADCAST (1<<7)#define RES_ICS 1#if 0// This is the delayed version#define WRITE_ICS554_U32(x,y,z) writel( (u32)(z), x->iobase[RES_ICS] + (ICS_554_##y) ); rtl_udelay( 1 );#define WRITE_ICS554_U64(x,y,z) (*(volatile u64*)((u8*)(x)->iobase[RES_ICS]+(y))=cpu_to_le64((u64)(z))); rtl_udelay( 1 );#else// This is the undelayed version of the writes#define WRITE_ICS554_U32(x,y,z) writel( (u32)(z), x->iobase[RES_ICS] + \ (ICS_554_##y) )#define WRITE_ICS554_U64(x,y,z) (*(volatile u64*)((u8*)(x)->iobase[RES_ICS]+\ (y))=cpu_to_le64((u64)(z)))#endif#define READ_ICS554_U16(x,y) readw( x->iobase[RES_ICS] + (ICS_554_##y) )#define READ_ICS554_U32(x,y) readl( x->iobase[RES_ICS] + (ICS_554_##y) )#define READ_ICS554_U64(x,y) ( (u64)READ_ICS554_U32(x,y) + \ ( (u64)READ_ICS554_U32(x,(y)+4) << 32 ) )#define WRITE_GC4016(x,y,z) writeb( (u8)(z), x->iobase[RES_ICS] + \ ICS_554_GC4016 + ((u32)y)*8 );\ rtl_udelay( 10 )#define READ_GC4016(x,y) readb( x->iobase[RES_ICS] + ICS_554_GC4016 + \ ((u32)y)*8 )#define wr_ddc_page(a,b,c) ics554_ddc_write( board, a, b, c )#define wr_ddc(a,b) wr_ddc_page( (a) >> 8, (a) & 0xff, b )void adc_start_dma( struct ics_dev *board, u64 dac, void *to, u64 count );u16 ics554_status( struct ics_dev *board );void ics554_fifo_size( struct ics_dev *board, u32 fifo, u32 paf );void ics554_decimation( struct ics_dev *board, u32 rate );void ics554_board_reset( struct ics_dev *board, u32 single, u32 reverse );void ics554_acq_count( struct ics_dev *board, u32 count );void ics554_capture( struct ics_dev *board, u32 count );void ics554_adc_reset( struct ics_dev *board );void ics554_imr( struct ics_dev *board, u32 imr );void ics554_enable( struct ics_dev *board, u32 adc, u32 imr );void ics554_trigger( struct ics_dev *board );void ics554_channel_count( struct ics_dev *board, u32 cc12, u32 cc34 );void ics554_ddc_enable( struct ics_dev *board, u32 ddc );void ics554_ddc_select( struct ics_dev *board, u32 ddc );void ics554_ddc_deselect( struct ics_dev *board );void ics554_ddc_write( struct ics_dev *board, u8 page, u8 offset, u8 data );u8 ics554_ddc_read( struct ics_dev *board, u8 page, u8 offset );void ics554_ddc_set_ccp( struct ics_dev *board, u32 channel, u8 index );void ics554_ddc_set_fir( struct ics_dev *board, u16 page, u16 size, u8 *data );#define ics554_ddc_set_cfir(b,c,d) ics554_ddc_set_fir( b, ((c)&3)*8, 22, d )#define ics554_ddc_set_pfir(b,c,d) ics554_ddc_set_fir( b, ((c)&3)*8+2, 64, d )#define ics554_ddc_set_res(b,d) ics554_ddc_set_fir( b, 32, 256, d )void ics554_ddc_set_phase( struct ics_dev *board, u8 channel, u16 phase );#define ics554_ddc_set_phase_d(b,c,p) ics554_ddc_set_phase(b,c,(1<<16)*p/2/M_PI)void ics554_ddc_set_cic( struct ics_dev *board, u8 channel, u16 dec_ratio, u16 dec_gain );void ics554_ddc_set_freq( struct ics_dev *board, u8 channel, u32 freq );#define ics554_ddc_set_freq_d(b,c,f,fc) \ ics554_ddc_set_freq(b,c,(double)f/fc*0x100000000UL)void ics554_ddc_set_resampler( struct ics_dev *board, u8 index );void ics554_ddc_set_output( struct ics_dev *board, u8 index );void ics554_ddc_set_channel( struct ics_dev *board, u8 channel, u8 input, u8 ccp, u8 *cfir, u8 *pfir, u16 phase, double freq , u16 dec_ratio, u16 dec_gain );void ics554_ddc_finalize( struct ics_dev *board, u8 res_index, u8 *res, u8 out_index );unsigned int ics554_interrupt ( unsigned int irq, struct pt_regs *r);void ics554_setup( struct ics_dev *board);void ics554_reset( struct ics_dev *board);int ics554_stop( struct ics_dev *board );int ics554_init( void );int ics554_free( struct ics_dev *board );#endif
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -