rf_io.h

软件无线电的平台

/***************************************************************************
         rf_io.h  -  RTLinux kernel module for hardware-dependant routines
                            -------------------
    begin                :  2002
    authors              :  Linus Gasser
    emails               :  [e-mail]
 ***************************************************************************/

/***************************************************************************
                                 Changes
                                 -------
 date - name - description
 02-10-01 - ineiti- begin
 02-12-12 - ineiti - changed name from daq_io.h to rf_io.h

 **************************************************************************/

/***************************************************************************
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 ***************************************************************************/

/**
 * @short rf_io is a collection of low-level routines to the rf-hardware 
 */

#ifndef RF_IO_H__
#define RF_IO_H__

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/version.h>
#include <linux/pci.h>          /* configuration symbols */
 
#include <asm/io.h>
#include <asm/bitops.h>
#include <asm/uaccess.h>
#include <asm/segment.h>
#include <asm/page.h>
 
#include <rtl.h>
#include <pthread.h>

#include "mmx.h"
#include "rf.h"
#include "antenna.h"

#define DEBDIV(a,b) if ( (a)==0 ){rtl_printf( b ); return;}


//----------------------------------------------------------------------
// Structures
//---------------------------------------------------------------------- 

/**
 * Holds one RF-card with all necessary information.
 */
typedef struct {
  swr_ant_param_t *param;
  unsigned short vendor;
  unsigned short id;
  unsigned short index;
  unsigned char  bus;
  unsigned char  func;
  unsigned int   addr[6];
  unsigned int   data_base;
  unsigned int   offset;
  unsigned int   baseaddr;
  unsigned int   irq;

  void *tx_buffer;
  void *rx_buffer;
  int blocks_in_frame;
  int tx_if_gain;
  int tx_med_gain;
  int tx_pa_gain;
  int rx_if_gain;
  int rx_gain;
  int tx_gain;
  int running;
  unsigned int mboxes[2];
  pthread_mutex_t mutex;
} device_t;



//----------------------------------------------------------------------
// Function calls
//---------------------------------------------------------------------- 


int  dump_config( device_t *dev_rf, unsigned char bus, unsigned char function);
void kmemclear( device_t *dev_rf, unsigned int *base,unsigned int size);
void setup_regs( device_t *dev_rf );

int test_dac_dma( device_t *dev_rf, unsigned int time );
int test_adc_dma( device_t *dev_rf, unsigned int time );
int start_test_dac( device_t *dev_rf );
int stop_test_dac( device_t *dev_rf );
int test_FPGA_mem( device_t *dev_rf );

void writegain ( device_t *dev_rf, int channel, int level );
void write_sdac( device_t *dev_rf, int level );
void setmode( device_t *dev_rf, unsigned int mode );
void write_lo( device_t *dev_rf, unsigned int freq );

int init_module(void);
void cleanup_module(void);
int Uniform (void);

/**
 * @short Sets the gains
 *
 * This is a special function that is only available with the rf-antenna.
 * It should be packed in the general interface, but for the moment (dec02)
 * no certainity exists on how to set a certain gain in dbm.
 *
 * There are four gain-controllers on the RF-board. All four can
 * be set at the same time through this function.
 *
 * @param dev_rf The device
 * @param tx_pa The transmission power-amplifier gain
 * @param tx_med The transmission DAC-gain
 * @param tx_if The transmission intermediate-frequency gain
 * @param rx_if The reception intermediate-frequency gain
 * @return 0 for success or -1 for error
 */
int swr_rf_set_gains( device_t *dev_rf, 
		      int tx_pa, int tx_med, int tx_if, int rx_if );


/**
 * @short Reads the gains
 *
 * @see swr_rf_set_gains for a better explanation of the parameters
 *
 * @return 0 for success or -1 for error
 */
int swr_rf_get_gains( device_t *dev_rf, 
		      int *tx_pa, int *tx_med, int *tx_if, int *rx_if );

//----------------------------------------------------------------------
// Variables
//----------------------------------------------------------------------


extern int num_cards;
extern device_t *rf_cards;


//----------------------------------------------------------------------
// Macros
//----------------------------------------------------------------------

#define uchar unsigned char

#define rf_writeb(val,port)     {writeb((ucchar)(val),(ulong)(port)); mb();}
#define rf_writew(val,port)     {writew((ushort)(val),(ulong)(port)); mb();}
#define rf_writel(val,port)     {writel((uclong)(val),(ulong)(port)); mb();}

#define rf_readb(port)  readb(port)
#define rf_readw(port)  readw(port)
#define rf_readl(port)  readl(port)

//----------------------------------------------------------------------
// Constants
//----------------------------------------------------------------------

#define uclong unsigned int
#define ucshort unsigned short
#define ucchar unsigned char

/* ---------------------------------------------------------------------- */
#define LOCAL_RANGE_REG      0x9C       /* Local range register for PCI access */
#define LOCAL_BASE_ADDRESS   0xA0       /* Local bus base address register */
#define LOCAL_REMAP_REG 0xA8            /* Local remap register for PCI access */
                                        /* ==> PCI base address of DMA buffer */
#define RANGE 0xFFFE0000                /* 128k DMA buffer */
#define LOCAL_TO_PCI_BASE 0xA0000000    /* Base address of DMA buffer in 0xA0 */

#define DMA0_LOCAL_START 0x88           /* DMA0 Local address register */ 
#define DMA1_LOCAL_START 0x9c           /* DMA1 Local address register */ 
#define DMA0_BYTE_COUNT 0x8c            /* Configuration register for DMA 0 Byte count */
#define DMA1_BYTE_COUNT 0xa0            /* Configuration register for DMA 1 Byte count */
#define DMA0_MODE_REG 0x80              /* DMA0 Mode Register */
#define DMA1_MODE_REG 0x94              /* DMA1 Mode Register */
#define DMA0_PCI_ADDR 0x84
#define DMA1_PCI_ADDR 0x98
#define DMA0_DESC_REG 0x90              /* DMA0 Descriptor Pointer Reg */
#define DMA1_DESC_REG 0xa4              /* DMA1 Descriptor Pointer Reg */
#define DMA_THRESHOLD 0xb0              /* DMA FIFO Thresholds */
#define DMA_CSR 0xa8

#define DIR_MAST_RANGE 0x1c             /* Local Range Register for Direct Master to PCI */
#define DIR_MAST_ADD 0x20               /* Local Address Register for Direct Master to PCI */
#define DIR_MAST_REMAP 0x28             /* PCI Base Address (Remap) Register for Direct Master to PCI */

#define ICSR 0x68
#define ADC_BUFFER 0x440000             /* Base Address of ADC Buffer */
#define DAC_BUFFER 0x450000             /* Base Address of DAC Buffer */
#define ADC_LOCAL_SIZE 0x800            /* Size (half) of ADC DMA Buffer in FPGA */
#define DAC_LOCAL_SIZE 0x800            /* Size (half) of DAC DMA Buffer in FPGA */

#define DMA_RANGE 0xFFF00000            /* Range for DMA buffer access (1 Mbyte) */
#define MBOX_LOCAL_MAP 0x40000000       /* Local bus base address for DMA buffer */

#define PCI_BASE_REG_RD 0x400000        /* PCI DMA A/D buffer base register */
#define PCI_LIMIT_REG_RD 0x401000       /* PCI DMA A/D stop address register */
#define PCI_MBOX_REG_RD 0x402000        /* Local bus DMA A/D MBOX address register */
#define PCI_START_STOP_DMA 0x403000        /* Local bus DMA INIT */

#define PCI_BASE_REG_WR 0x410000        /* PCI DMA D/A buffer base register */
#define PCI_LIMIT_REG_WR 0x411000       /* PCI DMA D/A stop address register */
#define PCI_MBOX_REG_WR 0x412000        /* Local bus DMA D/A MBOX address register */

#define PCI_IGEN_CTL 0x413000
#define PCI_IGEN_CNT 0x414000

#define DMA_ADC_ON 1
#define DMA_DAC_ON 2
#define CNT_ADC_ON 4
#define CNT_DAC_ON 8

#define INT_ENA 1
#define INT_CLR 2 

#define TX_ON 2
#define TX_OFF 1

#define GPIO 0x480000
#define ODAC 0x432000
#define SDAC 0x431000
#define FSYN 0x430000

#define NORMAL_TX 8
#define NORMAL_RX 0
#define TEST_TX1 4
#define TEST_TX2 12
#define TEST_RX1 6
#define TEST_RX2 4

#define TX_PA_GAIN 2
#define TX_MED_GAIN 4
#define TX_IF_GAIN 3
#define RX_IF_GAIN 1

#define SYNC_MS 0
#define STEADY_MS 1
#define SYNC_BS 2
#define STEADY_BS 3

#define RX_GAIN_MAX 620
#define RX_GAIN_MIN 10

#define TARGET_RX_GAIN 300000
#define MIN_DELAY 20000

#define STATUS_RX_OFF 0
#define STATUS_RX_ON 1
#define STATUS_RX_SYNCING 2
#define STATUS_RX_CANNOT_SYNC 3
#define STATUS_RX_DATA_PROBLEM 4
#define STATUS_RX_LOST_SYNC 5
#define STATUS_RX_ABORT 6
#define STATUS_RX_TOO_LATE 7
#define STATUS_RX_CLOCK_STOPPED 8

#define STATUS_TX_OFF 0 
#define STATUS_TX_ON 1
#define STATUS_TX_INPUT_CORRUPT 3
#define STATUS_TX_ABORT 4
#define STATUS_TX_TOO_LATE 5
#define STATUS_TX_CLOCK_STOPPED 6

#define GPP_SLOT_TIME_NS 694444
#define FPGA_BLOCK_TIME_NS 69444

#define DAQ_DELAY_CHIPS 512
#define RECORD_DEPTH 15
#define RAMSIZE 0x1000000

// The duration in microseconds of one DMA-BLOCK
#define DURATION_DMA_BLOCK 18

#endif __RF_H__