sm501hw.h

sm501 芯片的linux驱动

#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_1           1
#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_2           2
#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_3           3
#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_4           4
#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_5           5
#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_6           6
#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_7           7
#define ARBITRATION_CTRL_DMA                            11:8
#define ARBITRATION_CTRL_DMA_OFF                        0
#define ARBITRATION_CTRL_DMA_PRIORITY_1                 1
#define ARBITRATION_CTRL_DMA_PRIORITY_2                 2
#define ARBITRATION_CTRL_DMA_PRIORITY_3                 3
#define ARBITRATION_CTRL_DMA_PRIORITY_4                 4
#define ARBITRATION_CTRL_DMA_PRIORITY_5                 5
#define ARBITRATION_CTRL_DMA_PRIORITY_6                 6
#define ARBITRATION_CTRL_DMA_PRIORITY_7                 7
#define ARBITRATION_CTRL_VIDEO                          7:4
#define ARBITRATION_CTRL_VIDEO_OFF                      0
#define ARBITRATION_CTRL_VIDEO_PRIORITY_1               1
#define ARBITRATION_CTRL_VIDEO_PRIORITY_2               2
#define ARBITRATION_CTRL_VIDEO_PRIORITY_3               3
#define ARBITRATION_CTRL_VIDEO_PRIORITY_4               4
#define ARBITRATION_CTRL_VIDEO_PRIORITY_5               5
#define ARBITRATION_CTRL_VIDEO_PRIORITY_6               6
#define ARBITRATION_CTRL_VIDEO_PRIORITY_7               7
#define ARBITRATION_CTRL_CRT                            3:0
#define ARBITRATION_CTRL_CRT_OFF                        0
#define ARBITRATION_CTRL_CRT_PRIORITY_1                 1
#define ARBITRATION_CTRL_CRT_PRIORITY_2                 2
#define ARBITRATION_CTRL_CRT_PRIORITY_3                 3
#define ARBITRATION_CTRL_CRT_PRIORITY_4                 4
#define ARBITRATION_CTRL_CRT_PRIORITY_5                 5
#define ARBITRATION_CTRL_CRT_PRIORITY_6                 6
#define ARBITRATION_CTRL_CRT_PRIORITY_7                 7

#define CMD_INTPR_CTRL                                  0x000018
#define CMD_INTPR_CTRL_STATUS                           31:31
#define CMD_INTPR_CTRL_STATUS_STOPPED                   0
#define CMD_INTPR_CTRL_STATUS_RUNNING                   1
#define CMD_INTPR_CTRL_EXT                              27:27
#define CMD_INTPR_CTRL_EXT_LOCAL                        0
#define CMD_INTPR_CTRL_EXT_EXTERNAL                     1
#define CMD_INTPR_CTRL_CS                               26:26
#define CMD_INTPR_CTRL_CS_0                             0
#define CMD_INTPR_CTRL_CS_1                             1
#define CMD_INTPR_CTRL_ADDRESS                          25:0

#define CMD_INTPR_CONDITIONS                            0x00001C

#define CMD_INTPR_RETURN                                0x000020
#define CMD_INTPR_RETURN_EXT                            27:27
#define CMD_INTPR_RETURN_EXT_LOCAL                      0
#define CMD_INTPR_RETURN_EXT_EXTERNAL                   1
#define CMD_INTPR_RETURN_CS                             26:26
#define CMD_INTPR_RETURN_CS_0                           0
#define CMD_INTPR_RETURN_CS_1                           1
#define CMD_INTPR_RETURN_ADDRESS                        25:0

#define CMD_INTPR_STATUS                                0x000024
#define CMD_INTPR_STATUS_2D_MEMORY_FIFO                 20:20
#define CMD_INTPR_STATUS_2D_MEMORY_FIFO_NOT_EMPTY       0
#define CMD_INTPR_STATUS_2D_MEMORY_FIFO_EMPTY           1
#define CMD_INTPR_STATUS_COMMAND_FIFO                   19:19
#define CMD_INTPR_STATUS_COMMAND_FIFO_NOT_EMPTY         0
#define CMD_INTPR_STATUS_COMMAND_FIFO_EMPTY             1
#define CMD_INTPR_STATUS_CSC_STATUS                     18:18
#define CMD_INTPR_STATUS_CSC_STATUS_IDLE                0
#define CMD_INTPR_STATUS_CSC_STATUS_BUSY                1
#define CMD_INTPR_STATUS_MEMORY_DMA                     17:17
#define CMD_INTPR_STATUS_MEMORY_DMA_IDLE                0
#define CMD_INTPR_STATUS_MEMORY_DMA_BUSY                1
#define CMD_INTPR_STATUS_CRT_STATUS                     16:16
#define CMD_INTPR_STATUS_CRT_STATUS_CURRENT             0
#define CMD_INTPR_STATUS_CRT_STATUS_PENDING             1
#define CMD_INTPR_STATUS_CURRENT_FIELD                  15:15
#define CMD_INTPR_STATUS_CURRENT_FIELD_ODD              0
#define CMD_INTPR_STATUS_CURRENT_FIELD_EVEN             1
#define CMD_INTPR_STATUS_VIDEO_STATUS                   14:14
#define CMD_INTPR_STATUS_VIDEO_STATUS_CURRENT           0
#define CMD_INTPR_STATUS_VIDEO_STATUS_PENDING           1
#define CMD_INTPR_STATUS_PANEL_STATUS                   13:13
#define CMD_INTPR_STATUS_PANEL_STATUS_CURRENT           0
#define CMD_INTPR_STATUS_PANEL_STATUS_PENDING           1
#define CMD_INTPR_STATUS_CRT_SYNC                       12:12
#define CMD_INTPR_STATUS_CRT_SYNC_INACTIVE              0
#define CMD_INTPR_STATUS_CRT_SYNC_ACTIVE                1
#define CMD_INTPR_STATUS_PANEL_SYNC                     11:11
#define CMD_INTPR_STATUS_PANEL_SYNC_INACTIVE            0
#define CMD_INTPR_STATUS_PANEL_SYNC_ACTIVE              1
#define CMD_INTPR_STATUS_2D_SETUP                       2:2
#define CMD_INTPR_STATUS_2D_SETUP_IDLE                  0
#define CMD_INTPR_STATUS_2D_SETUP_BUSY                  1
#define CMD_INTPR_STATUS_2D_FIFO                        1:1
#define CMD_INTPR_STATUS_2D_FIFO_NOT_EMPTY              0
#define CMD_INTPR_STATUS_2D_FIFO_EMPTY                  1
#define CMD_INTPR_STATUS_2D_ENGINE                      0:0
#define CMD_INTPR_STATUS_2D_ENGINE_IDLE                 0
#define CMD_INTPR_STATUS_2D_ENGINE_BUSY                 1

#define RAW_INT_STATUS                                  0x000028
#define RAW_INT_STATUS_USB_SLAVE_PLUG_IN                5:5
#define RAW_INT_STATUS_USB_SLAVE_PLUG_IN_INACTIVE       0
#define RAW_INT_STATUS_USB_SLAVE_PLUG_IN_ACTIVE         1
#define RAW_INT_STATUS_USB_SLAVE_PLUG_IN_CLEAR          1
#define RAW_INT_STATUS_ZVPORT                           4:4
#define RAW_INT_STATUS_ZVPORT_INACTIVE                  0
#define RAW_INT_STATUS_ZVPORT_ACTIVE                    1
#define RAW_INT_STATUS_ZVPORT_CLEAR                     1
#define RAW_INT_STATUS_CRT_VSYNC                        3:3
#define RAW_INT_STATUS_CRT_VSYNC_INACTIVE               0
#define RAW_INT_STATUS_CRT_VSYNC_ACTIVE                 1
#define RAW_INT_STATUS_CRT_VSYNC_CLEAR                  1
#define RAW_INT_STATUS_USB_SLAVE                        2:2
#define RAW_INT_STATUS_USB_SLAVE_INACTIVE               0
#define RAW_INT_STATUS_USB_SLAVE_ACTIVE                 1
#define RAW_INT_STATUS_USB_SLAVE_CLEAR                  1
#define RAW_INT_STATUS_PANEL_VSYNC                      1:1
#define RAW_INT_STATUS_PANEL_VSYNC_INACTIVE             0
#define RAW_INT_STATUS_PANEL_VSYNC_ACTIVE               1
#define RAW_INT_STATUS_PANEL_VSYNC_CLEAR                1
#define RAW_INT_STATUS_CMD_INTPR                        0:0
#define RAW_INT_STATUS_CMD_INTPR_INACTIVE               0
#define RAW_INT_STATUS_CMD_INTPR_ACTIVE                 1
#define RAW_INT_STATUS_CMD_INTPR_CLEAR                  1

#define INT_STATUS                                      0x00002C
#define INT_STATUS_USB_SLAVE_PLUG_IN                    31:31
#define INT_STATUS_USB_SLAVE_PLUG_IN_INACTIVE           0
#define INT_STATUS_USB_SLAVE_PLUG_IN_ACTIVE             1
#define INT_STATUS_GPIO54                               30:30
#define INT_STATUS_GPIO54_INACTIVE                      0
#define INT_STATUS_GPIO54_ACTIVE                        1
#define INT_STATUS_GPIO53                               29:29
#define INT_STATUS_GPIO53_INACTIVE                      0
#define INT_STATUS_GPIO53_ACTIVE                        1
#define INT_STATUS_GPIO52                               28:28
#define INT_STATUS_GPIO52_INACTIVE                      0
#define INT_STATUS_GPIO52_ACTIVE                        1
#define INT_STATUS_GPIO51                               27:27
#define INT_STATUS_GPIO51_INACTIVE                      0
#define INT_STATUS_GPIO51_ACTIVE                        1
#define INT_STATUS_GPIO50                               26:26
#define INT_STATUS_GPIO50_INACTIVE                      0
#define INT_STATUS_GPIO50_ACTIVE                        1
#define INT_STATUS_GPIO49                               25:25
#define INT_STATUS_GPIO49_INACTIVE                      0
#define INT_STATUS_GPIO49_ACTIVE                        1
#define INT_STATUS_GPIO48                               24:24
#define INT_STATUS_GPIO48_INACTIVE                      0
#define INT_STATUS_GPIO48_ACTIVE                        1
#define INT_STATUS_I2C                                  23:23
#define INT_STATUS_I2C_INACTIVE                         0
#define INT_STATUS_I2C_ACTIVE                           1
#define INT_STATUS_PWM                                  22:22
#define INT_STATUS_PWM_INACTIVE                         0
#define INT_STATUS_PWM_ACTIVE                           1
#define INT_STATUS_DMA                                  20:20
#define INT_STATUS_DMA_INACTIVE                         0
#define INT_STATUS_DMA_ACTIVE                           1
#define INT_STATUS_PCI                                  19:19
#define INT_STATUS_PCI_INACTIVE                         0
#define INT_STATUS_PCI_ACTIVE                           1
#define INT_STATUS_I2S                                  18:18
#define INT_STATUS_I2S_INACTIVE                         0
#define INT_STATUS_I2S_ACTIVE                           1
#define INT_STATUS_AC97                                 17:17
#define INT_STATUS_AC97_INACTIVE                        0
#define INT_STATUS_AC97_ACTIVE                          1
#define INT_STATUS_USB_SLAVE                            16:16
#define INT_STATUS_USB_SLAVE_INACTIVE                   0
#define INT_STATUS_USB_SLAVE_ACTIVE                     1
#define INT_STATUS_UART1                                13:13
#define INT_STATUS_UART1_INACTIVE                       0
#define INT_STATUS_UART1_ACTIVE                         1
#define INT_STATUS_UART0                                12:12
#define INT_STATUS_UART0_INACTIVE                       0
#define INT_STATUS_UART0_ACTIVE                         1
#define INT_STATUS_CRT_VSYNC                            11:11
#define INT_STATUS_CRT_VSYNC_INACTIVE                   0
#define INT_STATUS_CRT_VSYNC_ACTIVE                     1
#define INT_STATUS_8051                                 10:10
#define INT_STATUS_8051_INACTIVE                        0
#define INT_STATUS_8051_ACTIVE                          1
#define INT_STATUS_SSP1                                 9:9
#define INT_STATUS_SSP1_INACTIVE                        0
#define INT_STATUS_SSP1_ACTIVE                          1
#define INT_STATUS_SSP0                                 8:8
#define INT_STATUS_SSP0_INACTIVE                        0
#define INT_STATUS_SSP0_ACTIVE                          1
#define INT_STATUS_USB_HOST                             6:6
#define INT_STATUS_USB_HOST_INACTIVE                    0
#define INT_STATUS_USB_HOST_ACTIVE                      1
#define INT_STATUS_2D                                   3:3
#define INT_STATUS_2D_INACTIVE                          0
#define INT_STATUS_2D_ACTIVE                            1
#define INT_STATUS_ZVPORT                               2:2
#define INT_STATUS_ZVPORT_INACTIVE                      0
#define INT_STATUS_ZVPORT_ACTIVE                        1
#define INT_STATUS_PANEL_VSYNC                          1:1
#define INT_STATUS_PANEL_VSYNC_INACTIVE                 0
#define INT_STATUS_PANEL_VSYNC_ACTIVE                   1
#define INT_STATUS_CMD_INTPR                            0:0
#define INT_STATUS_CMD_INTPR_INACTIVE                   0
#define INT_STATUS_CMD_INTPR_ACTIVE                     1

#define INT_MASK                                        0x000030
#define INT_MASK_USB_SLAVE_PLUG_IN                      31:31
#define INT_MASK_USB_SLAVE_PLUG_IN_DISABLE              0
#define INT_MASK_USB_SLAVE_PLUG_IN_ENABLE               1
#define INT_MASK_GPIO54                                 30:30
#define INT_MASK_GPIO54_DISABLE                         0
#define INT_MASK_GPIO54_ENABLE                          1
#define INT_MASK_GPIO53                                 29:29
#define INT_MASK_GPIO53_DISABLE                         0
#define INT_MASK_GPIO53_ENABLE                          1
#define INT_MASK_GPIO52                                 28:28
#define INT_MASK_GPIO52_DISABLE                         0
#define INT_MASK_GPIO52_ENABLE                          1
#define INT_MASK_GPIO51                                 27:27
#define INT_MASK_GPIO51_DISABLE                         0
#define INT_MASK_GPIO51_ENABLE                          1
#define INT_MASK_GPIO50                                 26:26
#define INT_MASK_GPIO50_DISABLE                         0
#define INT_MASK_GPIO50_ENABLE                          1
#define INT_MASK_GPIO49                                 25:25
#define INT_MASK_GPIO49_DISABLE                         0