blockoutint.mdl

realize analysis and design for computer-controlled system

Model {
  Name			  "blockoutint"
  Version		  2.09
  SimParamPage		  Solver
  SampleTimeColors	  off
  InvariantConstants	  off
  WideVectorLines	  on
  ShowLineWidths	  off
  PaperOrientation	  landscape
  PaperType		  usletter
  PaperUnits		  inches
  StartTime		  "0.0"
  StopTime		  "10"
  Solver		  ode45
  RelTol		  "1e-8"
  AbsTol		  "1e-8"
  Refine		  "4"
  MaxStep		  "auto"
  InitialStep		  "auto"
  FixedStep		  "auto"
  MaxOrder		  5
  OutputOption		  RefineOutputTimes
  OutputTimes		  "[]"
  LoadExternalInput	  off
  ExternalInput		  "[t, u]"
  SaveTime		  off
  TimeSaveName		  "tout"
  SaveState		  off
  StateSaveName		  "xout"
  SaveOutput		  off
  OutputSaveName	  "yout"
  LoadInitialState	  off
  InitialState		  "xInitial"
  SaveFinalState	  off
  FinalStateName	  "xFinal"
  LimitMaxRows		  off
  MaxRows		  "1000"
  Decimation		  "1"
  AlgebraicLoopMsg	  warning
  MinStepSizeMsg	  warning
  UnconnectedInputMsg	  warning
  UnconnectedOutputMsg	  warning
  UnconnectedLineMsg	  warning
  ConsistencyChecking	  off
  ZeroCross		  on
  SimulationMode	  normal
  RTWSystemTargetFile	  "grt.tlc"
  RTWInlineParameters	  off
  RTWRetainRTWFile	  off
  RTWTemplateMakefile	  "grt_unix.tmf"
  RTWMakeCommand	  "make_rtw"
  RTWGenerateCodeOnly	  off
  ExtModeMexFile	  "ext_comm"
  ExtModeBatchMode	  off
  BlockDefaults {
    Orientation		    right
    ForegroundColor	    black
    BackgroundColor	    white
    DropShadow		    off
    NamePlacement	    normal
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    normal
    FontAngle		    normal
    ShowName		    on
  }
  AnnotationDefaults {
    HorizontalAlignment	    center
    VerticalAlignment	    middle
    ForegroundColor	    black
    BackgroundColor	    white
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    normal
    FontAngle		    normal
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    normal
    FontAngle		    normal
  }
  System {
    Name		    "blockoutint"
    Location		    [547, 540, 1170, 908]
    Open		    on
    ScreenColor		    white
    Block {
      BlockType		      Demux
      Name		      "Demux"
      Ports		      [1, 2, 0, 0, 0]
      Position		      [195, 140, 235, 175]
      BackgroundColor	      magenta
      DropShadow	      on
      ShowName		      off
      Outputs		      "2"
    }
    Block {
      BlockType		      Demux
      Name		      "Demux1"
      Ports		      [1, 2, 0, 0, 0]
      Position		      [220, 35, 260, 70]
      BackgroundColor	      magenta
      DropShadow	      on
      ShowName		      off
      Outputs		      "2"
    }
    Block {
      BlockType		      DiscreteStateSpace
      Name		      "Discrete State-Space"
      Position		      [85, 33, 200, 77]
      BackgroundColor	      magenta
      DropShadow	      on
      ShowName		      off
      A			      "phim"
      B			      "gam"
      C			      "[Cff;Cm]"
      D			      "[lam;0]"
      X0		      "0"
      SampleTime	      "h"
    }
    Block {
      BlockType		      SubSystem
      Name		      "Double\n integrator"
      Ports		      [1, 2, 0, 0, 0]
      Position		      [460, 127, 490, 178]
      DropShadow	      on
      ShowPortLabels	      off
      System {
	Name			"Double\n integrator"
	Location		[374, 307, 621, 461]
	Open			off
	ScreenColor		white
	Block {
	  BlockType		  Inport
	  Name			  "u"
	  Position		  [30, 60, 50, 80]
	  Port			  "1"
	  PortWidth		  "-1"
	  SampleTime		  "-1"
	}
	Block {
	  BlockType		  Integrator
	  Name			  "x1"
	  Ports			  [1, 1, 0, 0, 0]
	  Position		  [125, 60, 145, 80]
	  ExternalReset		  none
	  InitialConditionSource  internal
	  InitialCondition	  "x10"
	  LimitOutput		  off
	  UpperSaturationLimit	  "inf"
	  LowerSaturationLimit	  "-inf"
	  ShowSaturationPort	  off
	  ShowStatePort		  off
	  AbsoluteTolerance	  "auto"
	}
	Block {
	  BlockType		  Integrator
	  Name			  "x2"
	  Ports			  [1, 1, 0, 0, 0]
	  Position		  [80, 60, 100, 80]
	  ExternalReset		  none
	  InitialConditionSource  internal
	  InitialCondition	  "x20"
	  LimitOutput		  off
	  UpperSaturationLimit	  "inf"
	  LowerSaturationLimit	  "-inf"
	  ShowSaturationPort	  off
	  ShowStatePort		  off
	  AbsoluteTolerance	  "auto"
	}
	Block {
	  BlockType		  Outport
	  Name			  "y"
	  Position		  [170, 60, 190, 80]
	  Port			  "1"
	  OutputWhenDisabled	  held
	  InitialOutput		  "0"
	}
	Block {
	  BlockType		  Outport
	  Name			  "ydot"
	  Position		  [170, 100, 190, 120]
	  Port			  "2"
	  OutputWhenDisabled	  held
	  InitialOutput		  "0"
	}
	Line {
	  SrcBlock		  "x1"
	  SrcPort		  1
	  DstBlock		  "y"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "x2"
	  SrcPort		  1
	  Points		  [0, 0]
	  Branch {
	    Points		    [0, 40]
	    DstBlock		    "ydot"
	    DstPort		    1
	  }
	  Branch {
	    DstBlock		    "x1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "u"
	  SrcPort		  1
	  DstBlock		  "x2"
	  DstPort		  1
	}
      }
    }
    Block {
      BlockType		      SubSystem
      Name		      "Kalmint"
      Ports		      [2, 2, 0, 0, 0]
      Position		      [120, 147, 150, 198]
      BackgroundColor	      magenta
      DropShadow	      on
      ShowPortLabels	      off
      System {
	Name			"Kalmint"
	Location		[221, 615, 714, 834]
	Open			off
	ScreenColor		magenta
	Block {
	  BlockType		  Inport
	  Name			  "ufb"
	  Position		  [20, 5, 40, 25]
	  Port			  "1"
	  PortWidth		  "-1"
	  SampleTime		  "-1"
	}
	Block {
	  BlockType		  Inport
	  Name			  "ye"
	  Position		  [20, 60, 40, 80]
	  Port			  "2"
	  PortWidth		  "-1"
	  SampleTime		  "-1"
	}
	Block {
	  BlockType		  Demux
	  Name			  "Demux"
	  Ports			  [1, 2, 0, 0, 0]
	  Position		  [290, 50, 330, 85]
	  ShowName		  off
	  Outputs		  "2"
	}
	Block {
	  BlockType		  DiscreteStateSpace
	  Name			  "Dis. State-space"
	  Position		  [155, 47, 270, 93]
	  ShowName		  off
	  A			  "[2 -1; 1 0]"
	  B			  "[1 k1; 0 k2]"
	  C			  "[1 0; 0 1]"
	  D			  "[0 0; 0 0]"
	  X0			  "0"
	  SampleTime		  "h"
	}
	Block {
	  BlockType		  DiscreteTransferFcn
	  Name			  "Discrete\nTransfer Fcn"
	  Position		  [185, 152, 230, 188]
	  ShowName		  off
	  Numerator		  "[1]"
	  Denominator		  "[1 -1]"
	  SampleTime		  "h"
	}
	Block {
	  BlockType		  Gain
	  Name			  "Gain"
	  Position		  [260, 149, 315, 191]
	  ShowName		  off
	  Gain			  "-Kw"
	}
	Block {
	  BlockType		  Gain
	  Name			  "Gain1"
	  Position		  [155, 99, 210, 141]
	  Orientation		  left
	  ShowName		  off
	  Gain			  "h*h/2"
	}
	Block {
	  BlockType		  Mux
	  Name			  "Mux1"
	  Ports			  [2, 1, 0, 0, 0]
	  Position		  [105, 51, 140, 84]
	  ShowName		  off
	  Inputs		  "2"
	}
	Block {
	  BlockType		  Mux
	  Name			  "Mux2"
	  Ports			  [2, 1, 0, 0, 0]
	  Position		  [375, 51, 410, 84]
	  ShowName		  off
	  Inputs		  "2"
	}
	Block {
	  BlockType		  Sum
	  Name			  "Sum"
	  Ports			  [2, 1, 0, 0, 0]
	  Position		  [60, 65, 80, 85]
	  ShowName		  off
	  Inputs		  "+-"
	}
	Block {
	  BlockType		  Sum
	  Name			  "Sum1"
	  Ports			  [2, 1, 0, 0, 0]
	  Position		  [60, 25, 80, 45]
	  ShowName		  off
	  Inputs		  "--"
	}
	Block {
	  BlockType		  Sum
	  Name			  "Sum2"
	  Ports			  [2, 1, 0, 0, 0]
	  Position		  [240, 110, 260, 130]
	  Orientation		  left
	  ShowName		  off
	  Inputs		  "++"
	}
	Block {
	  BlockType		  Outport
	  Name			  "ehat"
	  Position		  [430, 60, 450, 80]
	  Port			  "1"
	  OutputWhenDisabled	  held
	  InitialOutput		  "0"
	}
	Block {
	  BlockType		  Outport
	  Name			  "vhat"
	  Position		  [420, 160, 440, 180]
	  Port			  "2"
	  OutputWhenDisabled	  held
	  InitialOutput		  "0"
	}
	Line {
	  SrcBlock		  "Mux1"
	  SrcPort		  1
	  DstBlock		  "Dis. State-space"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Dis. State-space"
	  SrcPort		  1
	  DstBlock		  "Demux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "ye"
	  SrcPort		  1
	  DstBlock		  "Sum"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux2"
	  SrcPort		  1
	  DstBlock		  "ehat"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sum"
	  SrcPort		  1
	  Points		  [0, 0]
	  Branch {
	    DstBlock		    "Mux1"
	    DstPort		    2
	  }
	  Branch {
	    Points		    [0, 95]
	    DstBlock		    "Discrete\nTransfer Fcn"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Discrete\nTransfer Fcn"
	  SrcPort		  1
	  DstBlock		  "Gain"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "ufb"
	  SrcPort		  1
	  DstBlock		  "Sum1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Sum1"
	  SrcPort		  1
	  Points		  [0, 25]
	  DstBlock		  "Mux1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Gain"
	  SrcPort		  1
	  Points		  [0, 0]
	  Branch {
	    DstBlock		    "vhat"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [10, 0; 0, 35; -315, 0; 0, -165]
	    DstBlock		    "Sum1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Demux"
	  SrcPort		  1
	  Points		  [0, 0]
	  Branch {
	    DstBlock		    "Mux2"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [5, 0; 0, 55]
	    DstBlock		    "Sum2"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Demux"
	  SrcPort		  2
	  Points		  [0, 0]