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📄 block16.mdl

📁 realize analysis and design for computer-controlled system
💻 MDL
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Model {  Name			  "block16"  Version		  2.00  SimParamPage		  Solver  SampleTimeColors	  off  WideVectorLines	  on  PaperOrientation	  landscape  StartTime		  "0.0"  StopTime		  "10"  Solver		  ode45  RelTol		  "1e-6"  AbsTol		  "1e-6"  Refine		  "1"  MaxStep		  "auto"  InitialStep		  "auto"  FixedStep		  "auto"  MaxOrder		  5  OutputOption		  RefineOutputTimes  OutputTimes		  "[]"  LoadExternalInput	  off  ExternalInput		  "[t, u]"  SaveTime		  off  TimeSaveName		  "tout"  SaveState		  off  StateSaveName		  "xout"  SaveOutput		  off  OutputSaveName	  "yout"  LoadInitialState	  off  InitialState		  "xInitial"  SaveFinalState	  off  FinalStateName	  "xFinal"  LimitMaxRows		  off  MaxRows		  "1000"  Decimation		  "1"  AlgebraicLoopMsg	  warning  MinStepSizeMsg	  warning  UnconnectedInputMsg	  warning  UnconnectedOutputMsg	  warning  UnconnectedLineMsg	  warning  ConsistencyChecking	  off  ZeroCross		  on  BlockDefaults {    Orientation		    right    ForegroundColor	    black    BackgroundColor	    white    DropShadow		    off    NamePlacement	    normal    FontName		    "Helvetica"    FontSize		    10    FontWeight		    normal    FontAngle		    normal    ShowName		    on  }  AnnotationDefaults {    HorizontalAlignment	    center    VerticalAlignment	    middle    ForegroundColor	    black    BackgroundColor	    white    DropShadow		    off    FontName		    "Helvetica"    FontSize		    10    FontWeight		    normal    FontAngle		    normal  }  System {    Name		    "block16"    Location		    [75, 81, 621, 461]    Open		    on    ScreenColor		    white    Block {      BlockType		      DiscreteStateSpace      Name		      "Discrete State-Space"      Position		      [130, 238, 245, 282]      BackgroundColor	      magenta      DropShadow	      on      ShowName		      off      A			      "1-b*h"      B			      "[0 h*(b-a) ]"      C			      "K"      D			      "[K*a/b -K]"      X0		      "0"      SampleTime	      "h"    }    Block {      BlockType		      SubSystem      Name		      "Double\n integrator1"      Position		      [255, 72, 285, 123]      DropShadow	      on      ShowPortLabels	      off      System {	Name			"Double\n integrator1"	Location		[425, 443, 766, 657]	Open			off	ScreenColor		white	Block {	  BlockType		  Inport	  Name			  "in_1"	  Position		  [30, 60, 50, 80]	  Port			  "1"	  PortWidth		  "-1"	  SampleTime		  "-1"	}	Block {	  BlockType		  Integrator	  Name			  "x5"	  Position		  [125, 60, 145, 80]	  ExternalReset		  none	  InitialConditionSource  internal	  InitialCondition	  "0"	  LimitOutput		  off	  UpperSaturationLimit	  "inf"	  LowerSaturationLimit	  "-inf"	  ShowSaturationPort	  off	  ShowStatePort		  off	  AbsoluteTolerance	  "auto"	}	Block {	  BlockType		  Integrator	  Name			  "x6"	  Position		  [80, 60, 100, 80]	  ExternalReset		  none	  InitialConditionSource  internal	  InitialCondition	  "0"	  LimitOutput		  off	  UpperSaturationLimit	  "inf"	  LowerSaturationLimit	  "-inf"	  ShowSaturationPort	  off	  ShowStatePort		  off	  AbsoluteTolerance	  "auto"	}	Block {	  BlockType		  Outport	  Name			  "out_1"	  Position		  [170, 60, 190, 80]	  Port			  "1"	  OutputWhenDisabled	  held	  InitialOutput		  "0"	}	Block {	  BlockType		  Outport	  Name			  "out_2"	  Position		  [170, 100, 190, 120]	  Port			  "2"	  OutputWhenDisabled	  held	  InitialOutput		  "0"	}	Line {	  SrcBlock		  "x5"	  SrcPort		  1	  DstBlock		  "out_1"	  DstPort		  1	}	Line {	  SrcBlock		  "x6"	  SrcPort		  1	  Points		  [0, 0]	  Branch {	    Points		    [0, 40]	    DstBlock		    "out_2"	    DstPort		    1	  }	  Branch {	    DstBlock		    "x5"	    DstPort		    1	  }	}	Line {	  SrcBlock		  "in_1"	  SrcPort		  1	  DstBlock		  "x6"	  DstPort		  1	}      }    }    Block {      BlockType		      SubSystem      Name		      "Double\n integrator2"      Position		      [315, 232, 345, 283]      DropShadow	      on      ShowPortLabels	      off      System {	Name			"Double\n integrator2"	Location		[425, 467, 618, 623]	Open			off	ScreenColor		white	Block {	  BlockType		  Inport	  Name			  "in_1"	  Position		  [30, 60, 50, 80]	  Port			  "1"	  PortWidth		  "-1"	  SampleTime		  "-1"	}	Block {	  BlockType		  Integrator	  Name			  "x5"	  Position		  [125, 60, 145, 80]	  ExternalReset		  none	  InitialConditionSource  internal	  InitialCondition	  "0"	  LimitOutput		  off	  UpperSaturationLimit	  "inf"	  LowerSaturationLimit	  "-inf"	  ShowSaturationPort	  off	  ShowStatePort		  off	  AbsoluteTolerance	  "auto"	}	Block {	  BlockType		  Integrator	  Name			  "x6"	  Position		  [80, 60, 100, 80]	  ExternalReset		  none	  InitialConditionSource  internal	  InitialCondition	  "0"	  LimitOutput		  off	  UpperSaturationLimit	  "inf"	  LowerSaturationLimit	  "-inf"	  ShowSaturationPort	  off	  ShowStatePort		  off	  AbsoluteTolerance	  "auto"	}	Block {	  BlockType		  Outport	  Name			  "out_1"	  Position		  [170, 60, 190, 80]	  Port			  "1"	  OutputWhenDisabled	  held	  InitialOutput		  "0"	}	Block {	  BlockType		  Outport	  Name			  "out_2"	  Position		  [170, 100, 190, 120]	  Port			  "2"	  OutputWhenDisabled	  held	  InitialOutput		  "0"	}	Line {	  SrcBlock		  "x5"	  SrcPort		  1	  DstBlock		  "out_1"	  DstPort		  1	}	Line {	  SrcBlock		  "x6"	  SrcPort		  1	  Points		  [0, 0]	  Branch {	    Points		    [0, 40]	    DstBlock		    "out_2"	    DstPort		    1	  }	  Branch {	    DstBlock		    "x5"	    DstPort		    1	  }	}	Line {	  SrcBlock		  "in_1"	  SrcPort		  1	  DstBlock		  "x6"	  DstPort		  1	}      }    }    Block {      BlockType		      Mux      Name		      "Mux"      Position		      [75, 81, 105, 114]      DropShadow	      on      ShowName		      off      Inputs		      "2"    }    Block {      BlockType		      Mux      Name		      "Mux2"      Position		      [70, 241, 100, 274]      DropShadow	      on      ShowName		      off      Inputs		      "2"    }    Block {      BlockType		      StateSpace      Name		      "State-Space"      Position		      [125, 79, 200, 121]      DropShadow	      on      ShowName		      off      A			      "-b"      B			      "[0 b-a]"      C			      "K"      D			      "[K*a/b -K]"      X0		      "0"    }    Block {      BlockType		      Step      Name		      "Step"      Position		      [10, 80, 30, 100]      DropShadow	      on      Time		      "0"      Before		      "0"      After		      "uc"    }    Block {      BlockType		      Outport      Name		      "yc"      Position		      [420, 75, 440, 95]      Port		      "1"      OutputWhenDisabled      held      InitialOutput	      "0"    }    Block {      BlockType		      Outport      Name		      "vc"      Position		      [420, 115, 440, 135]      Port		      "2"      OutputWhenDisabled      held      InitialOutput	      "0"    }    Block {      BlockType		      Outport      Name		      "ucont"      Position		      [420, 35, 440, 55]      Port		      "3"      OutputWhenDisabled      held      InitialOutput	      "0"    }    Block {      BlockType		      Outport      Name		      "ys"      Position		      [420, 235, 440, 255]      Port		      "4"      OutputWhenDisabled      held      InitialOutput	      "0"    }    Block {      BlockType		      Outport      Name		      "vs"      Position		      [420, 275, 440, 295]      Port		      "5"      OutputWhenDisabled      held      InitialOutput	      "0"    }    Block {      BlockType		      Outport      Name		      "usamp"      Position		      [420, 195, 440, 215]      Port		      "6"      OutputWhenDisabled      held      InitialOutput	      "0"    }    Block {      BlockType		      Outport      Name		      "uc"      Position		      [80, 25, 100, 45]      Port		      "7"      OutputWhenDisabled      held      InitialOutput	      "0"    }    Line {      SrcBlock		      "Double\n integrator1"      SrcPort		      1      Points		      [0, 0]      Branch {	Points			[55, 0; 0, 80; -285, 0]	DstBlock		"Mux"	DstPort			2      }      Branch {	DstBlock		"yc"	DstPort			1      }    }    Line {      SrcBlock		      "Double\n integrator2"      SrcPort		      1      Points		      [0, 0]      Branch {	Points			[35, 0; 0, 85; -340, 0; 0, -65]	DstBlock		"Mux2"	DstPort			2      }      Branch {	DstBlock		"ys"	DstPort			1      }    }    Line {      SrcBlock		      "Double\n integrator1"      SrcPort		      2      Points		      [82, 0; 0, 15]      DstBlock		      "vc"      DstPort		      1    }    Line {      SrcBlock		      "Mux"      SrcPort		      1      DstBlock		      "State-Space"      DstPort		      1    }    Line {      SrcBlock		      "Mux2"      SrcPort		      1      DstBlock		      "Discrete State-Space"      DstPort		      1    }    Line {      SrcBlock		      "Step"      SrcPort		      1      Points		      [0, 0]      Branch {	DstBlock		"Mux"	DstPort			1      }      Branch {	Points			[10, 0; 0, 160]	DstBlock		"Mux2"	DstPort			1      }      Branch {	Points			[10, 0; 0, -55]	DstBlock		"uc"	DstPort			1      }    }    Line {      SrcBlock		      "Discrete State-Space"      SrcPort		      1      Points		      [0, 0]      Branch {	DstBlock		"Double\n integrator2"	DstPort			1      }      Branch {	Points			[25, 0; 0, -55]	DstBlock		"usamp"	DstPort			1      }    }    Line {      SrcBlock		      "State-Space"      SrcPort		      1      Points		      [0, 0]      Branch {	DstBlock		"Double\n integrator1"	DstPort			1      }      Branch {	Points			[20, 0; 0, -55]	DstBlock		"ucont"	DstPort			1      }    }    Line {      SrcBlock		      "Double\n integrator2"      SrcPort		      2      Points		      [25, 0; 0, 15]      DstBlock		      "vs"      DstPort		      1    }  }}

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