📄 omap2evm.h
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/******************************************************************************* * (C) Copyright 2007 Mistral <www.mistralsolutions.com> * * X-Loader Configuation settings for the OMAP2EVM. * * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA*******************************************************************************/#ifndef __CONFIG_H#define __CONFIG_H/* serial printf facility takes about 3.5K */#define CFG_PRINTF 1 /* * High Level Configuration Options */#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */#define CONFIG_OMAP 1 /* in a TI OMAP core */#define CONFIG_OMAP2EVM 1 /* and OMAP2430 board */#define CONFIG_OMAP243X 1#define PRCM_CONFIG_5A 1#define CFG_2430SDRAM_DDR 1#define SDRC_R_B_C 1/* Boot type */#define CFG_NAND 1 /* for nand booting... */#define NAND_BASE 0x00000000 /* NAND flash */#ifdef CFG_NAND#define OMAP24XX_GPMC_CS0_SIZE GPMC_SIZE_128M#define OMAP24XX_GPMC_CS0_MAP NAND_BASE#endif/* Another dependency on u-boot */#define sdelay delay #include <asm/arch/omap2430.h> /* get chip and board defs */#ifdef CFG_PRINTF#define CFG_NS16550#define CFG_NS16550_SERIAL#define CFG_NS16550_REG_SIZE (-4)#define CFG_NS16550_CLK 48000000 /* can be 12M/32Khz or 48Mhz */#define CFG_NS16550_COM1 OMAP2430_UART1#define CFG_NS16550_COM3 OMAP2430_UART3 /* * select serial console configuration */#define CONFIG_CONS_INDEX 1#define CONFIG_BAUDRATE 115200 /* Baud Rate 115200 */#define CFG_PBSIZE 64 /* Page Buffer */#endif /* CFG_PRINTF *//* * Miscellaneous configurable options */#define CFG_LOADADDR 0x80E80000 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ /****************************************************************************** * Stack sizes * The stack sizes are set up in start.S using the settings below*******************************************************************************/#define CONFIG_STACKSIZE ( 128 * 1024 )#define CFG_NAND_MT29F1GXX /* Micro MT29F1GxxABB 16-Bit 128MBytes chip *//* NAND is partitioned: * 0x00000000 - 0x00020000 Booting Image * 0x00020000 - 0x00080000 U-Boot Image * 0x00080000 - 0x000a0000 U-Boot Env Data (X-loader doesn't care) * 0x000a0000 - 0x002a0000 Kernel Image * 0x002a0000 - 0x006a0000 Ramdisk * 0x006a0000 - 0x08000000 JFFS2 filesystem */#define NAND_UBOOT_START 0x0020000#define NAND_UBOOT_END 0x0080000#define NAND_BLOCK_SIZE 0x20000 #define GPMC_CONFIG (OMAP24XX_GPMC_BASE+0x50)#define GPMC_NAND_COMMAND_0 (OMAP24XX_GPMC_BASE+0x7C)#define GPMC_NAND_ADDRESS_0 (OMAP24XX_GPMC_BASE+0x80)#define GPMC_NAND_DATA_0 (OMAP24XX_GPMC_BASE+0x84)#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)GPMC_NAND_COMMAND_0 = d;} while(0)#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)GPMC_NAND_ADDRESS_0 = d;} while(0)#define WRITE_NAND(d, adr) do {*(volatile u16 *)GPMC_NAND_DATA_0 = d;} while(0)#define READ_NAND(adr) (*(volatile u16 *)GPMC_NAND_DATA_0)#define NAND_WAIT_READY()#define NAND_WP_OFF() do {*(volatile u32 *)(GPMC_CONFIG) |= 0x00000010;} while(0)#define NAND_WP_ON() do {*(volatile u32 *)(GPMC_CONFIG) &= ~0x00000010;} while(0)#define NAND_CTL_CLRALE(adr) #define NAND_CTL_SETALE(adr) #define NAND_CTL_CLRCLE(adr) #define NAND_CTL_SETCLE(adr) #define NAND_DISABLE_CE() #define NAND_ENABLE_CE() #endif/* __CONFIG_H */
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