mx21_inthandlers.c

MX21_InitCodeLib.rar freescale mx21系列ARM芯片9328的WINCE5.0下初始化代码

/**********************************************************************
*
*         (C) COPYRIGHT 2004 FREESCALE, INC.
*         ALL RIGHTS RESERVED
*
*
*     Group/Division: WMSG/MMDO
*
*    Description	: 
*                    
*
*     Related Specifications:
*
*     Errata:
*
*     File Name: MX21_IntHandlers.c
*     Revision Number: 0.1
*     Author(s): Sharad Kumar
*     Date created: 30Apr2004
*     Revision History:
*        Date      Rev     Description
*        ----      ---     -----------
*        30Apr2004  0.1     First Draft
*
**********************************************************************/


#include "MX21_IntHandler.h"

volatile int gFastInt;
volatile int gNormInt;

extern void
uart2_DemoInterruptHandler(void);

/* look up table of normal ISRs */
funct_t vect_IRQ[64] = 
					{
					norm_scr_isr, norm_scr_isr, norm_scr_isr, norm_scr_isr,
					norm_scr_isr, norm_scr_isr, norm_scr_isr, norm_scr_isr,					
					norm_gpio_isr, norm_firi_isr, norm_sdhc2_isr, norm_sdhc1_isr,  					
					norm_i2c_isr, norm_ssi2_isr, norm_ssi1_isr, norm_cspi2_isr,					
					norm_cspi1_isr, norm_uart4_isr, norm_uart3_isr, norm_uart2_isr,					
					norm_uart1_isr, norm_kpp_isr, norm_rtc_isr, norm_pwm_isr,					
					norm_gpt3_isr, norm_gpt2_isr, norm_gpt1_isr, norm_wdog_isr,					
					norm_pcmcia_isr, norm_nfc_isr, norm_bmi_isr, norm_csi_isr,				
					norm_dmach0_isr, norm_dmach1_isr, norm_dmach2_isr, norm_dmach3_isr,					
					norm_dmach4_isr, norm_dmach5_isr, norm_dmach6_isr, norm_dmach7_isr,
					norm_dmach8_isr, norm_dmach9_isr, norm_dmach10_isr, norm_dmach11_isr,					
					norm_dmach12_isr, norm_dmach13_isr, norm_dmach14_isr, norm_dmach15_isr,					
					norm_scr_isr,  norm_emmaenc_isr, norm_emmadec_isr, norm_emmaprp_isr,					
					norm_emmaapp_isr, norm_usbwkup_isr, norm_usbmnp_isr, norm_usbdma_isr,					
					norm_usbfunc_isr, norm_usbhost_isr, norm_usbctrl_isr, norm_scr_isr,
					norm_slcdc_isr, norm_lcdc_isr, norm_scr_isr, norm_scr_isr,													
					};

/* look up table of fast ISRs */					 
funct_t vect_FIQ[64] = 
					{
					fast_scr_isr, fast_scr_isr, fast_scr_isr, fast_scr_isr,
					fast_scr_isr, fast_scr_isr, fast_scr_isr, fast_scr_isr,					
					fast_gpio_isr, fast_firi_isr, fast_sdhc2_isr, fast_sdhc1_isr,  					
					fast_i2c_isr, fast_ssi2_isr, fast_ssi1_isr, fast_cspi2_isr,					
					fast_cspi1_isr, fast_uart4_isr, fast_uart3_isr, fast_uart2_isr,					
					fast_uart1_isr, fast_kpp_isr, fast_rtc_isr, fast_pwm_isr,					
					fast_gpt3_isr, fast_gpt2_isr, fast_gpt1_isr, fast_wdog_isr,					
					fast_pcmcia_isr, fast_nfc_isr, fast_bmi_isr, fast_csi_isr,				
					fast_dmach0_isr, fast_dmach1_isr, fast_dmach2_isr, fast_dmach3_isr,					
					fast_dmach4_isr, fast_dmach5_isr, fast_dmach6_isr, fast_dmach7_isr,
					fast_dmach8_isr, fast_dmach9_isr, fast_dmach10_isr, fast_dmach11_isr,					
					fast_dmach12_isr, fast_dmach13_isr, fast_dmach14_isr, fast_dmach15_isr,					
					fast_scr_isr,  fast_emmaenc_isr, fast_emmadec_isr, fast_emmaprp_isr,					
					fast_emmaapp_isr, fast_usbwkup_isr, fast_usbmnp_isr, fast_usbdma_isr,					
					fast_usbfunc_isr, fast_usbhost_isr, fast_usbctrl_isr, fast_scr_isr,
					fast_slcdc_isr, fast_lcdc_isr, fast_scr_isr, fast_scr_isr,
					};



//---------------------------------------------------
// SWI Handler                                                                 
// This function handles SWI interrupts.  				                      
//---------------------------------------------------

void 
C_SWI_Handler( int32_t swi_num, 
               int32_t *regs )
{
	printf(" Msg: In the SWI Handler\n");
    switch( swi_num )
    {
    	case 0:
    	break;
		default:
    	break;
    }
}

//---------------------------------------------------
// Undefined Handler                                                                 
//---------------------------------------------------
void 
C_Undefined_Handler(void)
{
	// no actual undefined handler
	// has been writtem. Substitute
	// the comment for handler code	return;
	printf(" Msg: In the Undefined Handler\n");
	return;
}

//---------------------------------------------------
// Prefetch Handler                                                                 
// This function handles Prefetch interrupts.  				                      
//---------------------------------------------------
void 
C_Prefetch_Handler(void)
{
	// no actual prefetch handler
	// has been writtem. Substitute
	// the comment for handler code
	printf(" Msg: In the Prefetch Handler\n");
	return;
}


//---------------------------------------------------
// Abort Handler                                                                 
// This function handles Abort interrupts.  				                      
//---------------------------------------------------
void 
C_Abort_Handler(void)
{
	// no actual abort handler
	// has been writtem. Substitute
	// the comment for handler code
	printf(" Msg: In the Abort Handler\n");
	return;
}


//---------------------------------------------------
// IRQ_Handler                                                                 
//  This function handles IRQ interrupts.  				                      
//---------------------------------------------------

void 
__irq C_IRQ_Handler(void)
{
	uint32_t vectNum;
	
	// determine highest pending normal interrupt	
	//vectNum = *((p_uint32_t)AITC_NIVECSR) >> 16;
	vectNum = AITC_NIVECSR.bits.NIVECTOR & 0x3F;

	// find the pointer to correct ISR in the look up table
	vect_IRQ[vectNum]();		
	
    // clear the interrupt source 
	AITC_ClearOneInt(vectNum);
	return;
}

//---------------------------------------------------
// FIQ_Handler                                                                 
// This function handles FIQ interrupts.  				                      
//---------------------------------------------------

void
__irq C_FIQ_Handler(void)
{
	uint32_t vectNum;
	
	// determine highest pending fast interrupt
	//vectNum = *(p_uint32_t)(AITC_FIVECSR) & 0x0000003F;	
	vectNum = AITC_FIVECSR.bits.FIVECTOR & 0x3F;	
	
	// find the pointer to correct FIQ in the look up table
	vect_FIQ[vectNum]();		
	
    // clear the interrupt source 
	AITC_ClearOneInt(vectNum);
	
	return;
}


//---------------------------------------------------
// Interrupt IRSs		                      
//---------------------------------------------------
void
fast_scr_isr(void)
{
	gFastInt++;
	return;
}

void
norm_scr_isr(void)
{
	gNormInt++;
	return;
}

void
norm_lcdc_isr(void) 
{ norm_scr_isr(); }

void
fast_lcdc_isr(void) { fast_scr_isr(); }

void
norm_slcdc_isr(void) { norm_scr_isr(); }

void
fast_slcdc_isr(void) { fast_scr_isr(); }

void
norm_usbctrl_isr(void) { norm_scr_isr(); }

void
fast_usbctrl_isr(void) { fast_scr_isr(); }

void
norm_usbhost_isr(void) { norm_scr_isr(); }

void
fast_usbhost_isr(void) { fast_scr_isr(); }

void
norm_usbfunc_isr(void) { norm_scr_isr(); }

void
fast_usbfunc_isr(void) { fast_scr_isr(); }

void
norm_usbdma_isr(void) { norm_scr_isr(); }

void
fast_usbdma_isr(void) { fast_scr_isr(); }

void
norm_usbmnp_isr(void) { norm_scr_isr(); }

void
fast_usbmnp_isr(void) { fast_scr_isr(); }

void
norm_usbwkup_isr(void) { norm_scr_isr(); }

void
fast_usbwkup_isr(void) { fast_scr_isr(); }

void
norm_emmaapp_isr(void) { norm_scr_isr(); }

void
fast_emmaapp_isr(void) { fast_scr_isr(); }

void
norm_emmaprp_isr(void) { norm_scr_isr(); }

void
fast_emmaprp_isr(void) { fast_scr_isr(); }

void
norm_emmadec_isr(void) { norm_scr_isr(); }

void
fast_emmadec_isr(void) { fast_scr_isr(); }

void
norm_emmaenc_isr(void) { norm_scr_isr(); }

void
fast_emmaenc_isr(void) { fast_scr_isr(); }

void
norm_dmach15_isr(void) { norm_scr_isr(); }

void
fast_dmach15_isr(void) { fast_scr_isr(); }

void
norm_dmach14_isr(void) { norm_scr_isr(); }

void
fast_dmach14_isr(void) { fast_scr_isr(); }

void
norm_dmach13_isr(void) { norm_scr_isr(); }

void
fast_dmach13_isr(void) { fast_scr_isr(); }

void
norm_dmach12_isr(void) { norm_scr_isr(); }

void
fast_dmach12_isr(void) { fast_scr_isr(); }

void
norm_dmach11_isr(void) { norm_scr_isr(); }

void
fast_dmach11_isr(void) { fast_scr_isr(); }

void
norm_dmach10_isr(void) { norm_scr_isr(); }

void
fast_dmach10_isr(void) { fast_scr_isr(); }

void
norm_dmach9_isr(void) { norm_scr_isr(); }

void
fast_dmach9_isr(void) { fast_scr_isr(); }

void
norm_dmach8_isr(void) { norm_scr_isr(); }

void
fast_dmach8_isr(void) { fast_scr_isr(); }

void
norm_dmach7_isr(void) { norm_scr_isr(); }

void
fast_dmach7_isr(void) { fast_scr_isr(); }

void
norm_dmach6_isr(void) { norm_scr_isr(); }

void
fast_dmach6_isr(void) { fast_scr_isr(); }

void
norm_dmach5_isr(void) { norm_scr_isr(); }

void
fast_dmach5_isr(void) { fast_scr_isr(); }

void
norm_dmach4_isr(void) { norm_scr_isr(); }

void
fast_dmach4_isr(void) { fast_scr_isr(); }

void
norm_dmach3_isr(void) { norm_scr_isr(); }

void
fast_dmach3_isr(void) { fast_scr_isr(); }

void
norm_dmach2_isr(void) { norm_scr_isr(); }

void
fast_dmach2_isr(void) { fast_scr_isr(); }

void
norm_dmach1_isr(void) { norm_scr_isr(); }

void
fast_dmach1_isr(void) { fast_scr_isr(); }

void
norm_dmach0_isr(void) { norm_scr_isr(); }

void
fast_dmach0_isr(void) { fast_scr_isr(); }

void
norm_csi_isr(void) { norm_scr_isr(); }

void
fast_csi_isr(void) { fast_scr_isr(); }

void
norm_bmi_isr(void) { norm_scr_isr(); }

void
fast_bmi_isr(void) { fast_scr_isr(); }

void
norm_nfc_isr(void) { norm_scr_isr(); }

void
fast_nfc_isr(void) { fast_scr_isr(); }

void
norm_pcmcia_isr(void) { norm_scr_isr(); }

void
fast_pcmcia_isr(void) { fast_scr_isr(); }

void
norm_wdog_isr(void) { norm_scr_isr(); }

void
fast_wdog_isr(void) { fast_scr_isr(); }

void
norm_gpt1_isr(void) { norm_scr_isr(); }

void
fast_gpt1_isr(void) { fast_scr_isr(); }

void
norm_gpt2_isr(void) { norm_scr_isr(); }

void
fast_gpt2_isr(void) { fast_scr_isr(); }

void
norm_gpt3_isr(void) { 
	norm_scr_isr();
	return;
}

void
fast_gpt3_isr(void) { fast_scr_isr(); }

void
norm_pwm_isr(void) { norm_scr_isr(); }

void
fast_pwm_isr(void) { fast_scr_isr(); }

void
norm_rtc_isr(void)
{
	gNormInt++;
	
	Rtc_DisInterrupts(RTC_SAM0,    // interrupt type
                      0);          // interrupt vector

	return;
}

void
fast_rtc_isr(void) { fast_scr_isr(); }

void
norm_kpp_isr(void) { norm_scr_isr(); }

void
fast_kpp_isr(void) { fast_scr_isr(); }

void
norm_uart1_isr(void) { norm_scr_isr(); }

void
fast_uart1_isr(void) { fast_scr_isr(); }


void
norm_uart2_isr(void) { 
	// uart2_DemoInterruptHandler(); 
	norm_scr_isr(); 
	return;
}

void
fast_uart2_isr(void) { fast_scr_isr(); }

void
norm_uart3_isr(void) { norm_scr_isr(); }

void
fast_uart3_isr(void) { fast_scr_isr(); }

void
norm_uart4_isr(void) { norm_scr_isr(); }

void
fast_uart4_isr(void) { fast_scr_isr(); }

void
norm_cspi1_isr(void) { norm_scr_isr(); }

void
fast_cspi1_isr(void) { fast_scr_isr(); }

void
norm_cspi2_isr(void) { norm_scr_isr(); }

void
fast_cspi2_isr(void) { fast_scr_isr(); }

void
norm_ssi1_isr(void) { norm_scr_isr(); }

void
fast_ssi1_isr(void) { fast_scr_isr(); }

void
norm_ssi2_isr(void) { norm_scr_isr(); }

void
fast_ssi2_isr(void) { fast_scr_isr(); }

void
norm_i2c_isr(void) { norm_scr_isr(); }

void
fast_i2c_isr(void) { fast_scr_isr(); }

void
norm_sdhc1_isr(void) { norm_scr_isr(); }

void
fast_sdhc1_isr(void) { fast_scr_isr(); }

void
norm_sdhc2_isr(void) { norm_scr_isr(); }

void
fast_sdhc2_isr(void) { fast_scr_isr(); }

void
norm_firi_isr(void) { norm_scr_isr(); }

void
fast_firi_isr(void) { fast_scr_isr(); }

void
norm_gpio_isr(void) { norm_scr_isr(); }

void
fast_gpio_isr(void) { fast_scr_isr(); }