📄 mx21_aipi.c
字号:
/**********************************************************************
*
* (C) COPYRIGHT 2004 FREESCALE, INC.
* ALL RIGHTS RESERVED
*
*
* Group/Division: WMSG/MMDO
*
* Description :
*
* Related Specifications:
*
* Errata:
*
* File Name: MX21_AIPI.c
* Revision Number: 0.1
* Author(s): Sharad Kumar
* Date created: 30Apr2004
* Revision History:
* Date Rev Description
* ---- --- -----------
* 30Apr2004 0.1 First Draft
*
**********************************************************************/
#include "MX21_AIPI.h"
AIPI1PerProperties AIPI1PeripheralSet[] = {
{ AIPI1_CONTROL, IPBUS_PSIZE_32 },
{ AIPI1_DMA, IPBUS_PSIZE_32 },
{ AIPI1_WDOG, IPBUS_PSIZE_16 },
{ AIPI1_GPT1, IPBUS_PSIZE_32 },
{ AIPI1_GPT2, IPBUS_PSIZE_32 },
{ AIPI1_GPT3, IPBUS_PSIZE_32 },
{ AIPI1_PWM, IPBUS_PSIZE_32 },
{ AIPI1_RTC, IPBUS_PSIZE_32 },
{ AIPI1_KPP, IPBUS_PSIZE_16,},
{ AIPI1_OWIRE, IPBUS_PSIZE_16 },
{ AIPI1_UART1, IPBUS_PSIZE_32 },
{ AIPI1_UART2, IPBUS_PSIZE_32 },
{ AIPI1_UART3, IPBUS_PSIZE_32 },
{ AIPI1_UART4, IPBUS_PSIZE_32 },
{ AIPI1_CSPI1, IPBUS_PSIZE_32 },
{ AIPI1_CSPI2, IPBUS_PSIZE_32 },
{ AIPI1_SSI1, IPBUS_PSIZE_32 },
{ AIPI1_SSI2, IPBUS_PSIZE_32 },
{ AIPI1_I2C, IPBUS_PSIZE_16 },
{ AIPI1_SDHC1, IPBUS_PSIZE_32 },
{ AIPI1_SDHC2, IPBUS_PSIZE_32 },
{ AIPI1_GPIO, IPBUS_PSIZE_32 },
{ AIPI1_AUDMUX, IPBUS_PSIZE_32 },
{ AIPI1_CSPI3, IPBUS_PSIZE_32 }
};
AIPI2PerProperties AIPI2PeripheralSet[] = {
{ AIPI2_CONTROL, IPBUS_PSIZE_32 },
{ AIPI2_LCDC, IPBUS_PSIZE_32 },
{ AIPI2_RTIC, IPBUS_PSIZE_32 },
{ AIPI2_USBOTG1, IPBUS_PSIZE_32 },
{ AIPI2_USBOTG2, IPBUS_PSIZE_32 },
{ AIPI2_EMMA, IPBUS_PSIZE_32 },
{ AIPI2_CRM, IPBUS_PSIZE_32 },
{ AIPI2_FIRI, IPBUS_PSIZE_32 },
{ AIPI2_RNGA, IPBUS_PSIZE_32 }
};
//---------------------------------------------------
// write to the AIPI1 PAR register to select the
// peripherals that can be accesed in user mode
//---------------------------------------------------
void
AIPI1_WritePAR(uint32_t data)
{
//WriteReg32(AIPI1_PAR, AIPI1_PAR_MASK, data);
AIPI1_PAR.all = data;
}
//---------------------------------------------------
// write to the AIPI1 PAR register to select the
// peripherals that can be accesed in user mode
//---------------------------------------------------
void
AIPI2_WritePAR(uint32_t data)
{
//WriteReg32(AIPI2_PAR, AIPI2_PAR_MASK, data);
AIPI2_PAR.all = data;
}
//---------------------------------------------------
// configure the size of AIPI1 peripherals. The argument
// to be passed specifies the peripheral name. Refer to the
// typedef declaration for aipi1_preipherals included
// in this header file.
//---------------------------------------------------
void
AIPI1_ConfigPeripheral(aipi1_peripherals aipi1Per)
{
// local variables
uint32_t _psr0;
uint32_t _psr1;
aipi_per_size _aipiPerSz;
// use look up table to determine
// peripheral size
_aipiPerSz = AIPI1PeripheralSet[aipi1Per].PerSize;
// determine individual bits
// for peripheral size
switch (_aipiPerSz)
{
case IPBUS_PSIZE_8:
_psr0 = 0;
_psr1 = 0;
break;
case IPBUS_PSIZE_16:
_psr0 = 1;
_psr1 = 0;
break;
case IPBUS_PSIZE_32:
_psr0 = 0;
_psr1 = 1;
break;
case IPBUS_UNOCCUPIED:
default:
_psr0 = 1;
_psr1 = 1;
break;
}
// bit shift to put the
// peripheral size bits
// in the correct bit fields
//_psr0 = _psr0 << aipi1Per;
//_psr1 = _psr1 << aipi1Per;
// write the appropriate bits
// in the PSR registers
switch (aipi1Per)
{
case AIPI1_CONTROL:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_CNTR_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_CNTR_MASK, _psr1);
AIPI1_PSR0.bits.AIPI1_Control = _psr0;
AIPI1_PSR1.bits.AIPI1_Control = _psr1;
break;
case AIPI1_DMA:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_DMA_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_DMA_MASK, _psr1);
AIPI1_PSR0.bits.DMA = _psr0;
AIPI1_PSR1.bits.DMA = _psr1;
break;
case AIPI1_WDOG:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_WDOG_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_WDOG_MASK, _psr1);
AIPI1_PSR0.bits.WDOG = _psr0;
AIPI1_PSR1.bits.WDOG = _psr1;
break;
case AIPI1_GPT1:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_GPT1_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_GPT1_MASK, _psr1);
AIPI1_PSR0.bits.GPT1 = _psr0;
AIPI1_PSR1.bits.GPT1 = _psr1;
break;
case AIPI1_GPT2:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_GPT2_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_GPT2_MASK, _psr1);
AIPI1_PSR0.bits.GPT2 = _psr0;
AIPI1_PSR1.bits.GPT2 = _psr1;
break;
case AIPI1_GPT3:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_GPT3_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_GPT3_MASK, _psr1);
AIPI1_PSR0.bits.GPT3 = _psr0;
AIPI1_PSR1.bits.GPT3 = _psr1;
break;
case AIPI1_PWM:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_PWM_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_PWM_MASK, _psr1);
AIPI1_PSR0.bits.PWM = _psr0;
AIPI1_PSR1.bits.PWM = _psr1;
break;
case AIPI1_RTC:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_RTC_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_RTC_MASK, _psr1);
AIPI1_PSR0.bits.RTC = _psr0;
AIPI1_PSR1.bits.RTC = _psr1;
break;
case AIPI1_KPP:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_KPP_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_KPP_MASK, _psr1);
AIPI1_PSR0.bits.KPP = _psr0;
AIPI1_PSR1.bits.KPP = _psr1;
break;
case AIPI1_OWIRE:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_OWIRE_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_OWIRE_MASK, _psr1);
AIPI1_PSR0.bits.OWIRE = _psr0;
AIPI1_PSR1.bits.OWIRE = _psr1;
break;
case AIPI1_UART1:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_UART1_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_UART1_MASK, _psr1);
AIPI1_PSR0.bits.UART1 = _psr0;
AIPI1_PSR1.bits.UART1 = _psr1;
break;
case AIPI1_UART2:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_UART2_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_UART2_MASK, _psr1);
AIPI1_PSR0.bits.UART2 = _psr0;
AIPI1_PSR1.bits.UART2 = _psr1;
break;
case AIPI1_UART3:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_UART3_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_UART3_MASK, _psr1);
AIPI1_PSR0.bits.UART3 = _psr0;
AIPI1_PSR1.bits.UART3 = _psr1;
break;
case AIPI1_UART4:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_UART4_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_UART4_MASK, _psr1);
AIPI1_PSR0.bits.UART4 = _psr0;
AIPI1_PSR1.bits.UART4 = _psr1;
break;
case AIPI1_CSPI1:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_CSPI1_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_CSPI1_MASK, _psr1);
AIPI1_PSR0.bits.CSPI1 = _psr0;
AIPI1_PSR1.bits.CSPI1 = _psr1;
break;
case AIPI1_CSPI2:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_CSPI2_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_CSPI2_MASK, _psr1);
AIPI1_PSR0.bits.CSPI2 = _psr0;
AIPI1_PSR1.bits.CSPI2 = _psr1;
break;
case AIPI1_SSI1:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_SSI1_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_SSI1_MASK, _psr1);
AIPI1_PSR0.bits.SSI1 = _psr0;
AIPI1_PSR1.bits.SSI1 = _psr1;
break;
case AIPI1_SSI2:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_SSI2_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_SSI2_MASK, _psr1);
AIPI1_PSR0.bits.SSI2 = _psr0;
AIPI1_PSR1.bits.SSI2 = _psr1;
break;
case AIPI1_I2C:
AIPI1_PSR0.bits.I2C = _psr0;
AIPI1_PSR1.bits.I2C = _psr1;
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_I2C_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_I2C_MASK, _psr1);
break;
case AIPI1_SDHC1:
AIPI1_PSR0.bits.SDHC1 = _psr0;
AIPI1_PSR1.bits.SDHC1 = _psr1;
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_SDHC1_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_SDHC1_MASK, _psr1);
break;
case AIPI1_SDHC2:
AIPI1_PSR0.bits.SDHC2 = _psr0;
AIPI1_PSR1.bits.SDHC2 = _psr1;
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_SDHC2_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_SDHC2_MASK, _psr1);
break;
case AIPI1_GPIO:
AIPI1_PSR0.bits.GPIO = _psr0;
AIPI1_PSR1.bits.GPIO = _psr1;
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_GPIO_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_GPIO_MASK, _psr1);
break;
case AIPI1_AUDMUX:
AIPI1_PSR0.bits.AUDMUX = _psr0;
AIPI1_PSR1.bits.AUDMUX = _psr1;
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_AUDMUX_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_AUDMUX_MASK, _psr1);
break;
case AIPI1_CSPI3:
default:
//WriteReg32(AIPI1_PSR0, AIPI1_PSR0_CSPI3_MASK, _psr0);
//WriteReg32(AIPI1_PSR1, AIPI1_PSR1_CSPI3_MASK, _psr1);
AIPI1_PSR0.bits.AUDMUX = _psr0;
AIPI1_PSR1.bits.AUDMUX = _psr1;
break;
}
return;
}
//---------------------------------------------------
// configure the size of AIPI2 peripherals. The argument
// to be passed specifies the peripheral name. Refer to the
// typedef declaration for aipi1_preipherals included
// in this header file.
//---------------------------------------------------
void
AIPI2_ConfigPeripheral(aipi2_peripherals aipi2Per)
{
// local variables
uint32_t _psr0;
uint32_t _psr1;
aipi_per_size _aipiPerSz;
// use look up table to determine
// peripheral size
_aipiPerSz = AIPI2PeripheralSet[aipi2Per].PerSize;
// determine individual bits
// for peripheral size
switch (_aipiPerSz)
{
case IPBUS_PSIZE_8:
_psr0 = 0;
_psr1 = 0;
break;
case IPBUS_PSIZE_16:
_psr0 = 1;
_psr1 = 0;
break;
case IPBUS_PSIZE_32:
_psr0 = 0;
_psr1 = 1;
break;
case IPBUS_UNOCCUPIED:
default:
_psr0 = 1;
_psr1 = 1;
break;
}
// bit shift to put the
// peripheral size bits
// in the correct bit fields
//_psr0 = _psr0 << aipi2Per;
//_psr1 = _psr1 << aipi2Per;
// write the appropriate bits
// in the PSR registers
switch (aipi2Per)
{
case AIPI2_CONTROL:
//WriteReg32(AIPI2_PSR0, AIPI2_PSR0_CNTR_MASK, _psr0);
//WriteReg32(AIPI2_PSR1, AIPI2_PSR1_CNTR_MASK, _psr1);
AIPI2_PSR0.bits.AIPI2 = _psr0;
AIPI2_PSR1.bits.AIPI2 = _psr1;
break;
case AIPI2_LCDC:
//WriteReg32(AIPI2_PSR0, AIPI2_PSR0_LCDC_MASK, _psr0);
//WriteReg32(AIPI2_PSR1, AIPI2_PSR1_LCDC_MASK, _psr1);
AIPI2_PSR0.bits.LCDC = _psr0;
AIPI2_PSR1.bits.LCDC = _psr1;
break;
case AIPI2_SLCDC:
//WriteReg32(AIPI2_PSR0, AIPI2_PSR0_SLCDC_MASK, _psr0);
//WriteReg32(AIPI2_PSR1, AIPI2_PSR1_SLCDC_MASK, _psr1);
AIPI2_PSR0.bits.SLCDC = _psr0;
AIPI2_PSR1.bits.SLCDC = _psr1;
break;
case AIPI2_RTIC:
//WriteReg32(AIPI2_PSR0, AIPI2_PSR0_RTIC_MASK, _psr0);
//WriteReg32(AIPI2_PSR1, AIPI2_PSR1_RTIC_MASK, _psr1);
AIPI2_PSR0.bits.RTIC = _psr0;
AIPI2_PSR1.bits.RTIC = _psr1;
break;
case AIPI2_USBOTG1:
//WriteReg32(AIPI2_PSR0, AIPI2_PSR0_USBOTG1_MASK, _psr0);
//WriteReg32(AIPI2_PSR1, AIPI2_PSR1_USBOTG1_MASK, _psr1);
AIPI2_PSR0.bits.USB_OTG = _psr0;
AIPI2_PSR1.bits.USB_OTG = _psr1;
break;
case AIPI2_USBOTG2:
AIPI2_PSR0.bits.USB_OTG2 = _psr0;
AIPI2_PSR1.bits.USB_OTG2 = _psr1;
//WriteReg32(AIPI2_PSR0, AIPI2_PSR0_USBOTG2_MASK, _psr0);
//WriteReg32(AIPI2_PSR1, AIPI2_PSR1_USBOTG2_MASK, _psr1);
break;
case AIPI2_EMMA:
//WriteReg32(AIPI2_PSR0, AIPI2_PSR0_EMMA_MASK, _psr0);
//WriteReg32(AIPI2_PSR1, AIPI2_PSR1_EMMA_MASK, _psr1);
AIPI2_PSR0.bits.EMMA = _psr0;
AIPI2_PSR1.bits.EMMA = _psr1;
break;
case AIPI2_CRM:
//WriteReg32(AIPI2_PSR0, AIPI2_PSR0_CRM_MASK, _psr0);
//WriteReg32(AIPI2_PSR1, AIPI2_PSR1_CRM_MASK, _psr1);
AIPI2_PSR0.bits.CRM = _psr0;
AIPI2_PSR1.bits.CRM = _psr1;
break;
case AIPI2_FIRI:
//WriteReg32(AIPI2_PSR0, AIPI2_PSR0_FIRI_MASK, _psr0);
//WriteReg32(AIPI2_PSR1, AIPI2_PSR1_FIRI_MASK, _psr1);
AIPI2_PSR0.bits.FIRI = _psr0;
AIPI2_PSR1.bits.FIRI = _psr1;
break;
case AIPI2_RNGA:
default:
AIPI2_PSR0.bits.RNGA = _psr0;
AIPI2_PSR1.bits.RNGA = _psr1;
//WriteReg32(AIPI2_PSR0, AIPI2_PSR0_RNGA_MASK, _psr0);
//WriteReg32(AIPI2_PSR1, AIPI2_PSR1_RNGA_MASK, _psr1);
break;
}
return;
}
//---------------------------------------------------
// configure all AIPI 1 peripherals
//---------------------------------------------------
void
AIPI1_ConfigAll(void)
{
uint32_t i;
for (i = 0; i <= AIPI1_MAX_PERIPHERALS; i++)
{
AIPI1_ConfigPeripheral(i);
}
return;
}
//---------------------------------------------------
// configure all AIPI 2 peripherals
//---------------------------------------------------
void
AIPI2_ConfigAll(void)
{
uint32_t i;
for (i = 0; i <= AIPI2_MAX_PERIPHERALS; i++)
{
AIPI2_ConfigPeripheral(i);
}
return;
}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -