mx21_pagetable.h

MX21_InitCodeLib.rar freescale mx21系列ARM芯片9328的WINCE5.0下初始化代码

/**********************************************************************
*
*         (C) COPYRIGHT 2004 FREESCALE, INC.
*         ALL RIGHTS RESERVED
*
*
*     Group/Division:  WMSG/MMDO
*
*     Description:
*
*     Related Specifications:
*
*     Errata:
*
*     File Name:        MX21_ArmPlatform.h
*     Revision Number:  0.1
*     Author(s):        Sharad Kumar
*     Date created:     30Apr2004
*     Revision History:
*        Date      Rev     Description
*        ----      ---     -----------
*        30Apr04  0.1     First draft
*
**********************************************************************/
#ifndef __MX21_PageTable_H_
#define __MX21_PageTable_H_

// In the current page table setup 
// only 1MB sections are setup, so refer
// to the section format in the first
// level descriptors

// section access permissions
#define MMU_PERMISSIONS         0x00000C00

// first level descriptor is of type section
#define MMU_TYPE_SECTION        0x00000002

// first level descript is of type coarse
#define MMU_TYPE_COARSE         0x00000001

// first level descriptor is of type fine
#define MMU_TYPE_FINE           0x00000003

// SDRAM base address for MX21
#define MMU_SDRAM_BASE_ADDR     0xC0000000

// Bit 4 of section descriptor
#define MMU_SET_BIT4            0x00000010

// cacheable bit in section descriptor
#define MMU_CACHEABLE           0x00000008

// bufferable bit in section descriptor
#define MMU_BUFFERABLE          0x00000004

// domain bits for each section
#define MMU_DOMAINS             0x000001E0

// number of page table entries
#define MMU_PAGE_ENTRIES        0x00001000       //4096 entries

// offset for registers in the page table. 
// these are non cacheable, non bufferable
// covers the address region starting at 0x10000000
#define MMU_REG_OFFST           0x00000100

// offset for EIM, NANDF, PCMCIA in the page table.
// these are non cacheable, non bufferable
// covers the address region starting at 0xDF001000
#define MMU_EIM_OFFST           0x00000DF0

// setup the array to hold the page tables
extern unsigned long pagetable[MMU_PAGE_ENTRIES];

// setup the MMU tables and return the base
// address of the page tables
unsigned long const*
ARM_MMUTableSetUp(void);

#endif