📄 mx21_memmap.h
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/**********************************************************************
*
* (C) COPYRIGHT 2004 FREESCALE, INC.
* ALL RIGHTS RESERVED
*
*
* Group/Division: WMSG/MMDO
*
* Description:
*
* Related Specifications:
*
* Errata:
*
* File Name: MX21_MemMap.h
* Revision Number: 0.1
* Author(s): Ryan Johnson
* Date created: 30Apr2004
* Revision History:
* Date Rev Description
* ---- --- -----------
* 30Apr04 0.1 First draft
*
**********************************************************************/
//timestamp: Fri Aug 13 20:27:50 2004
#ifndef MEM_STRUCTS
#define MEM_STRUCTS
// AIPI1_PSR0 register
typedef struct {
volatile unsigned int AIPI1_Control : 1;
volatile unsigned int DMA : 1;
volatile unsigned int WDOG : 1;
volatile unsigned int GPT1 : 1;
volatile unsigned int GPT2 : 1;
volatile unsigned int GPT3 : 1;
volatile unsigned int PWM : 1;
volatile unsigned int RTC : 1;
volatile unsigned int KPP : 1;
volatile unsigned int OWIRE : 1;
volatile unsigned int UART1 : 1;
volatile unsigned int UART2 : 1;
volatile unsigned int UART3 : 1;
volatile unsigned int UART4 : 1;
volatile unsigned int CSPI1 : 1;
volatile unsigned int CSPI2 : 1;
volatile unsigned int SSI1 : 1;
volatile unsigned int SSI2 : 1;
volatile unsigned int I2C : 1;
volatile unsigned int SDHC1 : 1;
volatile unsigned int SDHC2 : 1;
volatile unsigned int GPIO : 1;
volatile unsigned int AUDMUX : 1;
volatile unsigned int CSPI3 : 1;
volatile unsigned int Reserved : 8;
}_AIPI1_PSR0bits;
typedef union {
_AIPI1_PSR0bits bits;
volatile unsigned int all;
}AIPI1_PSR0reg;
#define AIPI1_PSR0 (*(volatile AIPI1_PSR0reg *)(0x10000000))
// AIPI1_PSR1 register
typedef struct {
volatile unsigned int AIPI1_Control : 1;
volatile unsigned int DMA : 1;
volatile unsigned int WDOG : 1;
volatile unsigned int GPT1 : 1;
volatile unsigned int GPT2 : 1;
volatile unsigned int GPT3 : 1;
volatile unsigned int PWM : 1;
volatile unsigned int RTC : 1;
volatile unsigned int KPP : 1;
volatile unsigned int OWIRE : 1;
volatile unsigned int UART1 : 1;
volatile unsigned int UART2 : 1;
volatile unsigned int UART3 : 1;
volatile unsigned int UART4 : 1;
volatile unsigned int CSPI1 : 1;
volatile unsigned int CSPI2 : 1;
volatile unsigned int SSI1 : 1;
volatile unsigned int SSI2 : 1;
volatile unsigned int I2C : 1;
volatile unsigned int SDHC1 : 1;
volatile unsigned int SDHC2 : 1;
volatile unsigned int GPIO : 1;
volatile unsigned int AUDMUX : 1;
volatile unsigned int CSPI3 : 1;
volatile unsigned int Reserved : 8;
}_AIPI1_PSR1bits;
typedef union {
_AIPI1_PSR1bits bits;
volatile unsigned int all;
}AIPI1_PSR1reg;
#define AIPI1_PSR1 (*(volatile AIPI1_PSR1reg *)(0x10000004))
// AIPI1_PAR register
typedef struct {
volatile unsigned int AIPI1_Control : 1;
volatile unsigned int DMA : 1;
volatile unsigned int WDOG : 1;
volatile unsigned int GPT1 : 1;
volatile unsigned int GPT2 : 1;
volatile unsigned int GPT3 : 1;
volatile unsigned int PWM : 1;
volatile unsigned int RTC : 1;
volatile unsigned int KPP : 1;
volatile unsigned int OWIRE : 1;
volatile unsigned int UART1 : 1;
volatile unsigned int UART2 : 1;
volatile unsigned int UART3 : 1;
volatile unsigned int UART4 : 1;
volatile unsigned int CSPI1 : 1;
volatile unsigned int CSPI2 : 1;
volatile unsigned int SSI1 : 1;
volatile unsigned int SSI2 : 1;
volatile unsigned int I2C : 1;
volatile unsigned int SDHC1 : 1;
volatile unsigned int SDHC2 : 1;
volatile unsigned int GPIO : 1;
volatile unsigned int AUDMUX : 1;
volatile unsigned int CSPI3 : 1;
volatile unsigned int Reserved : 8;
}_AIPI1_PARbits;
typedef union {
_AIPI1_PARbits bits;
volatile unsigned int all;
}AIPI1_PARreg;
#define AIPI1_PAR (*(volatile AIPI1_PARreg *)(0x10000008))
// AIPI2_PSR0 register
typedef struct {
volatile unsigned int AIPI2 : 1;
volatile unsigned int LCDC : 1;
volatile unsigned int SLCDC : 1;
volatile unsigned int RTIC : 1;
volatile unsigned int USB_OTG : 1;
volatile unsigned int USB_OTG2 : 1;
volatile unsigned int EMMA : 1;
volatile unsigned int CRM : 1;
volatile unsigned int FIRI : 1;
volatile unsigned int RNGA : 1;
volatile unsigned int Reserved : 8;
volatile unsigned int Unoccupied0 : 1;
volatile unsigned int Unoccupied1 : 1;
volatile unsigned int Unoccupied2 : 1;
volatile unsigned int Unoccupied3 : 1;
volatile unsigned int Unoccupied4 : 1;
volatile unsigned int Unoccupied5 : 1;
volatile unsigned int Unoccupied6 : 1;
volatile unsigned int Unoccupied7 : 1;
volatile unsigned int Unoccupied8 : 1;
volatile unsigned int Unoccupied9 : 1;
volatile unsigned int Unoccupied10 : 1;
volatile unsigned int Unoccupied11 : 1;
volatile unsigned int Reserved1 : 2;
}_AIPI2_PSR0bits;
typedef union {
_AIPI2_PSR0bits bits;
volatile unsigned int all;
}AIPI2_PSR0reg;
#define AIPI2_PSR0 (*(volatile AIPI2_PSR0reg *)(0x10020000))
// AIPI2_PSR1 register
typedef struct {
volatile unsigned int AIPI2 : 1;
volatile unsigned int LCDC : 1;
volatile unsigned int SLCDC : 1;
volatile unsigned int RTIC : 1;
volatile unsigned int USB_OTG : 1;
volatile unsigned int USB_OTG2 : 1;
volatile unsigned int EMMA : 1;
volatile unsigned int CRM : 1;
volatile unsigned int FIRI : 1;
volatile unsigned int RNGA : 1;
volatile unsigned int Reserved : 8;
volatile unsigned int Unoccupied0 : 1;
volatile unsigned int Unoccupied1 : 1;
volatile unsigned int Unoccupied2 : 1;
volatile unsigned int Unoccupied3 : 1;
volatile unsigned int Unoccupied4 : 1;
volatile unsigned int Unoccupied5 : 1;
volatile unsigned int Unoccupied6 : 1;
volatile unsigned int Unoccupied7 : 1;
volatile unsigned int Unoccupied8 : 1;
volatile unsigned int Unoccupied9 : 1;
volatile unsigned int Unoccupied10 : 1;
volatile unsigned int Unoccupied11 : 1;
volatile unsigned int Reserved1 : 2;
}_AIPI2_PSR1bits;
typedef union {
_AIPI2_PSR1bits bits;
volatile unsigned int all;
}AIPI2_PSR1reg;
#define AIPI2_PSR1 (*(volatile AIPI2_PSR1reg *)(0x10020004))
// AIPI2_PAR register
typedef struct {
volatile unsigned int AIPI2 : 1;
volatile unsigned int LCDC : 1;
volatile unsigned int SLCDC : 1;
volatile unsigned int RTIC : 1;
volatile unsigned int USB_OTG : 1;
volatile unsigned int USB_OTG2 : 1;
volatile unsigned int EMMA : 1;
volatile unsigned int CRM : 1;
volatile unsigned int FIRI : 1;
volatile unsigned int RNGA : 1;
volatile unsigned int Reserved : 8;
volatile unsigned int Unoccupied0 : 1;
volatile unsigned int Unoccupied1 : 1;
volatile unsigned int Unoccupied2 : 1;
volatile unsigned int Unoccupied3 : 1;
volatile unsigned int Unoccupied4 : 1;
volatile unsigned int Unoccupied5 : 1;
volatile unsigned int Unoccupied6 : 1;
volatile unsigned int Unoccupied7 : 1;
volatile unsigned int Unoccupied8 : 1;
volatile unsigned int Unoccupied9 : 1;
volatile unsigned int Unoccupied10 : 1;
volatile unsigned int Unoccupied11 : 1;
volatile unsigned int Reserved1 : 2;
}_AIPI2_PARbits;
typedef union {
_AIPI2_PARbits bits;
volatile unsigned int all;
}AIPI2_PARreg;
#define AIPI2_PAR (*(volatile AIPI2_PARreg *)(0x10020008))
// AITC_INTCNTL register
typedef struct {
volatile unsigned int Reserved4 : 2;
volatile unsigned int POINTER : 10;
volatile unsigned int Reserved3 : 4;
volatile unsigned int MD : 1;
volatile unsigned int Reserved2 : 2;
volatile unsigned int FIAD : 1;
volatile unsigned int NIAD : 1;
volatile unsigned int FIDIS : 1;
volatile unsigned int NIDIS : 1;
volatile unsigned int Reserved1 : 1;
volatile unsigned int ABFEN : 1;
volatile unsigned int ABFLAG : 1;
volatile unsigned int Reserved : 6;
}_AITC_INTCNTLbits;
typedef union {
_AITC_INTCNTLbits bits;
volatile unsigned int all;
}AITC_INTCNTLreg;
#define AITC_INTCNTL (*(volatile AITC_INTCNTLreg *)(0x10040000))
// AITC_NIMASK register
typedef struct {
volatile unsigned int NIMASK : 5;
volatile unsigned int Reserved : 27;
}_AITC_NIMASKbits;
typedef union {
_AITC_NIMASKbits bits;
volatile unsigned int all;
}AITC_NIMASKreg;
#define AITC_NIMASK (*(volatile AITC_NIMASKreg *)(0x10040004))
// AITC_INTENNUM register
typedef struct {
volatile unsigned int ENNUM : 6;
volatile unsigned int Reserved : 26;
}_AITC_INTENNUMbits;
typedef union {
_AITC_INTENNUMbits bits;
volatile unsigned int all;
}AITC_INTENNUMreg;
#define AITC_INTENNUM (*(volatile AITC_INTENNUMreg *)(0x10040008))
// AITC_INTDISNUM register
typedef struct {
volatile unsigned int DISNUM : 6;
volatile unsigned int Reserved : 26;
}_AITC_INTDISNUMbits;
typedef union {
_AITC_INTDISNUMbits bits;
volatile unsigned int all;
}AITC_INTDISNUMreg;
#define AITC_INTDISNUM (*(volatile AITC_INTDISNUMreg *)(0x1004000C))
// AITC_INTENABLEH register
typedef struct {
volatile unsigned int INT32 : 1;
volatile unsigned int INT33 : 1;
volatile unsigned int INT34 : 1;
volatile unsigned int INT35 : 1;
volatile unsigned int INT36 : 1;
volatile unsigned int INT37 : 1;
volatile unsigned int INT38 : 1;
volatile unsigned int INT39 : 1;
volatile unsigned int INT40 : 1;
volatile unsigned int INT41 : 1;
volatile unsigned int INT42 : 1;
volatile unsigned int INT43 : 1;
volatile unsigned int INT44 : 1;
volatile unsigned int INT45 : 1;
volatile unsigned int INT46 : 1;
volatile unsigned int INT47 : 1;
volatile unsigned int INT48 : 1;
volatile unsigned int INT49 : 1;
volatile unsigned int INT50 : 1;
volatile unsigned int INT51 : 1;
volatile unsigned int INT52 : 1;
volatile unsigned int INT53 : 1;
volatile unsigned int INT54 : 1;
volatile unsigned int INT55 : 1;
volatile unsigned int INT56 : 1;
volatile unsigned int INT57 : 1;
volatile unsigned int INT58 : 1;
volatile unsigned int INT59 : 1;
volatile unsigned int INT60 : 1;
volatile unsigned int INT61 : 1;
volatile unsigned int INT62 : 1;
volatile unsigned int INT63 : 1;
}_AITC_INTENABLEHbits;
typedef union {
_AITC_INTENABLEHbits bits;
volatile unsigned int all;
}AITC_INTENABLEHreg;
#define AITC_INTENABLEH (*(volatile AITC_INTENABLEHreg *)(0x10040010))
// AITC_INTENABLEL register
typedef struct {
volatile unsigned int INT0 : 1;
volatile unsigned int INT1 : 1;
volatile unsigned int INT2 : 1;
volatile unsigned int INT3 : 1;
volatile unsigned int INT4 : 1;
volatile unsigned int INT5 : 1;
volatile unsigned int INT6 : 1;
volatile unsigned int INT7 : 1;
volatile unsigned int INT8 : 1;
volatile unsigned int INT9 : 1;
volatile unsigned int INT10 : 1;
volatile unsigned int INT11 : 1;
volatile unsigned int INT12 : 1;
volatile unsigned int INT13 : 1;
volatile unsigned int INT14 : 1;
volatile unsigned int INT15 : 1;
volatile unsigned int INT16 : 1;
volatile unsigned int INT17 : 1;
volatile unsigned int INT18 : 1;
volatile unsigned int INT19 : 1;
volatile unsigned int INT20 : 1;
volatile unsigned int INT21 : 1;
volatile unsigned int INT22 : 1;
volatile unsigned int INT23 : 1;
volatile unsigned int INT24 : 1;
volatile unsigned int INT25 : 1;
volatile unsigned int INT26 : 1;
volatile unsigned int INT27 : 1;
volatile unsigned int INT28 : 1;
volatile unsigned int INT29 : 1;
volatile unsigned int INT30 : 1;
volatile unsigned int INT31 : 1;
}_AITC_INTENABLELbits;
typedef union {
_AITC_INTENABLELbits bits;
volatile unsigned int all;
}AITC_INTENABLELreg;
#define AITC_INTENABLEL (*(volatile AITC_INTENABLELreg *)(0x10040014))
// AITC_INTTYPEH register
typedef struct {
volatile unsigned int INT32 : 1;
volatile unsigned int INT33 : 1;
volatile unsigned int INT34 : 1;
volatile unsigned int INT35 : 1;
volatile unsigned int INT36 : 1;
volatile unsigned int INT37 : 1;
volatile unsigned int INT38 : 1;
volatile unsigned int INT39 : 1;
volatile unsigned int INT40 : 1;
volatile unsigned int INT41 : 1;
volatile unsigned int INT42 : 1;
volatile unsigned int INT43 : 1;
volatile unsigned int INT44 : 1;
volatile unsigned int INT45 : 1;
volatile unsigned int INT46 : 1;
volatile unsigned int INT47 : 1;
volatile unsigned int INT48 : 1;
volatile unsigned int INT49 : 1;
volatile unsigned int INT50 : 1;
volatile unsigned int INT51 : 1;
volatile unsigned int INT52 : 1;
volatile unsigned int INT53 : 1;
volatile unsigned int INT54 : 1;
volatile unsigned int INT55 : 1;
volatile unsigned int INT56 : 1;
volatile unsigned int INT57 : 1;
volatile unsigned int INT58 : 1;
volatile unsigned int INT59 : 1;
volatile unsigned int INT60 : 1;
volatile unsigned int INT61 : 1;
volatile unsigned int INT62 : 1;
volatile unsigned int INT63 : 1;
}_AITC_INTTYPEHbits;
typedef union {
_AITC_INTTYPEHbits bits;
volatile unsigned int all;
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