ccxx.c

mega88的无线bootload, 无线芯片cc1100,支持flash读写, eeprom读写, 编译环境IAR for AVR 4.20

/*
*********************************************************************************************************
*                                              CC1100
*                                     CC1100 functions
*
* File    : CCXX.C
* Version : V0.01

*********************************************************************************************************
*/

#include "bootloader.h"

/*
*********************************************************************************************************
*                                              PROTOTYPES
*********************************************************************************************************
*/	
    
const BYTE __flash RfCfg[0x2f] = {

	0x06,       		// IOCFG2     REV                 | GDO2_INV  | GDO2_CFG[5.0]
    0x2E, 				// IOCFG1     GDO_DS              | GDO1_INV  | GDO1_CFG[5.0]
    0x2E, 				// IOCFG0     TEMP_SENSOR_ENABLE  | GDO0_INV  | GDO0_CFG[5.0]

    B0000_0111,         // FIFOTHR
    0xD3,               // SYNC1
    0x91,               // SYNC0
    40,                 // PKTLEN

    B0000_1101,         // PKTCTRL1
                        // - PQT[2..0] | WOR_AUTOSYNC | CRC_AUTOFLUSH | APPEND_STATUS | ADR_CHK[1.0]
                        // -   000     |      0       |     1  		  |      1        |    01

    B0000_0101,         // PKTCTRL0
                        // -REV | WHITE_DATA | PKT_FORMAT[1.0] | Reserved  | CRC_EN | LENGTH_CONFIG[1.0]
                        // - 0  |      0     |      00         |     0     |    1   |      01

    SLAVE_TYPE,         // ADDR
    0x00,               // CHANNR

    0x06,               // .FSCTRL1   Frequency synthesizer control.
    0x00,               // .FSCTRL0   Frequency synthesizer control.
    0x21,               // .FREQ2     Frequency control word, high byte.
    0x74,               // .FREQ1     Frequency control word, middle byte.
    0xAD,               // .FREQ0     Frequency control word, low byte.
    0xCA,               // .MDMCFG4   Modem configuration.
    0x83,               // .MDMCFG3   Modem configuration.

    B0001_0010,         // .MDMCFG2   Modem configuration.
                        // -DEM_DCFILT_OFF  | MOD_FORMAT[2.0] | MANCHESER_EN | SYNC_MODE[2.0]
                        // -   0            |     001         |     0        |    010

    B0000_0011,         // .MDMCFG1   Modem configuration.0x22
                        // -FEC_EN  | NUM_PREAMBLE[2.0] | REV2 | CHANSPC_E[1.0]
                        // - 0      |     000           | 00   |     11

    0x7A,               // .MDMCFG0   Modem configuration.
    0x34,               // .DEVIATN   Modem deviation setting (when FSK modulation is enabled).
    0x07,               // MCSM2

    B0011_0000,         // MCSM1
                        // -REV2 | CCA_MODE[1.0] | RXOFF_MODE[1.0] | TXOFF_MODE[1.0]
                        // - 00  |     01        |     00          |     00

    B0001_1000,         // .MCSM0     Main Radio Control State Machine configuration.
                        // -REV2 | FS_AUTOCAL[1.0] |PO_TIMEOUT | PIN_CTRL_EN | XOSC_FORCE_ON
                        // - 00  |   01            |   01      |     0       |    0

    0x16,               // .FOCCFG    Frequency Offset Compensation Configuration.
    0x6C,               // .BSCFG     Bit synchronization Configuration.
    0x43,               // .AGCCTRL2  AGC control.
    0x40,               // .AGCCTRL1  AGC control.
    0x91,               // .AGCCTRL0  AGC control.
    0x87,               // WOREVT1
    0x6b,               // WOREVT0
    0xf8,               // WORCTRL
    0x56,               // .FREND1    Front end RX configuration.

    B0001_0000,         // .FREND0    Front end RX configuration.
                        // -REV2 | LODIV_BUF_CURRENT_TX[1.0] | REV | PA_POWER[2.0]
                        // -00   |       00                  | 0   |     000

    0xA9,               // .FSCAL3    Frequency synthesizer calibration.
    0x2A,               // .FSCAL2    Frequency synthesizer calibration.
    0x00,               // .FSCAL1    Frequency synthesizer calibration.
    0x11,               // .FSCAL0    Frequency synthesizer calibration.(38)

    0x41,               // RCCTRL1
    0x00,               // RCCTRL0
    0x59,               // .FSTEST
    0x7F,               // PTEST
    0x3F,               // AGCTEST
    0x81,               // .TEST2
    0x35,               // .TEST1
    0x0B                // .TEST0
};

/*
*********************************************************************************************************
*                                         CC_INIT
*
* Description      :
* Arguments        : none
* Returned Values  : none
* Note(s)/Warnings :
*
*              <-----40 us----->
*      _____    _______________
* CSn       |  |               |
*           |__|               |______________________
*                                     ____
* MISO____________________________   |    |
*                                 |__|    |___________
*    <----Unknown/don't care----->   ^    ^
*                                   SRES  done
*********************************************************************************************************
*/
void Cc_Init(void)
{
		SET_CSN;	Pause_1uS(30);
        CLR_CSN;	Pause_1uS(30);
        SET_CSN;	Pause_1uS(80);
        SpiStrobe(CCxxx0_SRES);
		
        for(BYTE i=0; i<0x2f; i++) 
            SpiWriteReg(i,RfCfg[i]);

		SpiWriteReg(CCxxx0_PATABLE, CC1100_0dBm);	
}
//==============================================================================