fmc.c

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/*============================================================================
  ____________________________________________________________________________
                                ______________________________________________
   SSSS  M   M          CCCC          Standard Microsystems Corporation
  S      MM MM   SSSS  C                    Austin Design Center
   SSS   M M M  S      C                 11000 N. Mopac Expressway
      S  M   M   SSS   C                Stonelake Bldg. 6, Suite 500
  SSSS   M   M      S   CCCC                Austin, Texas 78759
                SSSS            ______________________________________________
  ____________________________________________________________________________
  Copyright(C) 1999, Standard Microsystems Corporation
  All Rights Reserved.
  This program code listing is proprietary to SMSC and may not be copied,
  distributed, or used without a license to do so.  Such license may have
  Limited or Restricted Rights. Please refer to the license for further
  clarification.
  ____________________________________________________________________________
  Notice: The program contained in this listing is a proprietary trade
  secret of SMSC, Hauppauge, New York, and is copyrighted
  under the United States Copyright Act of 1976 as an unpublished work,
  pursuant to Section 104 and Section 408 of Title XVII of the United
  States code. Unauthorized copying, adaption, distribution, use, or
  display is prohibited by this law.
  ____________________________________________________________________________
  Use, duplication, or disclosure by the Government is subject to
  restrictions as set forth in subparagraph(c)(1)(ii) of the Rights
  in Technical Data and Computer Software clause at DFARS 52.227-7013.
  Contractor/Manufacturer is Standard Microsystems Corporation,
  80 Arkay Drive, Hauppauge, New York, 1178-8847.
  ____________________________________________________________________________
  ____________________________________________________________________________
  <module name> - <module description>
  ____________________________________________________________________________
  comments tbd
  ____________________________________________________________________________
  Revision History
  Date      Who  Comment
  ________  ___  _____________________________________________________________
  04/20/01  cds  initial version
  11/27/01  cds  moved ram test to the minimos debug code.  removed obsolete
                 fmc_select_none function.
  11/28/01  cds  added CKCON settings for each device so that access can be
                 adjusted on a per-device basis.
  12/12/01  tbh  added the fmc transfer code
  02/14/02  tbh  clear ramwr_a/b interrupts in fmc_abort_tansfer() to avoid
                 spurious interrupts after pipe reversal.
  02/26/02  tbh  added g_fmc_options and intra_burst_callback
  03/05/02  ds   Moved the Intra_burst callback to after the fmc_wait_count_down_with_timeout fn
                 added another option to g_fmc_options, to receive 512 bytes is 1.1 speed
  03/18/02  tbh  moved the intra_burst callback back where it was.  the previous
                 mod caused it to be called at the end of the burst, right before
                 the end_burst callback.  intra_burst must be called -during- the
                 transfer, not after it.
  03/19/02  tbh  in fmc_wait_count_down_with_timeout it was receiving and clearing
                 kbm_sync_fmc_blk, which it shouldnt have.
  03/29/02  tbh  changed CKCON to 0x02 for CF (to run in pio mode 4)
  05/07/02  cds  moved intra-burst callback into idata to prevent xdata access during blk_xfer
  06/10/02  tbh  performance optimizations, added call to fgnd_hpbot_wait_create
                 from fmc_abort_transfer.
  06/20/02  ds   Fixed the now rolled-out fmc_wait_blk_irq_with_timeout() in fmc_xfer fn,
                 to call the end_xfer callback before returning to the caller.
  06/20/02  cds  added fmc_select_nand() function to select the nand lun
  06/21/02  ds   The testing for blk_xfer_complete bit in fmc_wait_irq_with_timeout was protected by a
                 directive, and hence was timing out. Fixed it.
  06/26/02  cds  added kbm_sync_fmc_irq as a synchronizer that would break
                 out of the inner fmc_xfer burst loop.  ecc errors, or anything
                 that would cause a nested fmc irq would not break the loop.
  07/31/02  cds  removed references to g_active_media, and used new media function
                 media_set_active(...) page in the appropriate media object
                 from a buffer into variables at 'link-time' defined address.
  10/03/02  cds  updated the burst loop to break on kbm_isr0_fmc_irq in order to
                 allow sm/nand devices to correct correctable errors.
  10/17/02  cds  - project-wide lun data & vtbl paging to reduce code space.           
                 - removed g_active_media from _lun_data, _lun_() virtual functions    
                 - added _lun_data_rd() and _lun_data_wr() macros to bypass lun paging 
                 - added lun_set_active(log_lun) function to switch luns               
 11/15/02  -SBS Added kbm_fmc_disable_blk_xfer (FMC option flag) Enables BLKxfer
                   if not a multi page Xfer .
 12/13/02   cds  - replaced #k_pfm_fpga guards around common sd_clk_ctl fpga-ism
                   with _dev_is_fpga() macro which checks a reserved attribute bit.
 01/10/03   ds   Removed the setting of the MSC clock bits from fmc_select_msc. This is now set only on
                 commands that need to access the media. 
 01/8/03    SBS  _mcu_register_wr(x_isr0, kbm_isr0_blk_xfer_complete)causes problems with multi split transactions
                 on the CF media. Writing a one to BLK_XFER_COMP clears the bit , but the same is done by enabe_blk_xfer
                 The 223FPGA version does not like a  kbm_isr0_blk_xfer_complete when set in multiemulation mode ,hence
                 removed (commented out that line).
 07/03/03 sbs    Changes made to Compact_Flash (Identify_Device) these changes are required
                 to ensure compiatability with CF Spec.
                 Added code to Fix Bug-XXX.
                 Changed the read status function to check for RRDDY bit to ensure sync with 
                 hardware.
07/28/03 clc    Added changes to state machine to correct SD media supprise removal bugs.                                       
============================================================================*/
#define __fmc_dot_c__
#include "project.h"
#include "dev.h"

//------------------------------------------------------------------------------
xdata t_result g_fmc_rslt;
xdata uint16 g_fmc_timeout;
xdata uint8 g_fmc_options;
xdata t_udw32 g_start_lb_this_xfer;
xdata t_udw32 g_n_lb_this_xfer;
xdata t_udw32 g_n_lb_this_split;
xdata t_fmc_callback g_fmc_begin_xfer_callback;
xdata t_fmc_callback g_fmc_end_xfer_callback;
xdata t_fmc_callback g_fmc_begin_split_callback;
xdata t_fmc_callback g_fmc_end_split_callback;
xdata t_fmc_callback g_fmc_begin_burst_callback;
// this one cannot be in xdata if using the rev A 210
// because of the MS block bug where rd/wr xdata during
// an fmc xfer corrupts the data.
idata t_fmc_callback g_fmc_intra_burst_callback;
xdata t_fmc_callback g_fmc_end_burst_callback;

#if 0 

//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
void fmc_dump_registers() reentrant
{
  trace0(0, fmc, 3, "fmc register dump");
  trace1(0, fmc, 3, "g_fmc_options: %02x", g_fmc_options);
  trace1(0, fmc, 3, "g_fmc_timeout: %d", g_fmc_timeout);
  trace1(0, fmc, 3, "      x_fmc_ctl: %02x", x_fmc_ctl);
  trace1(0, fmc, 3, " x_fmc_mode_ctl: %02x", x_fmc_mode_ctl);
  trace1(0, fmc, 3, "  x_fmc_out_ctl: %02x", x_fmc_out_ctl);
  trace1(0, fmc, 3, "    x_media_sts: %02x", x_media_sts);
  trace1(0, fmc, 3, "       x_crd_ps: %02x", x_crd_ps);
  trace1(0, fmc, 3, "     x_crd_stat: %02x", x_crd_stat);
  trace1(0, fmc, 3, "      x_wu_src1: %02x", x_wu_src1);
  trace1(0, fmc, 3, "      x_wu_msk1: %02x", x_wu_msk1);
  trace1(0, fmc, 3, " x_crd_stat_msk: %02x", x_crd_stat_msk);
}
#endif


//+-----------------------------------------------------------------------------
// Name:
//   fmc_dbg_dump_sector()
//
// Declaration:
//   void sm_dbg_dump_sector()
//
// Purpose:
//
// Arguments:
//
// Return:
//   k_success  - on successful completion
//
// Notes:
//
// Since:
//   fmc-1.0
//------------------------------------------------------------------------------
#if 0
void fmc_dbg_dump_sector(uint8* sector) reentrant
{
  uint16 i;

  i = sector;
  _mcu_begin_critical_section();
  for (i=0;i<64;i++)
  {
    trace5(0, n2k, 0, "block[%d]: %04x%04x %04x%04x", (i*8), ( ((uint16*)sector)[i*4]), (((uint16*)sector)[i*4+1]), (((uint16*)sector)[i*4+2]), (((uint16*)sector)[i*4+3]));
  }
  _mcu_end_critical_section();
}
#endif

//+-----------------------------------------------------------------------------
// Name:
//   fmc_select_cfc
//
// Declaration:
//   void fmc_select_cfc(void);
//
// Purpose:
//   Aim the fmdu at the cfc.
//
// Arguments:
//   None.
//
// Return:
//   None.
//
// Notes:
//   This is a FUNCTION, not a DFA.
//   Overrides lun_enable_mux.
//
// Since:
//   fmc-1.0
//------------------------------------------------------------------------------
void fmc_select_cfc() reentrant
{
#if (k_log_lun_cf < k_max_log_lun)
  _mcu_begin_critical_section();
  x_fmc_mode_ctl= k_fmc_mode_cfc;
  trace1(0, fmc, 0, "select cfc device. fmc_mode_ctl:0x%02X", x_fmc_mode_ctl);
  // throttle up the CKCON for fastest access to xdata registers
  // just dont forget to throttle back to CKCON = 0x02 in ata_register_rd() etc
  CKCON = 0x00;
  _mcu_end_critical_section();
#endif
}

//+-----------------------------------------------------------------------------
// Name:
//   fmc_select_smc
//
// Declaration:
//   void fmc_select_smc(void);
//
// Purpose:
//   Aim the fmdu at the smc.
//
// Arguments:
//   None.
//
// Return:
//   None.
//
// Notes:
//   This is a FUNCTION, not a DFA.
//   Overrides lun_enable_mux.
//
// Since:
//   fmc-1.0
//------------------------------------------------------------------------------
void fmc_select_smc() reentrant
{
#if (k_log_lun_sm < k_max_log_lun)
  _mcu_begin_critical_section();
  x_fmc_mode_ctl= k_fmc_mode_smc;
  trace1(0, fmc, 0, "select smc device. fmc_mode_ctl:0x%02X", x_fmc_mode_ctl);
  // slow down access to xdata registers to give hardware time to access the media
  CKCON = 0x01;
  // set media to the smc structure
  media_set_active(k_ix_media_sm) ;
  _mcu_end_critical_section();
#endif
}

//+-----------------------------------------------------------------------------
// Name:
//   fmc_select_msc
//
// Declaration:
//   void fmc_select_msc(void);
//
// Purpose:
//   Aim the fmdu at the msc.
//
// Arguments:
//   None.
//
// Return:
//   None.
//
// Notes:
//   This is a FUNCTION, not a DFA.
//   Overrides lun_enable_mux.
//
// Since:
//   fmc-1.0
//------------------------------------------------------------------------------
void fmc_select_msc() reentrant
{
#if (k_log_lun_ms < k_max_log_lun)
  _mcu_begin_critical_section();
  x_fmc_mode_ctl=k_fmc_mode_msc;
  trace1(0, fmc, 0, "select msc device.  fmc_mode_ctl:0x%02X", x_fmc_mode_ctl);
  // throttle up the CKCON for fastest access to xdata registers
  //rcc temporarily slow these way down to help screw shings up.
  CKCON = 0x00;
  // set the media to memory stick
  media_set_active(k_ix_media_ms);
  _mcu_end_critical_section();
#endif
}

//+-----------------------------------------------------------------------------
// Name:
//   fmc_select_sdc
//
// Declaration:
//   void fmc_select_sdc(void);
//
// Purpose:
//   Aim the fmdu at the sdc.
//
// Arguments:
//   None.
//
// Return:
//   None.
//
// Notes:
//   This is a FUNCTION, not a DFA.
//   Overrides lun_enable_mux.