ms.c

来自「U盘控制器USB97C223的固件代码,对2kPAGE NAND FLASH 有」· C语言 代码 · 共 1,709 行 · 第 1/5 页

  for (i=0; i<255; i++)
  {
    // the zeroth entry in this table is the "information block"
    // any non-FFFF blocks in the table that are off the end of the card
    // are to be ignored.
    if (_ms_bad_blk_tbl[i] == 0xFFFF)
      return(k_no);
    if (_ms_bad_blk_tbl[i] == blk)
    {
      // this physical block appears in the bad block list
      trace1(0, ms_media, 110, "alert: block:%d is in the bad block table!", _ms_bad_blk_tbl[i]);
      if (!i)
      {
        trace0(0, ms_media, 110, "       and its the information block!");
      }
      return k_yes;
    }
  }
  return k_no;
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
t_bool ms_is_this_blk_the_information_block(uint16 blk) reentrant
{
  // the zeroth entry in this table is the "information block"
  if (_ms_bad_blk_tbl[0] == blk)
  {
    // this physical block appears in the bad block list
    trace1(0, ms_media, 110, "alert: block:%d is in the information block!", blk);
    return k_yes;
  }
  return k_no;
}
//+-----------------------------------------------------------------------------
// Name:
//   _ms_tx_data_fifio_is_empty(void)
//
// Declaration:
//   uint8  _ms_tx_data_fifo_is_empty(void)
//
// Purpose:
//  To verify the FIFO status.
//  Arguments: None
//   
//  Return:
//   A uint8  indicating:
//     1  -   tx_fifo_empty.
//     0  -   tx_fifo_full.
//                
//  Notes:
//   
// Since:
//   fmc-1.0
//------------------------------------------------------------------------------
uint8  _ms_tx_data_fifo_is_empty(void)
{
  #if defined(k_mcu_97210)
  return(_ms_register_rd(ms_fifo_stat) & ms_fifo_stat_t_buf_e);
  #elif defined(k_mcu_97223) 
  return(_ms_register_rd(msc_alt_stat_l ) & kbm_ms_alt_stat_fifo_e);
  #endif
}
//+-----------------------------------------------------------------------------
// Name:
//   ms_wait_msc_stat_rdy_with_timeout
//
// Declaration:
//   t_result ms_wait_msc_stat_rdy_with_timeout(uint8 ticks);
//
// Purpose:
//   Wait for the ready bit in the msc status register to go hi indicating that
//   the MS card can accept a TPC.
//
// Arguments:
//   ticks - a uint8 representing the timeout period in milliseconds.
//
// Return:
//   A t_result indicating:
//     k_success - the bit was set, and this routine has cleared it.
//     k_usbrst  - usb reset signalling was detected while waiting.
//     k_aborted - traffic occurred on the control pipe while waiting (probably a mass storage reset).
//     k_timeout - timeout limit exceeded.
//
// Notes:
//   This is a FUNCTION, not a DFA.
//   Clears the ready bit after seeing it get set (to rearm for the next one).
//
// Since:
//   fmc-1.0
//------------------------------------------------------------------------------
xdata uint8 status;               //!!! NEED PROPER NAMES IF STICK TO THIS SCHEME (AVOID STKOVF)
xdata t_sync sync;
t_result ms_wait_msc_stat_rdy_with_timeout(uint8 ticks) reentrant;
t_result ms_wait_msc_stat_rdy_with_timeout(uint8 ticks) reentrant
{
  //uint8 status;
  //t_sync sync;  TRACE1(141, ms, 1, "ms_wait_msc_stat_rdy_with_timeout(ticks:%d)", ticks);
  //_stack_dump();
  ////_stack_check();
  thread_set_timer(ticks+1);
 #if defined(k_mcu_97210)
  do
  {
    // clear the interrupt generator in the sony block
    //status = _ms_register_rd(ms_alt_stat);
    status = _mcu_register_rd(ms_alt_stat);
    sync = thread_got_sync(kbm_sync_usbrst |kbm_sync_abort |kbm_sync_timer);
    _thread_clr_sync(sync);
    if (sync & kbm_sync_abort)
    {
      trace0(0, ms, 110, "ms_wait_msc_stat_rdy_with_timeout() - error: kbm_sync_abort");
      return k_aborted;
    }
    if (sync & kbm_sync_usbrst)
    {
      trace0(0, ms, 110, "ms_wait_msc_stat_rdy_with_timeout() - error: kbm_sync_usbrst");
      return k_usbreset;
    }
    if (sync & kbm_sync_timer)
    {
      trace0(0, ms, 110, "ms_wait_msc_stat_rdy_with_timeout() - error: kbm_sync_timer");
      return k_timeout;
    }
  } while ((status & kbm_msc_stat_rdy) != kbm_msc_stat_rdy);
  #elif defined(k_mcu_97223) 
  do
  {
    // clear the interrupt generator in the sony block
    //status = _ms_register_rd(ms_alt_stat);
    status = _mcu_register_rd(msc_alt_stat_h);
    sync = thread_got_sync(kbm_sync_usbrst |kbm_sync_abort |kbm_sync_timer);
    _thread_clr_sync(sync);
    if (sync & kbm_sync_abort)
    {
      trace0(0, ms, 110, "ms_wait_msc_stat_rdy_with_timeout() - error: kbm_sync_abort");
      return k_aborted;
    }
    if (sync & kbm_sync_usbrst)
    {
      trace0(0, ms, 110, "ms_wait_msc_stat_rdy_with_timeout() - error: kbm_sync_usbrst");
      return k_usbreset;
    }
    if (sync & kbm_sync_timer)
    {
      trace0(0, ms, 110, "ms_wait_msc_stat_rdy_with_timeout() - error: kbm_sync_timer");
      return k_timeout;
    }
  } while ((status & kbm_ms_alt_stat_rdy) != kbm_ms_alt_stat_rdy);
#endif
  _mcu_register_wr(x_msc_stat, kbm_msc_stat_rdy);
  return k_success;
}

//+-----------------------------------------------------------------------------
// Name:
//   ms_wait_msc_stat_sif_with_timeout
//
// Declaration:
//   t_result ms_wait_msc_stat_sif_with_timeout(uint8 ticks);
//
// Purpose:
//   Wait for the sif bit in the msc alternate status register to go hi indicating
//   that the getint command can be issued.
//
// Arguments:
//   ticks - a uint8 representing the timeout period in milliseconds.
//
// Return:
//   A t_result indicating:
//     k_success - the bit was set, and this routine has cleared it.
//     k_usbrst  - usb reset signalling was detected while waiting.
//     k_aborted - traffic occurred on the control pipe while waiting (probably a mass storage reset).
//     k_timeout - timeout limit exceeded.
//
// Notes:
//   This is a FUNCTION, not a DFA.
//   Clears the sif bit after seeing it get set (to rearm for the next one)
//   by writing the msc staus register (causing alternate status register to clear also.
//
// Since:
//   fmc-1.0
//------------------------------------------------------------------------------
t_result ms_wait_msc_stat_sif_with_timeout(uint16 ticks) reentrant;
t_result ms_wait_msc_stat_sif_with_timeout(uint16 ticks) reentrant
{
  volatile  uint8 status;
  uint8 val=0;
  //t_sync sync;
  trace1(0, ms, 0, "ms_wait_msc_stat_sif_with_timeout(ticks:%d)", ticks);
  ////_stack_check();
  thread_set_timer(ticks+1);
  do
  {
    // clear the interrupt generator in the sony block
  #if defined(k_mcu_97210)
    status = _ms_register_rd(ms_alt_stat);
    val=kbm_msc_stat_sif;
  #elif defined(k_mcu_97223) 
    status =_ms_register_rd( msc_alt_stat_h);
    // TRACE2(6, reg, 0, "Reading Addr %04x Data-%02x",(uint16)&msc_alt_stat_h,_ms_register_rd( msc_alt_stat_h));
    val =kbm_ms_alt_stat_int;
  #endif
    //status = _mcu_register_rd(x_msc_stat);
    trace1(0, ms, 0, "status:0x%02X", status);
    sync = thread_got_sync(kbm_sync_usbrst |kbm_sync_abort |kbm_sync_timer);
    _thread_clr_sync(sync);
    if (sync & kbm_sync_abort)
    {
      trace0(0, err, 110, "ms_wait_msc_stat_sif_with_timeout() - error: kbm_sync_abort");
      return k_aborted;
    }
    if (sync & kbm_sync_usbrst)
    {
      trace0(0, err, 110, "ms_wait_msc_stat_sif_with_timeout() - error: kbm_sync_usbrst");
      return k_usbreset;
    }
    if (sync & kbm_sync_timer)
    {
      trace0(0, err, 110, "ms_wait_msc_stat_sif_with_timeout() - error: kbm_sync_timer");
      return k_timeout;
    }
    if (_mcu_register_rd(x_wu_src1) & kbm_wk1_crd_sts_chg)
    {
      if (_mcu_register_rd(x_crd_stat) & kbm_crd_stat_ms_out)
      {
        _ejected(g_active_lun);
        thread_set_sync(g_tid, kbm_sync_abort);
        return k_aborted;
      }
    }

  } while ((status & val) != val);
  /* Santosh: Changed to alt_statt_int as per 223 */
  _mcu_register_wr(x_msc_stat, kbm_msc_stat_sif);
  return k_success;
}

//+-----------------------------------------------------------------------------
// Name:
//   ms_wait_fifo_with_timeout
//
// Declaration:
//   t_result ms_wait_fifo_with_timeout(uint8 msk, uint8 val, uint8 ticks);
//
// Purpose:
//   Wait for the a bit patern in the msc fifo status register to go hi indicating
//   that the fifo has emptied, filled, etc.  (Waiting for status & mask == value.)
//
// Arguments:
//   msk   - a uint8 bitmask to be logically and-ed with the msc fifo status register.
//   val   - a uint8 indicating the desired bit pattern.
//   ticks - a uint8 representing the timeout period in milliseconds.
//
// Return:
//   A t_result indicating:
//     k_success - status & mask == value.
//     k_usbrst  - usb reset signalling was detected while waiting.
//     k_aborted - traffic occurred on the control pipe while waiting (probably a mass storage reset).
//     k_timeout - timeout limit exceeded.
//
// Notes:
//   This is a FUNCTION, not a DFA.
//
// Since:
//   fmc-1.0
//------------------------------------------------------------------------------
t_result ms_wait_fifo_with_timeout(uint8 msk, uint8 val, uint8 ticks) reentrant;
t_result ms_wait_fifo_with_timeout(uint8 msk, uint8 val, uint8 ticks) reentrant
{
  //uint8 status;
  //t_sync sync;

  trace3(0, ms, 1, "ms_wait_fifo_with_timeout(mask:%02X val:%02X ticks:%d)", msk, val, ticks);
  ////_stack_check();
  thread_set_timer(ticks+1);
  do
  {
    #if defined(k_mcu_97210)
    status = _ms_register_rd(ms_fifo_stat);
    #elif defined(k_mcu_97223) 
    status = _ms_register_rd(msc_alt_stat_l);
    //TRACE2(12, reg, 0, "Reading Addr %04x Data-%02x",(uint16)&msc_alt_stat_l,_ms_register_rd( msc_alt_stat_l));
    #endif
    sync = thread_got_sync(kbm_sync_usbrst |kbm_sync_abort |kbm_sync_timer);
    _thread_clr_sync(sync);
    if (sync & kbm_sync_abort)
    {
      trace0(0, err, 110, "ms_wait_fifo_with_timeout() - error: kbm_sync_abort");
      return k_aborted;
    }
    if (sync & kbm_sync_usbrst)
    {
      trace0(0, err, 110, "ms_wait_fifo_with_timeout() - error: kbm_sync_usbrst");
      return k_usbreset;
    }
    if (sync & kbm_sync_timer)
    {
      trace0(0, err, 110, "ms_wait_fifo_with_timeout() - error: kbm_sync_timer");
      return k_timeout;
    }
  } while ((status & msk) != val);
  return k_success;
}

//+-----------------------------------------------------------------------------
// Name:
//   ms_set_tpc
//
// Declaration:
//   t_result ms_set_tpc(uint8 tpc, uint8 count);
//
// Purpose:
//   Send a transfer protocol command (TPC) to the MS card.
//
// Arguments:
//   tpc - a uint8 indicating the tpc.
//   count - a uint8 indicating the number of bytes to move during this command.
//
// Return:
//   A t_result indicating:
//     k_success - tpc issued.
//     k_error   - failed to issue tpc.
//
// Notes:
//   This is a FUNCTION, not a DFA.
//
//
//Since:
//   fmc-1.0
//------------------------------------------------------------------------------
t_result ms_set_tpc(uint8 tpc, uint8 count) reentrant;
t_result ms_set_tpc(uint8 tpc, uint8 count) reentrant
{
  trace2(0, ms, 0, "ms_set_tpc() tpc:%02X count:%02X", tpc, count);
  //_stack_check();
  // wait for the rdy bit in msc_stat to go hi
  if (k_success != ms_wait_msc_stat_rdy_with_timeout(10))
    return k_error;
  // write the byte count
  _ms_register_wr(ms_bc, count);
  // write the tpc
  _ms_register_wr(ms_tpc_cmd, tpc);