📄 pwr.h
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/*============================================================================
____________________________________________________________________________
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SSSS M M CCCC Standard Microsystems Corporation
S MM MM SSSS C Austin Design Center
SSS M M M S C 11000 N. Mopac Expressway
S M M SSS C Stonelake Bldg. 6, Suite 500
SSSS M M S CCCC Austin, Texas 78759
SSSS ______________________________________________
____________________________________________________________________________
Copyright(C) 1999, Standard Microsystems Corporation
All Rights Reserved.
This program code listing is proprietary to SMSC and may not be copied,
distributed, or used without a license to do so. Such license may have
Limited or Restricted Rights. Please refer to the license for further
clarification.
____________________________________________________________________________
Notice: The program contained in this listing is a proprietary trade
secret of SMSC, Hauppauge, New York, and is copyrighted
under the United States Copyright Act of 1976 as an unpublished work,
pursuant to Section 104 and Section 408 of Title XVII of the United
States code. Unauthorized copying, adaption, distribution, use, or
display is prohibited by this law.
____________________________________________________________________________
Use, duplication, or disclosure by the Government is subject to
restrictions as set forth in subparagraph(c)(1)(ii) of the Rights
in Technical Data and Computer Software clause at DFARS 52.227-7013.
Contractor/Manufacturer is Standard Microsystems Corporation,
80 Arkay Drive, Hauppauge, New York, 1178-8847.
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pwr.h - power management functions for 223, 243
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comments tbd
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Revision History
Date Who Comment
________ ___ _____________________________________________________________
12/16/02 cds initial version - transferred from dev.h
05/27/03 ds We need to set the reset the SD controller on _sd_pwr_on. This assures
that all the SD registers are in the right state when the device resumes from
a suspend.
/*===========================================================================*/
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
typedef enum e_pwr_mode
{
k_pwr_mode_low=0,
k_pwr_mode_partial,
k_pwr_mode_full
} t_pwr_mode;
extern xdata t_pwr_mode g_pwr_mode;
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _cf_pwr_on() \
{ \
_mcu_register_set_bits(x_fmc_out_ctl, kbm_fmc_out_ctl_cf); \
_mcu_register_clr_bits(x_gpiob_out, kbm_gpio9); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _cf_pwr_off() \
{ \
_mcu_register_clr_bits(x_fmc_out_ctl, kbm_fmc_out_ctl_cf); \
_mcu_register_set_bits(x_gpiob_out, kbm_gpio9); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _ms_pwr_on() \
{ \
_mcu_register_set_bits(x_fmc_out_ctl, kbm_fmc_out_ctl_ms); \
_mcu_register_clr_bits(x_gpiob_out, kbm_gpio8); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _ms_pwr_off() \
{ \
_mcu_register_clr_bits(x_fmc_out_ctl, kbm_fmc_out_ctl_ms); \
_mcu_register_set_bits(x_gpiob_out, kbm_gpio8); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sm_pwr_on() \
{ \
_mcu_register_set_bits(x_fmc_out_ctl, kbm_fmc_out_ctl_sm); \
_mcu_register_clr_bits(x_gpiob_out, kbm_gpio10); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sm_pwr_off() \
{ \
_mcu_register_clr_bits(x_fmc_out_ctl, kbm_fmc_out_ctl_sm); \
_mcu_register_set_bits(x_gpiob_out, kbm_gpio10); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sd_pwr_on() \
{ \
_mcu_register_set_bits(x_fmc_out_ctl, kbm_fmc_out_ctl_sd); \
_sd_register_wr(sdc_ctl, kbm_sdc_ctl_sdc_rst); \
_mcu_register_clr_bits(x_gpiob_out, kbm_gpio11); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sd_pwr_off() \
{ \
_mcu_register_clr_bits(x_fmc_out_ctl, kbm_fmc_out_ctl_sd); \
_mcu_register_set_bits(x_gpiob_out, kbm_gpio11); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _nand_pwr_on() \
{ \
_mcu_register_set_bits(x_fmc_out_ctl, kbm_fmc_out_ctl_sm); \
_mcu_register_clr_bits(x_gpiob_out, kbm_gpio10); \
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _nand_pwr_off() \
{ \
_mcu_register_clr_bits(x_fmc_out_ctl, kbm_fmc_out_ctl_sm); \
_mcu_register_set_bits(x_gpiob_out, kbm_gpio10); \
}
//------------------------------------------------------------------------------
void pwr_initialize(void) reentrant;
void pwr_set_low_power_mode(void) reentrant;
void pwr_set_parial_power_mode() reentrant;
void pwr_set_full_power_mode(void) reentrant;
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