sm.h

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/*============================================================================
  ____________________________________________________________________________
                                ______________________________________________
   SSSS  M   M          CCCC          Standard Microsystems Corporation
  S      MM MM   SSSS  C                    Austin Design Center
   SSS   M M M  S      C                 11000 N. Mopac Expressway
      S  M   M   SSS   C                Stonelake Bldg. 6, Suite 500
  SSSS   M   M      S   CCCC                Austin, Texas 78759
                SSSS            ______________________________________________
  ____________________________________________________________________________
  Copyright(C) 1999, Standard Microsystems Corporation
  All Rights Reserved.
  This program code listing is proprietary to SMSC and may not be copied,
  distributed, or used without a license to do so.  Such license may have
  Limited or Restricted Rights. Please refer to the license for further
  clarification.
  ____________________________________________________________________________
  Notice: The program contained in this listing is a proprietary trade
  secret of SMSC, Hauppauge, New York, and is copyrighted
  under the United States Copyright Act of 1976 as an unpublished work,
  pursuant to Section 104 and Section 408 of Title XVII of the United
  States code. Unauthorized copying, adaption, distribution, use, or
  display is prohibited by this law.
  ____________________________________________________________________________
  Use, duplication, or disclosure by the Government is subject to
  restrictions as set forth in subparagraph(c)(1)(ii) of the Rights
  in Technical Data and Computer Software clause at DFARS 52.227-7013.
  Contractor/Manufacturer is Standard Microsystems Corporation,
  80 Arkay Drive, Hauppauge, New York, 1178-8847.
  ____________________________________________________________________________
  ____________________________________________________________________________
  fmcdev.h - USB97210 device specific hardware interface definitions and
             functions that are external to the MCU (ergo external to minimos).
  ____________________________________________________________________________
  comments tbd
  ____________________________________________________________________________
  Revision History
  Date      Who  Comment
  ________  ___  _____________________________________________________________
  09/17/01  cds  initial version
  11/27/01  cds  overrode _lun_enable_mux with fmc code to enable lun data mux
                 without caller needing to know what specific device is at that
                 lun.
  01/##/02  cds  ported smil library to fmc project completely
  01/08/02  cds  added sm_init_controller method
  04/17/02  cds  added mode_sense override for write-protect handling.
                 updated the timeout constants to reflect the actual spec values.
  05/16/02  cds  moved smart media build options here so that they can be seen
                 by both sm.c and sm_media.c                 
  05/24/02  cds  added compile-time option to enable/disable ecc correction
  06/21/02  cds  removed #if k_log_lun_sm < k_max_log_lun guards so that the
                 sm class overrides would be declared and included if the
                 derived nand lun is built, even if the sm lun is not included
                 in the build options.  See lun.c for more detail
  07/02/02  cds  exported sm_read_id() function which returns id code of the flash
  07/16/02  cds  removed ecc function declarations and moved 'em into ecc.h  
  08/09/02  cds  - added references to nand_rd_page, nand_wr_page, nand_rd_col,
                   nand_wr_col, and nand chip id fields to be referenced after
                   a call to sm_read_id.
                 - added (but comment out for 211 build at this time) code to
                   do data xfers at increased read/write cycle times to improve
                   nand performance
  08/09/02  cds  - updated _sm_hw_set_rd/wr_data() macro to take a bitmask
                   parameter so that the read/write timing cycle can be updated
                   dynamically
                 - removed nand_rd/wr_page variables in favor of separate bytes
                   for each component (ala the meistro of ms's style).  helps
                   reduce the address calculation & usage code.
  08/14/02  cds  added option to enable tracing of bytes being sent to the 
                 smc controller (useful for debugging)
  08/20/02  cds  added k_nand_cmd_read_cache_next and k_nand_cmd_read_cache_final
                 codes for certain n2k chips.
  09/25/02  cds  - added support for erase_flash and report_media_geometry to lun vtable
                 - deleted mode sense dfa
  10/14/02  cds  - exported sm_correct_sram_bit()
  10/29/02  cds  exported sm_check_data_status(start, count) function for checking for bad data status pages
  12/06/02  ds   Added register definitions for 223
  12/10/02  cds  - exported sm_setup_write_multi_emu
                 - converted sm_set_rd_cmd, sm_rd_cmd_begin, sm_set_wr_cmd & sm_wr_cmd_begin to functions
                   to conserve code space.
                 - added bit definitions for reserved bits in the nvstore to configure write-multiple emulation options:
                    - kbm_sm_config_multi_write_disable - disables all multi write emu modes and does old 210-style bursts
                    - kbm_sm_config_override_wr_mult_mode - overrides auto-selected multi-write mode (in case one or other doesn't work) 
                    - kbm_sm_config_wr_mult_mode - mask of valid modes that can be set in the sm_mode_ctl_2 register
                      (hopefully will be compatible w/ 243 later on)
                 - defined g_write_mult_emu flag to prevent mcu's w/o write-multi-suport from every attempting to do a multi-write split
                   and as a variable for mcus that do support multi write emulation so that it can be dynamically switched
                 - added g_sm_mode_ctl_2_opts to ghost the sm_mode_ctl_2 register in all but the 'sm_mult_en' bit for quick enabling
                   with the correct paramters
                 - added sm_setup_mult_write_opts() function to build the g_sm_mode_ctl_2_opts register correctly based on media, card and 
                   g_dev_rsvd_lo bits set.
  12/13/02  cds  - moved rsvd attribute bit definitions to dev.h                   
                   
 
============================================================================*/

#ifndef _sm_h_
#define _sm_h_

//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// define this if you want the smart media device to fully erase a card 
// when it is inserted.... it'll update the lun name as well, when this happens.
// #define k_smart_media_eraser

//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// define this if you want the smart media device to fully erase a card 
// (boot block included!!!), store a pre-fab boot block defined by the sm spec,
// and erase all sectors of the media
// #define k_sm_repair_card

//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// define the following to turn on ecc correction & xfer resume during blk xfers. 
// when not defined, an ecc detection will fail the csw with read error sense
// #define k_smc_hardware_ecc

//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// define the following to turn of tracing of calls to the smart media controller
// logic.... *note* this converts the macros to function calls in order to prevent
// massive code bloat, but may cause a stack overflow under tight stack conditions.
// #define k_trace_hw_smc


#ifndef __sm_dot_c__
  #define t_sm_register extern unsigned char volatile xdata
  typedef t_xdata_ref t_sm_register_ref;
  #define at_sm(__addr)
#else
  #define t_sm_register unsigned char volatile xdata
  typedef t_xdata_ref t_sm_register_ref;
  #define at_sm(__addr)    _at_ 0x32##__addr
#endif

#if defined(k_mcu_97223) || defined (k_mcu_97243)
#define k_smc_write_multi_support
#endif


//------------------------------------------------------------------------------
// smart media controller (sm) interface registers
t_sm_register sm_data             at_sm(F0);  // rw     sm data register

//------------------------------------------------------------------------------
t_sm_register sm_mode_ctl             at_sm(F1);  // rw     sm mode control register
#define kbm_sm_mode_fast_cycle_time   0x80  // 97242 only
#define kbm_sm_mode_wp                0x40
#define kbm_sm_mode_ce                0x20
#define kbm_sm_mode_ecc_blk_xfer_en   0x10
#define kbm_sm_mode_ecc_reset         0x08
#define kbm_sm_mode_ecc_en            0x04
#define kbm_sm_mode_ale               0x02
#define kbm_sm_mode_cle               0x01


//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#ifdef k_smc_write_multi_support

#define sm_mode_ctl1 sm_mode_ctl

//------------------------------------------------------------------------------
t_sm_register sm_mode_ctl2            at_sm(F2);  // rw     sm mode control 2 register
#define kbm_sm_mult_wr_mode             0x30
#define kbm_sm_mult_wr_mode_sm_normal   0x00
#define kbm_sm_mult_wr_mode_sm_prg_1pg  0x20
#define kbm_sm_mult_wr_mode_sm_prg_4pg  0x30
#define kbm_sm_mode_pg_sz               0x08
#define kbm_sm_mode_pg_addr_no          0x04
#define kbm_sm_mode_col_addr_no         0x02
#define kbm_sm_mode_mult_emu_en         0x01

t_sm_register   sm_emu_pg_addr_2		at_sm(E2);	// emu page address register 2	 
t_sm_register   sm_emu_pg_addr_1		at_sm(E1);	// emu page address register 1 
t_sm_register   sm_emu_pg_addr_0    	at_sm(E0);	//emu page address register 0 

#endif

/*=======================================*/
#define kbm_standby     (0x00)                               // clear card enable bit
#define kbm_wr_data     (kbm_sm_mode_ce)                    // set card enable bit only
#define kbm_wr_cmd      (kbm_sm_mode_ce | kbm_sm_mode_cle)  // card enable + command line enable
#define kbm_wr_addr     (kbm_sm_mode_ce | kbm_sm_mode_ale)  // card enable + address line enable
#define kbm_enable_wp   (kbm_sm_mode_wp)
#define kbm_disable_wp  (0x00)

/***************************************************************************/
#ifndef k_trace_hw_smc
#define _sm_data_rd()           (sm_data)
#define _sm_data_wr(a)          (sm_data)=(a)
#else
uint8 _sm_data_rd() reentrant ;
void _sm_data_wr(uint8 val) reentrant ;
#endif


/*---*/

#ifndef k_trace_hw_smc
#define _sm_hw_set_rd_data(__msk) (sm_mode_ctl=(uint8)(kbm_wr_data|kbm_enable_wp|(__msk)))
#define _sm_hw_set_rd_cmd()       (sm_mode_ctl=(uint8)(kbm_wr_cmd| kbm_enable_wp))
#define _sm_hw_set_rd_addr()      (sm_mode_ctl=(uint8)(kbm_wr_addr|kbm_enable_wp)) 
#define _sm_hw_set_rd_standby()   (sm_mode_ctl=(uint8)(kbm_standby|kbm_enable_wp)) 
#else
void _sm_hw_set_rd_data(uint8 msk) reentrant ;
void _sm_hw_set_rd_cmd() reentrant ;
void _sm_hw_set_rd_addr() reentrant ;
void _sm_hw_set_rd_standby() reentrant ;
#endif

/*---*/

#ifndef k_trace_hw_smc
#define _sm_hw_set_wr_data(__msk) (sm_mode_ctl=(uint8)(kbm_wr_data|kbm_disable_wp|(__msk)))
#define _sm_hw_set_wr_cmd()     (sm_mode_ctl=(uint8)(kbm_wr_cmd| kbm_disable_wp))
#define _sm_hw_set_wr_addr()    (sm_mode_ctl=(uint8)(kbm_wr_addr|kbm_disable_wp))
#define _sm_hw_set_wr_standby() (sm_mode_ctl=(uint8)(kbm_standby|kbm_disable_wp))
#else
void _sm_hw_set_wr_data(uint8 msk) reentrant ;
void _sm_hw_set_wr_cmd() reentrant ;
void _sm_hw_set_wr_addr() reentrant ;
void _sm_hw_set_wr_standby() reentrant ;
#endif

/*---*/

#define _sm_hw_ecc_rd_reset()   (sm_mode_ctl=(uint8)(kbm_sm_mode_ecc_reset|kbm_enable_wp|kbm_sm_mode_ce))
#define _sm_hw_ecc_rd_start()   (sm_mode_ctl=(uint8)(kbm_sm_mode_ecc_en|kbm_enable_wp|kbm_sm_mode_ce))
#define _sm_hw_ecc_rd_stop()    (sm_mode_ctl=(kbm_enable_wp|kbm_sm_mode_ce))
#define _sm_hw_ecc_wr_reset()   (sm_mode_ctl=(uint8)(kbm_sm_mode_ecc_reset|kbm_disable_wp|kbm_sm_mode_ce))
#define _sm_hw_ecc_wr_start()   (sm_mode_ctl=(uint8)(kbm_sm_mode_ecc_en|kbm_disable_wp|kbm_sm_mode_ce))
#define _sm_hw_ecc_wr_stop()    (sm_mode_ctl=(kbm_disable_wp|kbm_sm_mode_ce))

/*---*/

#define _sm_has_media()         ( (x_crd_ps&kbm_crd_ps_sm)?k_true:k_false)
#define _sm_is_media_wp()       ((x_media_sts & kbm_media_sts_sm_wp)?k_true:k_false)


/*---*/

#ifndef k_trace_hw_smc
#define _sm_hw_bsy()         (!(x_smc_stat & kbm_smc_stat_rdy))
#else
t_bool _sm_hw_bsy() reentrant ;
#endif


#define _sm_set_wr_cmd(__cmd)   { _sm_hw_set_wr_cmd(); _sm_data_wr(cmd); _sm_hw_set_wr_data(g_nand_rw_speed); }
#define _sm_wr_cmd_begin(__cmd) { _mcu_register_wr(x_smc_stat, kbm_smc_stat_rdy); _sm_set_wr_cmd(__cmd); }

//+-----------------------------------------------------------------------------
// functions which wrap the above macros... use whichever the design dictates
// (function for lower code space, macro for faster access)
//------------------------------------------------------------------------------
void sm_set_wr_cmd(uint8 cmd) reentrant ;
void sm_wr_cmd_begin(uint8 cmd) reentrant ;


//+-----------------------------------------------------------------------------
// Name:
//   sm_set_rd_cmd()
//
// Declaration:
//   static void sm_set_rd_cmd(uint8 cmd) reentrant
//   #define _sm_set_rd_cmd(uint8 __cmd)
//
// Purpose:
//   set up the media for issuing read command
//   (using write protection signal to prevent accidental writes)
//
// Arguments:
//   cmd  - command to be issued.  should be one of the following
//          constants: k_sm_read, k_sm_read_redt, k_sm_read2, k_sm_reset_chip
//          k_sm_read_status or k_sm_read_id
//
// Return:
//
// Notes:
//
// Since:
//   fmc-1.0
//------------------------------------------------------------------------------
#define _sm_set_rd_cmd(__cmd) { _sm_hw_set_rd_cmd(); _sm_data_wr(cmd); _sm_hw_set_rd_data(g_nand_rw_speed); }
void sm_set_rd_cmd(uint8 cmd) reentrant ;

//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define  _sm_rd_cmd_begin(__cmd) { _mcu_register_wr(x_smc_stat,kbm_smc_stat_rdy); _sm_set_rd_cmd(cmd); }
void sm_rd_cmd_begin(uint8 cmd) reentrant ;

//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Define Definition
//------------------------------------------------------------------------------
#define k_sm_sector_sz        512   /* Sector buffer size */
#define k_sm_redt_buffer_sz   16    /* x_sm_redt_data buffer size */

//------------------------------------------------------------------------------
// Max Zone/Block/Sectors Data Definition
//------------------------------------------------------------------------------
#define k_sm_max_zones_per_table 2
#define k_sm_max_zone_num        8    /* Max Zone Numbers in a SmartMedia */
#define k_sm_max_block_num       1024 /* Max Block Numbers in a Zone */
#define k_sm_max_sect_num        32   /* Max Sector Numbers in a Block */
#define k_sm_max_lb_per_zone     1000 /* Max Logical Block Numbers in a Zone */
#define k_sm_max_cis_sect        0x08 /* Max CIS Search Sector Number */