isr.h

U盘控制器USB97C223的固件代码,对2kPAGE NAND FLASH 有很好的支持.

/*============================================================================
  ____________________________________________________________________________
                                ______________________________________________
   SSSS  M   M          CCCC          Standard Microsystems Corporation
  S      MM MM   SSSS  C                    Austin Design Center
   SSS   M M M  S      C                 11000 N. Mopac Expressway
      S  M   M   SSS   C                Stonelake Bldg. 6, Suite 500
  SSSS   M   M      S   CCCC                Austin, Texas 78759
                SSSS            ______________________________________________
  ____________________________________________________________________________

  Copyright(C) 1999, Standard Microsystems Corporation
  All Rights Reserved.

  This program code listing is proprietary to SMSC and may not be copied,
  distributed, or used without a license to do so.  Such license may have
  Limited or Restricted Rights. Please refer to the license for further
  clarification.
  ____________________________________________________________________________

  Notice: The program contained in this listing is a proprietary trade
  secret of SMSC, Hauppauge, New York, and is copyrighted
  under the United States Copyright Act of 1976 as an unpublished work,
  pursuant to Section 104 and Section 408 of Title XVII of the United
  States code. Unauthorized copying, adaption, distribution, use, or
  display is prohibited by this law.
  ____________________________________________________________________________

  Use, duplication, or disclosure by the Government is subject to
  restrictions as set forth in subparagraph(c)(1)(ii) of the Rights
  in Technical Data and Computer Software clause at DFARS 52.227-7013.
  Contractor/Manufacturer is Standard Microsystems Corporation,
  80 Arkay Drive, Hauppauge, New York, 1178-8847.
  ____________________________________________________________________________
  ____________________________________________________________________________

  <module name> - <module description>
  ____________________________________________________________________________

  comments tbd
  ____________________________________________________________________________

  Revision History
  Date      Who  Comment
  ________  ___  _____________________________________________________________
  05/31/00  tbh  initial version
  03/12/01  tbh  merged 10x and 20x code for ease of maintenence
  10/31/01  tbh  added k_201_style_suspend_handling for consistency.
                 added k_201_fpga_suspend_hack for susp/resm testing.
  11/29/01  tbh  added k_irq_fmc and k_irq_blk_xfer_complete
  12/04/01  tbh  added irq_control(), and the operaton masks.
  12/18/01  rcc  made default suspend/resume ON.
  01/22/02  tbh  had to disable suspend to get vbus detect/detach working
  06/19/02  tbh  added k_irq_fmc_sdc_flash_prg_err
  08/30/02  ds   added k_irq_cpu_t1 (timer1) to the irq_table
============================================================================*/

//------------------------------------------------------------------------------
//
//   888    000   555550    1
//  8   8  0   0  5        11
//   888   0   0  55555     1    CPU INTERRUPT IDENTIFICATION CONSTANTS
//  8   8  0   0       5    1
//   888    000   55555   11111
//
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
// cpu 8051 standard
#define k_irq_cpu_e0              0
#define k_irq_cpu_e1              1
#define k_irq_cpu_t0              2
//#define k_irq_cpu_t1              3    this is going into to the irq-table
#define k_irq_cpu_s0              4

//------------------------------------------------------------------------------
//
//    1     000   0    0
//   11    0   0   0  0
//    1    0   0    00    MCU FAMILY INTERRUPT IDENTIFICATION CONSTANTS
//    1    0   0   0  0
//  11111   000   0    0
//
//------------------------------------------------------------------------------

#ifdef k_10x_family
//-------------------------------------------------------------------------v-v-v
// external0
#define k_irq_isa_irq3           50
#define k_irq_isa_irq2           51
#define k_irq_isa_irq1           52
#define k_irq_isa_irq0           53
#define k_irq_isa_dma            54
#define k_irq_usb_rxpkt          55
#define k_irq_usb_txpkt          56
#define k_irq_usb_txempt         57
// external1
#define k_irq_usb_eot            60
#define k_irq_usb_sof            61
#define k_irq_mmu_alloc          62
#define k_irq_usb_rxovrn         63
#define k_irq_usb_pwrmng         64
#define k_irq_usb_reset          70
#define k_irq_usb_suspend        71
#define k_irq_usb_resume         72
#define k_irq_wup_irq3           73
#define k_irq_wup_irq2           74
#define k_irq_wup_irq1           75
#define k_irq_wup_irq0           76
//-------------------------------------------------------------------------^-^-^
#endif

//------------------------------------------------------------------------------
//
//  2222    000   0    0
//      2  0   0   0  0
//   222   0   0    00    MCU FAMILY INTERRUPT IDENTIFICATION CONSTANTS
//  2      0   0   0  0
//  22222   000   0    0
//
//------------------------------------------------------------------------------

#ifdef k_20x_family

//-------------------------------------------------------------------------v-v-v
// dw8051 extended

// if these ever get dispatched they need to be in the irq table!!!
#define k_irq_cpu_e2             "UNUSED"
#define k_irq_cpu_e3             "UNUSED"
#define k_irq_cpu_e4             "UNUSED"
#define k_irq_cpu_e5             "UNUSED"
#define k_irq_cpu_t2             "UNUSED"
#define k_irq_cpu_s1             "UNUSED"
#define k_irq_cpu_wd             "UNUSED"
#define k_irq_cpu_pf             "UNUSED"

//------------------------------------------------------------------------------
// in order for irq_control() to work properly the k_irq_control[] array must be filled in
// in precisely this order.  this allows the enum value to be the index into the array which
// allows a fast lookup without scanning the table.
typedef enum e_irq_control
{
  // 0 external 0
  k_irq_usb_stat = 0,
    k_irq_usb_stat_ep2_err,
    k_irq_usb_stat_2dot0,
    k_irq_usb_stat_resume,
    k_irq_usb_stat_reset,
    k_irq_usb_stat_err,
      k_irq_usberr_to,
      k_irq_usberr_token,
      k_irq_usberr_ovrflw,
      k_irq_usberr_stall,
      k_irq_usberr_dtog,
      k_irq_usberr_bitstf,
      k_irq_usberr_pid,
      k_irq_usberr_crc,
  k_irq_usb_setup,   //15
  #ifdef k_mcu_97201
  k_irq_fdc,
  k_irq_ata,
  #endif
  #ifdef k_flash_family
  k_irq_blk_xfer_complete,
  k_irq_fmc,
    k_irq_fmc_cfc_dev_err,
    k_irq_fmc_iordy_err,
    k_irq_fmc_cfc_intrq,
    k_irq_fmc_cfc_xrdy,
    k_irq_fmc_cfc_rrdy,
    k_irq_fmc_sm_ecc_err_d_a,
    k_irq_fmc_sm_ecc_err_d_b,
    k_irq_fmc_sm_ecc_err_c_a,
    k_irq_fmc_sm_ecc_err_c_b,
    k_irq_fmc_sm_rdy,
    k_irq_fmc_msc_rdy,
    k_irq_fmc_msc_sif_int,
    k_irq_fmc_msc_drq,
    k_irq_fmc_msc_crc_err,
    k_irq_fmc_msc_timeout_err,
    k_irq_fmc_sdc_crc_err,
    k_irq_fmc_sdc_crd_rdy,
    k_irq_fmc_sdc_rsp_rdy,
    k_irq_fmc_sdc_cmd_rdy,
    k_irq_fmc_sdc_flash_prg_err,
  #endif
  k_irq_ramrd_b,
  k_irq_ramrd_a,
  k_irq_ramwr_b,
  k_irq_ramwr_a,
  //------------------------------------------------------------------------------
  // 1 timer0
  //------------------------------------------------------------------------------
  // 2 external1
  k_irq_usb_ep0zlp,
  #ifdef k_mcu_97201
  k_irq_ata_pio,
  #endif
  k_irq_usb_ep1rx,
  k_irq_usb_ep1tx,
  k_irq_usb_ep0rx,
  k_irq_usb_ep0tx,
  k_irq_usb_suspend,  //46
  //------------------------------------------------------------------------------
  // 3 timer1
  k_irq_cpu_t1,  //47
  //------------------------------------------------------------------------------
  // 4 serial0
  //------------------------------------------------------------------------------
  // 5 timer2
  //------------------------------------------------------------------------------
  // 6 pwrfail
  //------------------------------------------------------------------------------
  // 7 serial1
  //------------------------------------------------------------------------------
  // 8 external2
  #ifdef k_flash_family
  k_irq_crd_sts_chg,  //48
    k_irq_cf_insert,
    k_irq_sm_insert,
    k_irq_ms_insert,
    k_irq_cf_eject,
    k_irq_sm_eject,
    k_irq_ms_eject,
    k_irq_sd_insert_eject,
  k_irq_fmc_err,
    k_irq_fmc_err_sd_blk_ovrun,
  #endif
  k_irq_usb_reset,
  k_irq_usb_resume,
  k_irq_external,
  // 9 external3
  k_irq_req_set_stall,
  k_irq_req_clr_stall,
  k_irq_req_set_cfg,
  k_irq_req_set_ifc,
  k_irq_req_set_rwu,
  k_irq_req_clr_rwu,
  // 10 external4
  k_irq_gpio7,
  k_irq_gpio6,
  k_irq_gpio5,
  k_irq_gpio4,
  k_irq_gpio3,
  k_irq_gpio2,
  k_irq_gpio1,
  k_irq_gpio0,    //74
  // 11 external5
  k_irq_nyet2rx,
  k_irq_nyet0rx,
  k_irq_nak2tx,
  k_irq_nak2rx,     //78
  k_irq_nak1tx,
  k_irq_nak1rx,
  k_irq_nak0tx,
  k_irq_nak0rx
  // 12 watchdog
};
#endif

//------------------------------------------------------------------------------
// globals from isr.c
extern uint8 g_dma_thread;
extern t_sync g_dma_sync;
// reuse with new names, since cannot be used for both purposes at same time
#define g_irq_thread g_dma_thread
#define g_irq_sync g_dma_sync
extern t_sync g_abort_sync;
extern uint8 g_sgdma_ndp;
extern uint8 g_sgdma_chan;

//+-----------------------------------------------------------------------------
// Name:
//   _isr_bind_abort_sync
//
// Declaration:
//   void _isr_bind_abort_sync(t_sync sync);
//
// Purpose:
//   Tell the kernel what synchronizer to use for abort notification.
//   This synchronizer is delivered to the owner of the dma session
//   when traffic on endpoint 0 occurs during a bulk data transfer.
//
// Arguments:
//   sync - a t_sync to be used as the abort synchronizer.
//
// Return:
//   None.
//
// Notes:
//   This will be obsolete in future versions of the kernel because kbm_sync_abort
//   will be built into the kernel.
//
// Since:
//   MinimOS-2.1
//------------------------------------------------------------------------------
#define _isr_bind_abort_sync(__sync) { g_abort_sync = (__sync); }

//+-----------------------------------------------------------------------------
// Name:
//   _isr_bind_irq_owner
//
// Declaration:
//   void _isr_bind_irq_owner(uint8 thread, t_sync sync);
//
// Purpose:
//   Tell the kernel what thread to notify on peripheral irq, as well as what
//   synchronizer to deliver to that thread.
//
// Arguments:
//   tid  - a uint8 representing the id of the thread to notify on peripheral irq.
//          Use 0 to prevent any thread fro receiving the synchronizer.
//   sync - a t_sync to be delivered to tid when the irq occurs.
//
// Return:
//   None.
//
// Notes:
//   This will be obsolete in future versions of the kernel because kbm_sync_abort
//   will be built into the kernel.
//
// Since:
//   MinimOS-2.1
//------------------------------------------------------------------------------
#define _isr_bind_irq_owner(__thd, __sync) { g_irq_thread = (__thd);  g_irq_sync = (__sync); }

//+-----------------------------------------------------------------------------
// Name:
//   _isr_bind_dma_owner
//
// Declaration:
//   void _isr_bind_dma_owner(uint8 thread, t_sync sync);
//
// Purpose:
//   Tell the kernel what thread to notify on dma irq, as well as what
//   synchronizer to deliver to that thread.
//
// Arguments:
//   tid  - a uint8 representing the id of the thread to notify on dma irq.
//          Use 0 to prevent any thread fro receiving the synchronizer.
//   sync - a t_sync to be delivered to tid when the irq occurs.
//
// Return:
//   None.
//
// Notes:
//   This may be obsolete in future versions of the kernel because there are
//   better ways to do this.
//   The thread that owns the dma will receive the abort synchronizer
//   as per _isr_bind_abort_sync().
//
// Since:
//   MinimOS-2.1
//------------------------------------------------------------------------------
#define _isr_bind_dma_owner(__thd, __sync) { g_dma_thread = (__thd);  g_dma_sync = (__sync); }

//+-----------------------------------------------------------------------------
// Name:
//   _isr_bind_sgdma_owner
//
// Declaration:
//   void _isr_bind_sgdma_owner(uint8 ndp, uint8 chan);
//
// Purpose:
//   Tell the kernel what endpoint is bound to what physical sgdma channel.
//
// Arguments:
//   ndp  - the endpoint that "owns" the dma channel.
//   chan - the channel that is "owned" by the endpoint.
//
// Return:
//   None.
//
// Notes:
//   This may be obsolete in future versions of the kernel because there are
//   better ways to do this.
//
// Since:
//   MinimOS-2.1
//------------------------------------------------------------------------------
#define _isr_bind_sgdma_owner(__ndp, __chan) { g_sgdma_ndp = (__ndp);  g_sgdma_chan = (__chan); }

//------------------------------------------------------------------------------
// isr control operation masks
#define kbm_irqctl_clear  0x01
#define kbm_irqctl_mask   0x02
#define kbm_irqctl_unmask 0x04

//------------------------------------------------------------------------------
// prototypes
void knl_initialize_interrupts() reentrant;
void restart_timer1(void) reentrant;
void irq_control(uint8 intr, t_bit_mask operation) reentrant;

//---eof------------------------------------------------------------------------