cpu.h

U盘控制器USB97C223的固件代码,对2kPAGE NAND FLASH 有很好的支持.

sbit RB81 = 0xC2;
sbit TI1  = 0xC1;
sbit RI1  = 0xC0;
//------------------------------------------------------------------------------
// T2SCON -- extras
//------------------------------------------------------------------------------
sbit TF2   = 0xCF;
sbit EXF2  = 0xCE;
sbit RCLK  = 0xCD;
sbit TCLK  = 0xCC;
sbit EXEN2 = 0xCB;
sbit TR2   = 0xCA;
sbit C_T2  = 0xC9;
sbit CP_RL2= 0xC8;
//------------------------------------------------------------------------------
// EICON -- extras
//------------------------------------------------------------------------------
sbit SMOD1 = 0xDF;
sbit EPFI  = 0xDD;
sbit PFI   = 0xDC;
sbit WDTI  = 0xDB;
//------------------------------------------------------------------------------
// EIE -- extras
//------------------------------------------------------------------------------
sbit EWDI  = 0xEC;
sbit EX5   = 0xEB;
sbit EX4   = 0xEA;
sbit EX3   = 0xE9;
sbit EX2   = 0xE8;
//------------------------------------------------------------------------------
// EIP -- extras
//------------------------------------------------------------------------------
sbit PWDI  = 0xFC;
sbit PX5   = 0xFB;
sbit PX4   = 0xFA;
sbit PX3   = 0xF9;
sbit PX2   = 0xF8;
//-------------------------------------------------------------------------^-^-^
#endif

//-------------------------------------------------------------------------^-^-^
//-------------------------------------------------------------------------^-^-^
#ifdef k_cpu_flip8051
//------------------------------------------------------------------------------
// Dolphin Core special function registers
//------------------------------------------------------------------------------
sfr cr_clkcon   = 0x86;  // Clock/power management unit control
sfr cr_dpsel    = 0x92;  // Data pointer select
//sfr cr_dpsel  = 0xA2;  // Data pointer select for Philips' 80C51 compatiblity
sfr cr_ram_page = 0x9A;  // Data memory page selection
sfr cr_page_a   = 0x9B;  // Select Segment A Start Page
sfr cr_page_b   = 0x9C;  // Select Segment B Start Page
sfr cr_page_c   = 0x9D;  // Select Segment C Start Page
sfr cr_p0_dir   = 0xA4;  // Port 0 direction
sfr cr_p1_dir   = 0xA5;  // Port 1 direction
sfr cr_p2_dir   = 0xA6;  // Port 2 direction
sfr cr_p3_dir   = 0xA7;  // Port 3 direction
sfr cr_pwmc     = 0xA9;  // Pulse Width Modulation Control
sfr cr_pwmdclsb = 0xAA;  // PWM Duty cycle lowest 8 bits
sfr cr_pwmdcmsb = 0xAB;  // PWM Duty cycle highest 2 bits
sfr cr_mr0      = 0xC0;  // Multiply Result Bits 0-7 (MAC16 and MPY16)
sfr cr_mr1      = 0xC1;  // Multiply Result Bits 8-15 (MAC16 and MPY16)
sfr cr_mr2      = 0xC2;  // Multiply Result Bits 16-23 (MAC16 and MPY16)
sfr cr_mr3      = 0xC3;  // Multiply Result Bits 24-32 (MAC16 and MPY16)
sfr cr_mr4      = 0xC4;  // Guard Bits 32-39 of Multiply Result (MAC16 and MPY16)
sfr cr_instrsel = 0xC5;  // Extended Instruction Set select
sfr cr_aif      = 0xD8;  // Extended Interrupt flag
sfr cr_aie      = 0xE8;  // Extended Interrupt enable
sfr cr_aip      = 0xF8;  // Extended Interrupt priority
//------------------------------------------------------------------------------
// additional Dolphin Core special function registers which may or may not
// in the part that is synthesized.
//------------------------------------------------------------------------------
sfr cr_t2con  = 0xC8;  // Timer/Counter 2 control
sfr cr_rcap2l = 0xCA;  // Timer/Counter 2 Capture register low byte
sfr cr_rcap2h = 0xCB;  // Timer/Counter 2 Capture register high byte
sfr cr_tl2    = 0xCC;  // Timer 2 Low
sfr cr_th2    = 0xCD;  // Timer 2 High

//------------------------------------------------------------------------------
// TCON -- Timer Control
//------------------------------------------------------------------------------
sbit tf1 = 0x8F;  // Timer overflow Flag 1
sbit tr1 = 0x8E;  // Timer Run 1
sbit tf0 = 0x8D;  // Timer overflow Flag 0
sbit tr0 = 0x8C;  // Timer Run 0
sbit ie1 = 0x8B;  // Interrupt Edge 1
sbit it1 = 0x8A;  // Interrupt Type 1
sbit ie0 = 0x89;  // Interrupt Edge 0
sbit it0 = 0x88;  // Interrupt Type 0
//------------------------------------------------------------------------------
// SCON -- Serial port CONtrol
//------------------------------------------------------------------------------
sbit sm0 = 0x9F;  // Serial port Mode, bit 0
sbit sm1 = 0x9E;  // Serial port Mode, bit 1
sbit sm2 = 0x9D;  // Serial port Mode, bit 2
sbit ren = 0x9C;  // Reception ENable
sbit tb8 = 0x9B;  // Transmit Bit 8
sbit rb8 = 0x9A;  // Receive Bit 8
sbit ti  = 0x99;  // Transmit Irq flag
sbit ri  = 0x98;  // Receive Irq flag
//------------------------------------------------------------------------------
// IE -- Interrupt Enable (bit 6 reserved)
//------------------------------------------------------------------------------
sbit ea  = 0xAF;  // Enable All irq's, gated
sbit et2 = 0xAD;  // Enable Timer 2 irq
sbit es  = 0xAC;  // Enable Serial port irq
sbit et1 = 0xAB;  // Enable Timer1 overflow irq
sbit ex1 = 0xAA;  // Enable External irq1
sbit et0 = 0xA9;  // Enable Timer0 overflow irq
sbit ex0 = 0xA8;  // Enable External irq0
//------------------------------------------------------------------------------
// P3 -- Port3
//------------------------------------------------------------------------------
sbit rd   = 0xB7;
sbit wr   = 0xB6;
sbit t1   = 0xB5;
sbit t0   = 0xB4;
sbit int1 = 0xB3;
sbit int0 = 0xB2;
sbit txd  = 0xB1;
sbit rxd  = 0xB0;
//------------------------------------------------------------------------------
// IP -- Interrupt Priority (bits 6-7 reserved)
//------------------------------------------------------------------------------
sbit pt2 = 0xBD;  // Priority of Timer2 irq
sbit ps  = 0xBC;  // Priority Serial port irq
sbit pt1 = 0xBB;  // Priority Timer1 irq
sbit px1 = 0xBA;  // Priority eXternal irq1
sbit pt0 = 0xB9;  // Priority Timer0 irq
sbit px0 = 0xB8;  // Priority eXternal irq0
//------------------------------------------------------------------------------
//  T2CON -- timer counter 2 control
//------------------------------------------------------------------------------
sbit tf2   = 0xCF;  // Timer 2 overflow flag
sbit exf2  = 0xCE;  // Timer2 external interrupt flag 
sbit rclk  = 0xCD;  // Receive clock flag
sbit tclk  = 0xCC;  // Transmit clock flag
sbit exen2 = 0xCB;  // Timer 2 external enable
sbit tr2   = 0xCA;  // Timer 2 run control
sbit ct2   = 0xC9;  // Counter/timer select
sbit cprl2 = 0xC8;  // Capture/reload select
//------------------------------------------------------------------------------
// PSW -- Program Status Word (bit 1 reserved)
//------------------------------------------------------------------------------
sbit cy  = 0xD7;  // Carry flag
sbit ac  = 0xD6;  // Auxiliary Carry flag
sbit f0  = 0xD5;  // User flag 0 - general purpose flag
sbit rs1 = 0xD4;  // Register bank Select, high bit 1
sbit rs0 = 0xD3;  // Register bank Select, low bit 0
sbit ov  = 0xD2;  // Overflow flag
sbit f1  = 0xD1;  // User flag 1 - general purpose flag
sbit p   = 0xD0;  // Parity flag
//------------------------------------------------------------------------------
// AIF -- Additional Interrupt Flag
//------------------------------------------------------------------------------
sbit aif7 = 0xDF;  // additional interrupt flag
sbit aif6 = 0xDE;  // additional interrupt flag
sbit aif5 = 0xDD;  // additional interrupt flag
sbit aif4 = 0xDC;  // additional interrupt flag
sbit aif3 = 0xDB;  // additional interrupt flag
sbit aif2 = 0xDA;  // additional interrupt flag
sbit aif1 = 0xD9;  // additional interrupt flag
sbit aif0 = 0xD8;  // additional interrupt flag
//------------------------------------------------------------------------------
// AIE -- Additional Interrupt Enable
//------------------------------------------------------------------------------
sbit aie7 = 0xEF;  // additional interrupt enable
sbit aie6 = 0xEE;  // additional interrupt enable
sbit aie5 = 0xED;  // additional interrupt enable
sbit aie4 = 0xEC;  // additional interrupt enable
sbit aie3 = 0xEB;  // additional interrupt enable
sbit aie2 = 0xEA;  // additional interrupt enable
sbit aie1 = 0xE9;  // additional interrupt enable
sbit aie0 = 0xE8;  // additional interrupt enable
//------------------------------------------------------------------------------
// AIP -- Additional Interrupt Priority
//------------------------------------------------------------------------------
sbit aip7 = 0xFF;  // additional interrupt priority
sbit aip6 = 0xFE;  // additional interrupt priority
sbit aip5 = 0xFD;  // additional interrupt priority
sbit aip4 = 0xFC;  // additional interrupt priority
sbit aip3 = 0xFB;  // additional interrupt priority
sbit aip2 = 0xFA;  // additional interrupt priority
sbit aip1 = 0xF9;  // additional interrupt priority
sbit aip0 = 0xF8;  // additional interrupt priority

//------------------------------------------------------------------------------
// bit masks for non-bit addressable sfrs.
// the format of each bit mask is kbm_sfr_bitname
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// PCON -- Power control
//------------------------------------------------------------------------------
#define kbm_pcon_smod 0x80  // serial baud rate modify 
#define kbm_pcon_gf1  0x08  // general purpose flag bit
#define kbm_pcon_gf0  0x04  // general purpose flag bit
#define kbm_pcon_pd   0x02  // power down
#define kbm_pcon_idl  0x01  // idle mode
//------------------------------------------------------------------------------
// TMOD -- Timer/counter mode control
//------------------------------------------------------------------------------
#define kbm_tmod_gate1 0x80  // timer 1 gate control
#define kbm_tmod_ct1   0x40  // counter/timer 1 select
#define kbm_tmod_t1m1  0x20  // timer/counter 1 mode select bit 1
#define kbm_tmod_t1m0  0x10  // timer/counter 1 mode select bit 0
#define kbm_tmod_gate0 0x08  // timer 0 gate control             
#define kbm_tmod_ct0   0x04  // counter/timer 0 select           
#define kbm_tmod_t0m1  0x02  // timer/counter 0 mode select bit 1
#define kbm_tmod_t0m0  0x01  // timer/counter 0 mode select bit 0
//------------------------------------------------------------------------------
// DPSEL -- Data pointer select
//------------------------------------------------------------------------------
#define kbm_dpsel_7 0x80  // dpsel bit 7
#define kbm_dpsel_6 0x40  // dpsel bit 6
#define kbm_dpsel_5 0x20  // dpsel bit 5
#define kbm_dpsel_4 0x10  // dpsel bit 4
#define kbm_dpsel_3 0x08  // dpsel bit 3
#define kbm_dpsel_2 0x04  // dpsel bit 2
#define kbm_dpsel_1 0x02  // dpsel bit 1
#define kbm_dpsel_0 0x01  // dpsel bit 0
//------------------------------------------------------------------------------
// INSTRSEL -- Instruction set select
//------------------------------------------------------------------------------
#define kbm_instrsel_opsel 0x01  // select new instructions
//------------------------------------------------------------------------------
// CLKCON -- Clock control
//------------------------------------------------------------------------------
#define kbm_clkcon_sel 0x10  // select fclk/sclk
#define kbm_clkcon_s3  0x08  // sclk divider bit 1
#define kbm_clkcon_s2  0x04  // sclk divider bit 0
#define kbm_clkcon_s1  0x02  // fclk divider bit 1
#define kbm_clkcon_s0  0x01  // fclk divider bit 0
//------------------------------------------------------------------------------
// PWMC -- Pulse width modulation control
//------------------------------------------------------------------------------
#define kbm_pwmc_dcresol 0x80  // duty cycle resolution
#define kbm_pwmc_enpwm   0x40  // enable pwm
#define kbm_pwmc_pwmp5   0x20  // pwm prescaler bit 5
#define kbm_pwmc_pwmp4   0x10  // pwm prescaler bit 4
#define kbm_pwmc_pwmp3   0x08  // pwm prescaler bit 3
#define kbm_pwmc_pwmp2   0x04  // pwm prescaler bit 2
#define kbm_pwmc_pwmp1   0x02  // pwm prescaler bit 1
#define kbm_pwmc_pwmp0   0x01  // pwm prescaler bit 0
#endif
//---eof------------------------------------------------------------------------