reg.h

OMAP5912的DSP的寄存器映射

/************************************************/
/******       MEMORY MAP REGISTERS       ********/
/************************************************/
#define IER0         *(volatile unsigned  *)0x000000
#define	IFR0         *(volatile unsigned  *)0x000001
#define ST0_55       *(volatile unsigned  *)0x000002
#define ST1_55       *(volatile unsigned  *)0x000003
#define ST3_55       *(volatile unsigned  *)0x000004
#define AC0L         *(volatile unsigned  *)0x000008
#define AC0H         *(volatile unsigned  *)0x000009
#define AC0G         *(volatile unsigned  *)0x00000A
#define AC1L         *(volatile unsigned  *)0x00000B
#define AC1H         *(volatile unsigned  *)0x00000C
#define AC1G     	 *(volatile unsigned  *)0x00000D
#define T3_1	     *(volatile unsigned  *)0x00000E
#define TRN0     	 *(volatile unsigned  *)0x00000F

#define AR0     	 *(volatile unsigned  *)0x000010
#define AR1     	 *(volatile unsigned  *)0x000011
#define AR2     	 *(volatile unsigned  *)0x000012
#define AR3     	 *(volatile unsigned  *)0x000013
#define AR4     	 *(volatile unsigned  *)0x000014
#define AR5     	 *(volatile unsigned  *)0x000015
#define AR6     	 *(volatile unsigned  *)0x000016
#define AR7     	 *(volatile unsigned  *)0x000017
#define SP     		 *(volatile unsigned  *)0x000018
#define BK03     	 *(volatile unsigned  *)0x000019
#define BRC0    	 *(volatile unsigned  *)0x00001A
#define RSA0L_2      *(volatile unsigned  *)0x00001B
#define REA0L_2    	 *(volatile unsigned  *)0x00001C

#define T0     	 	 *(volatile unsigned  *)0x000020
#define T1     		 *(volatile unsigned  *)0x000021
#define T2     		 *(volatile unsigned  *)0x000022
#define T3_2       	 *(volatile unsigned  *)0x000023
#define AC2L         *(volatile unsigned  *)0x000024
#define AC2H       	 *(volatile unsigned  *)0x000025
#define AC2G     	 *(volatile unsigned  *)0x000026
#define CDP       	 *(volatile unsigned  *)0x000027
#define AC3L      	 *(volatile unsigned  *)0x000028
#define AC3H      	 *(volatile unsigned  *)0x000029
#define AC3G     	 *(volatile unsigned  *)0x00002A
#define DPH      	 *(volatile unsigned  *)0x00002B
#define DP       	 *(volatile unsigned  *)0x00002E
#define PDP     	 *(volatile unsigned  *)0x00002F

#define BK47       	 *(volatile unsigned  *)0x000030
#define BKC      	 *(volatile unsigned  *)0x000031
#define BSA01      	 *(volatile unsigned  *)0x000032
#define BSA23     	 *(volatile unsigned  *)0x000033
#define BSA45        *(volatile unsigned  *)0x000034
#define BSA67        *(volatile unsigned  *)0x000035
#define BSAC         *(volatile unsigned  *)0x000036
#define TRN1         *(volatile unsigned  *)0x000038
#define BRC1         *(volatile unsigned  *)0x000039
#define BRS1      	 *(volatile unsigned  *)0x00003A
#define CSR     	 *(volatile unsigned  *)0x00003B
#define RSA0H      	 *(volatile unsigned  *)0x00003C
#define RSA0L_1      *(volatile unsigned  *)0x00003D
#define REA0H        *(volatile unsigned  *)0x00003E
#define REA0L_1      *(volatile unsigned  *)0x00003F

#define RSA1H      	 *(volatile unsigned  *)0x000040
#define RSA1L     	 *(volatile unsigned  *)0x000041
#define REA1H     	 *(volatile unsigned  *)0x000042
#define REA1L      	 *(volatile unsigned  *)0x000043
#define RPTC         *(volatile unsigned  *)0x000044
#define IER1     	 *(volatile unsigned  *)0x000045
#define IFR1         *(volatile unsigned  *)0x000046
#define DBIER0       *(volatile unsigned  *)0x000047
#define DBIER1       *(volatile unsigned  *)0x000048
#define IVPD     	 *(volatile unsigned  *)0x000049
#define IVPH         *(volatile unsigned  *)0x00004A
#define ST2_55       *(volatile unsigned  *)0x00004B
#define SSP     	 *(volatile unsigned  *)0x00004C
#define SP_1       	 *(volatile unsigned  *)0x00004D
#define SPH      	 *(volatile unsigned  *)0x00004E
#define CDPH      	 *(volatile unsigned  *)0x00004F
/***************************************************/
/****** DMA CONTROL CONFIGuRATION REGISTERS ********/
/***************************************************/
#define DMA_GCR      *(ioport volatile unsigned  *)0x0E00  
#define DMA_GTCR     *(ioport volatile unsigned  *)0x0E01
#define DMA_GSCR     *(ioport volatile unsigned  *)0x0E02

#define DMA_CSDP0    *(ioport volatile unsigned  *)0x0C00  
#define DMA_CCR0     *(ioport volatile unsigned  *)0x0C01
#define DMA_CICR0    *(ioport volatile unsigned  *)0x0C02
#define DMA_CSR0     *(ioport volatile unsigned  *)0x0C03
#define DMA_CSSA_L0  *(ioport volatile unsigned  *)0x0C04
#define DMA_CSSA_U0  *(ioport volatile unsigned  *)0x0C05
#define DMA_CDSA_L0  *(ioport volatile unsigned  *)0x0C06
#define DMA_CDSA_U0  *(ioport volatile unsigned  *)0x0C07
#define DMA_CEN0     *(ioport volatile unsigned  *)0x0C08
#define DMA_CFN0     *(ioport volatile unsigned  *)0x0C09
#define DMA_CSFI0    *(ioport volatile unsigned  *)0x0C0A
#define DMA_CSEI0    *(ioport volatile unsigned  *)0x0C0B
#define DMA_CSAC0    *(ioport volatile unsigned  *)0x0C0C
#define DMA_CDAC0    *(ioport volatile unsigned  *)0x0C0D
#define DMA_CDEI0    *(ioport volatile unsigned  *)0x0C0E
#define DMA_CDFI0    *(ioport volatile unsigned  *)0x0C0F

#define DMA_CSDP1    *(ioport volatile unsigned  *)0x0C20
#define DMA_CCR1     *(ioport volatile unsigned  *)0x0C21
#define DMA_CICR1    *(ioport volatile unsigned  *)0x0C22
#define DMA_CSR1     *(ioport volatile unsigned  *)0x0C23
#define DMA_CSSA_L1  *(ioport volatile unsigned  *)0x0C24
#define DMA_CSSA_U1  *(ioport volatile unsigned  *)0x0C25
#define DMA_CDSA_L1  *(ioport volatile unsigned  *)0x0C26
#define DMA_CDSA_U1  *(ioport volatile unsigned  *)0x0C27
#define DMA_CEN1     *(ioport volatile unsigned  *)0x0C28
#define DMA_CFN1     *(ioport volatile unsigned  *)0x0C29
#define DMA_CSFI1    *(ioport volatile unsigned  *)0x0C2A
#define DMA_CSEI1    *(ioport volatile unsigned  *)0x0C2B
#define DMA_CSAC1    *(ioport volatile unsigned  *)0x0C2C
#define DMA_CDAC1    *(ioport volatile unsigned  *)0x0C2D
#define DMA_CDEI1    *(ioport volatile unsigned  *)0x0C2E
#define DMA_CDFI1    *(ioport volatile unsigned  *)0x0C2F

#define DMA_CSDP2    *(ioport volatile unsigned  *)0x0C40  
#define DMA_CCR2     *(ioport volatile unsigned  *)0x0C41
#define DMA_CICR2    *(ioport volatile unsigned  *)0x0C42
#define DMA_CSR2     *(ioport volatile unsigned  *)0x0C43
#define DMA_CSSA_L2  *(ioport volatile unsigned  *)0x0C44
#define DMA_CSSA_U2  *(ioport volatile unsigned  *)0x0C45
#define DMA_CDSA_L2  *(ioport volatile unsigned  *)0x0C46
#define DMA_CDSA_U2  *(ioport volatile unsigned  *)0x0C47
#define DMA_CEN2     *(ioport volatile unsigned  *)0x0C48
#define DMA_CFN2     *(ioport volatile unsigned  *)0x0C49
#define DMA_CSFI2    *(ioport volatile unsigned  *)0x0C4A
#define DMA_CSEI2    *(ioport volatile unsigned  *)0x0C4B
#define DMA_CSAC2    *(ioport volatile unsigned  *)0x0C4C
#define DMA_CDAC2    *(ioport volatile unsigned  *)0x0C4D
#define DMA_CDEI2    *(ioport volatile unsigned  *)0x0C4E
#define DMA_CDFI2    *(ioport volatile unsigned  *)0x0C4F

#define DMA_CSDP3    *(ioport volatile unsigned  *)0x0C60
#define DMA_CCR3     *(ioport volatile unsigned  *)0x0C61
#define DMA_CICR3    *(ioport volatile unsigned  *)0x0C62
#define DMA_CSR3     *(ioport volatile unsigned  *)0x0C63
#define DMA_CSSA_L3  *(ioport volatile unsigned  *)0x0C64
#define DMA_CSSA_U3  *(ioport volatile unsigned  *)0x0C65
#define DMA_CDSA_L3  *(ioport volatile unsigned  *)0x0C66
#define DMA_CDSA_U3  *(ioport volatile unsigned  *)0x0C67
#define DMA_CEN3     *(ioport volatile unsigned  *)0x0C68
#define DMA_CFN3     *(ioport volatile unsigned  *)0x0C69
#define DMA_CSFI3    *(ioport volatile unsigned  *)0x0C6A
#define DMA_CSEI3    *(ioport volatile unsigned  *)0x0C6B
#define DMA_CSAC3    *(ioport volatile unsigned  *)0x0C6C
#define DMA_CDAC3    *(ioport volatile unsigned  *)0x0C6D
#define DMA_CDEI3    *(ioport volatile unsigned  *)0x0C6E
#define DMA_CDFI3    *(ioport volatile unsigned  *)0x0C6F

#define DMA_CSDP4    *(ioport volatile unsigned  *)0x0C80  
#define DMA_CCR4     *(ioport volatile unsigned  *)0x0C81
#define DMA_CICR4    *(ioport volatile unsigned  *)0x0C82
#define DMA_CSR4     *(ioport volatile unsigned  *)0x0C83
#define DMA_CSSA_L4  *(ioport volatile unsigned  *)0x0C84
#define DMA_CSSA_U4  *(ioport volatile unsigned  *)0x0C85
#define DMA_CDSA_L4  *(ioport volatile unsigned  *)0x0C86
#define DMA_CDSA_U4  *(ioport volatile unsigned  *)0x0C87
#define DMA_CEN4     *(ioport volatile unsigned  *)0x0C88
#define DMA_CFN4     *(ioport volatile unsigned  *)0x0C89
#define DMA_CSFI4    *(ioport volatile unsigned  *)0x0C8A
#define DMA_CSEI4    *(ioport volatile unsigned  *)0x0C8B
#define DMA_CSAC4    *(ioport volatile unsigned  *)0x0C8C
#define DMA_CDAC4    *(ioport volatile unsigned  *)0x0C8D
#define DMA_CDEI4    *(ioport volatile unsigned  *)0x0C8E
#define DMA_CDFI4    *(ioport volatile unsigned  *)0x0C8F

#define DMA_CSDP5    *(ioport volatile unsigned  *)0x0CA0
#define DMA_CCR5     *(ioport volatile unsigned  *)0x0CA1
#define DMA_CICR5    *(ioport volatile unsigned  *)0x0CA2
#define DMA_CSR5     *(ioport volatile unsigned  *)0x0CA3
#define DMA_CSSA_L5  *(ioport volatile unsigned  *)0x0CA4
#define DMA_CSSA_U5  *(ioport volatile unsigned  *)0x0CA5
#define DMA_CDSA_L5  *(ioport volatile unsigned  *)0x0CA6
#define DMA_CDSA_U5  *(ioport volatile unsigned  *)0x0CA7
#define DMA_CEN5     *(ioport volatile unsigned  *)0x0CA8
#define DMA_CFN5     *(ioport volatile unsigned  *)0x0CA9
#define DMA_CSFI5    *(ioport volatile unsigned  *)0x0CAA
#define DMA_CSEI5    *(ioport volatile unsigned  *)0x0CAB
#define DMA_CSAC5    *(ioport volatile unsigned  *)0x0CAC
#define DMA_CDAC5    *(ioport volatile unsigned  *)0x0CAD
#define DMA_CDEI5    *(ioport volatile unsigned  *)0x0CAE
#define DMA_CDFI5    *(ioport volatile unsigned  *)0x0CAF

/***************************************************/
/*********        McBSP1    REGISTERS      *********/
/***************************************************/ 

#define DSP_MCBSP1_DRR2      *(ioport volatile unsigned  *)0x8C00 
#define DSP_MCBSP1_DRR1      *(ioport volatile unsigned  *)0x8C01
#define DSP_MCBSP1_DXR2      *(ioport volatile unsigned  *)0x8C02
#define DSP_MCBSP1_DXR1      *(ioport volatile unsigned  *)0x8C03
#define DSP_MCBSP1_SPCR2     *(ioport volatile unsigned  *)0x8C04
#define DSP_MCBSP1_SPCR1     *(ioport volatile unsigned  *)0x8C05
#define DSP_MCBSP1_RCR2      *(ioport volatile unsigned  *)0x8C06
#define DSP_MCBSP1_RCR1      *(ioport volatile unsigned  *)0x8C07
#define DSP_MCBSP1_XCR2      *(ioport volatile unsigned  *)0x8C08
#define DSP_MCBSP1_XCR1      *(ioport volatile unsigned  *)0x8C09
#define DSP_MCBSP1_SRGR2     *(ioport volatile unsigned  *)0x8C0A
#define DSP_MCBSP1_SRGR1     *(ioport volatile unsigned  *)0x8C0B
#define DSP_MCBSP1_MCR2      *(ioport volatile unsigned  *)0x8C0C
#define DSP_MCBSP1_MCR1      *(ioport volatile unsigned  *)0x8C0D
#define DSP_MCBSP1_RCERA     *(ioport volatile unsigned  *)0x8C0E