fs453.cpp

IMX31开发板

//------------------------------------------------------------------------------
//
//  Copyright (C) 2005-2006, Freescale Semiconductor, Inc. All Rights Reserved.
//  THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS
//  AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT
//
//------------------------------------------------------------------------------
//
//  File:  fs453.cpp
//
//  Provides BSP-specific configuration routines for FS453 TVenc driver.
//
//------------------------------------------------------------------------------

#include <windows.h>
#include <nkintr.h>
#include <ceddk.h>
#include "bsp.h"
#include "csp.h"
#include "i2cbus.h"
#include "fs453.h"



#ifndef __cplusplus
extern "C" {
#endif
//-----------------------------------------------------------------------------
// External Functions


//-----------------------------------------------------------------------------
// External Variables


#define FS453_CLOCK_NOT_SWITCH	1
//-----------------------------------------------------------------------------
// Defines
#define FS453_CTRL_IF					L"I2C1:"
#define FS453_I2C_SCLK_FREQ				40000
#define FS453_I2C_SLAVE_ADDR			0x6A //0xD4
#define MX31_I2C_SLAVE_ADDR				0x20
#define FS453_I2C_WAIT_ACK_DURATION	    1000//INFINITE

//#define FS453_YCRCB_INPUT_BOOL			FALSE //false:RGB
#define FS453_UNDERSCAN_TVIMAGE_BOOL	FALSE //false:overscan
#define FS453_PAL_BOOL					FALSE //false:ntsc

#define FS453_REG_WID_IS_16BIT_MAX		TRUE

#define FS453_UPDATEPLL_WAIT			100
#define FS453_RESET_WAIT				100

#define FS453_DEBUGWRITE			0
//------------------------------------------------------------------------------
// REGISTER ADDR
//------------------------------------------------------------------------------
#define	FS453_IHO_ADDR							0x00
#define	FS453_IVO_ADDR							0x02
#define	FS453_IHW_ADDR							0x04
#define	FS453_VSC_ADDR							0x06
#define	FS453_HSC_ADDR							0x08
#define	FS453_BYPASS_ADDR						0x0A
#define	FS453_CR_ADDR							0x0C
#define	FS453_MISC_ADDR							0x0E
#define	FS453_NCONL_ADDR						0x10
#define	FS453_NCONH_ADDR						0x12
#define	FS453_NCODL_ADDR						0x14
#define	FS453_NCODH_ADDR						0x16
#define	FS453_PLLM_PUMPCNTL_ADDR				0x18
#define	FS453_PLLN_ADDR							0x1A
#define	FS453_PLL_POSTDIV_ADDR					0x1C
#define	FS453_SHP_ADDR							0x24
#define	FS453_FLK_ADDR							0x26
#define	FS453_GPIO_ADDR							0x28
#define	FS453_ID_ADDR							0x32
#define	FS453_STATUS_PORT_ADDR					0x34
#define	FS453_FIFO_SP_ADDR						0x36
#define	FS453_FIFO_LAT_ADDR						0x38
#define	FS453_CHR_FREQ_ADDR						0x40
#define	FS453_CHR_PHASE_ADDR					0x44
#define	FS453_MISC_45_ADDR						0x45
#define	FS453_MISC_46_ADDR						0x46
#define	FS453_MISC_47_ADDR						0x47
#define	FS453_HSYNC_WID_ADDR					0x48
#define	FS453_BURST_WID_ADDR					0x49
#define	FS453_BPORCH_ADDR						0x4A
#define	FS453_CB_BURST_ADDR						0x4B
#define	FS453_CR_BURST_ADDR						0x4C
#define	FS453_MISC_4D_ADDR						0x4D
#define	FS453_BLACK_LVL_ADDR					0x4E
#define	FS453_BLANK_LVL_ADDR					0x50
#define	FS453_NUM_LINES_ADDR					0x57
#define	FS453_WHITE_LVL_ADDR					0x5E
#define	FS453_CB_GAIN_ADDR						0x60
#define	FS453_CR_GAIN_ADDR						0x62
#define	FS453_TINT_ADDR							0x65
#define	FS453_BR_WAY_ADDR						0x69
#define	FS453_FR_PORCH_ADDR						0x6C
#define	FS453_NUM_PIXELS_ADDR					0x71
#define	FS453_1ST_LINE_ADDR						0x73
#define	FS453_MISC_74_ADDR						0x74
#define	FS453_SYNC_LVL_ADDR						0x75
#define	FS453_VBI_BL_LVL_ADDR					0x7C
#define	FS453_SOFT_RST_ADDR						0x7E
#define	FS453_ENC_VER_ADDR						0x7F
#define	FS453_WSS_CONFIG_ADDR					0x80
#define	FS453_WSS_CLK_ADDR						0x81
#define	FS453_WSS_DATAF1_ADDR					0x83
#define	FS453_WSS_DATAF0_ADDR					0x86
#define	FS453_WSS_LNF1_ADDR						0x89
#define	FS453_WSS_LNF0_ADDR						0x8A
#define	FS453_WSS_LVL_ADDR						0x8B
#define	FS453_MISC_8D_ADDR						0x8D
#define	FS453_VID_CNTL0_ADDR					0x92
#define	FS453_HD_FP_SYNC_ADDR					0x94
#define	FS453_HD_YOFF_BP_ADDR					0x96
#define	FS453_SYNC_DL_ADDR						0x98
#define	FS453_LD_DET_ADDR						0x9C
#define	FS453_DAC_CNTL_ADDR						0x9E
#define	FS453_PWR_MGNT_ADDR						0xA0
#define	FS453_RED_MTX_ADDR						0xA2
#define	FS453_GRN_MTX_ADDR						0xA4
#define	FS453_BLU_MTX_ADDR						0xA6
#define	FS453_RED_SCL_ADDR						0xA8
#define	FS453_GRN_SCL_ADDR						0xAA
#define	FS453_BLU_SCL_ADDR						0xAC
#define	FS453_CLOSED_CAPTION_FIELD1_ADDR 		0xAE
#define	FS453_CLOSED_CAPTION_FIELD2_ADDR 		0xB0
#define	FS453_CLOSED_CAPTION_CNTL_ADDR			0xB2
#define	FS453_CLOSED_CAPTION_BLANKING_VALUE_ADDR 0xB4
#define	FS453_CLOSED_CAPTION_BLANKING_SAMPLE_ADDR 0xB6
#define	FS453_HACT_ST_ADDR						0xB8
#define	FS453_HACT_WD_ADDR						0xBA
#define	FS453_VACT_ST_ADDR						0xBC
#define	FS453_VACT_HT_ADDR						0xBE
#define	FS453_HACT_ST_ADDR						0xB8
#define	FS453_PR_AND_PB_RELATIVE_SCLAING_ADDR	0xC0
#define	FS453_LUMA_BANDWIDTH_ADDR				0xC2
#define	FS453_QPR_ADDR							0xC4

//------------------------------------------------------------------------------
// REGISTER WIDTH
//------------------------------------------------------------------------------
#define W_1_BYTE								1//8
#define W_2_BYTE								2//16
#define W_3_BYTE								3//24
#define W_4_BYTE								4//32

#define	FS453_IHO_WID							W_2_BYTE
#define	FS453_IVO_WID							W_2_BYTE
#define	FS453_IHW_WID							W_2_BYTE
#define	FS453_VSC_WID							W_2_BYTE
#define	FS453_HSC_WID							W_2_BYTE
#define	FS453_BYPASS_WID						W_2_BYTE
#define	FS453_CR_WID							W_2_BYTE
#define	FS453_MISC_WID							W_2_BYTE
#define	FS453_NCONL_WID							W_2_BYTE
#define	FS453_NCONH_WID							W_2_BYTE
#define	FS453_NCODL_WID							W_2_BYTE
#define	FS453_NCODH_WID							W_2_BYTE
#define	FS453_PLLM_PUMPCNTL_WID					W_2_BYTE
#define	FS453_PLLN_WID							W_2_BYTE
#define	FS453_PLL_POSTDIV_WID					W_2_BYTE
#define	FS453_SHP_WID							W_2_BYTE
#define	FS453_FLK_WID							W_2_BYTE
#define	FS453_GPIO_WID							W_2_BYTE
#define	FS453_ID_WID							W_2_BYTE
#define	FS453_STATUS_PORT_WID					W_2_BYTE
#define	FS453_FIFO_SP_WID						W_2_BYTE
#define	FS453_FIFO_LAT_WID						W_2_BYTE
#define	FS453_CHR_FREQ_WID						W_4_BYTE
#define	FS453_CHR_PHASE_WID						W_2_BYTE
#define	FS453_MISC_45_WID						W_1_BYTE
#define	FS453_MISC_46_WID						W_1_BYTE
#define	FS453_MISC_47_WID						W_1_BYTE
#define	FS453_HSYNC_WID_WID						W_1_BYTE
#define	FS453_BURST_WID_WID						W_1_BYTE
#define	FS453_BPORCH_WID						W_1_BYTE
#define	FS453_CB_BURST_WID						W_1_BYTE
#define	FS453_CR_BURST_WID						W_1_BYTE
#define	FS453_MISC_4D_WID						W_1_BYTE
#define	FS453_BLACK_LVL_WID						W_2_BYTE
#define	FS453_BLANK_LVL_WID						W_2_BYTE
#define	FS453_NUM_LINES_WID						W_2_BYTE
#define	FS453_WHITE_LVL_WID						W_2_BYTE
#define	FS453_CB_GAIN_WID						W_1_BYTE
#define	FS453_CR_GAIN_WID						W_1_BYTE
#define	FS453_TINT_WID							W_1_BYTE
#define	FS453_BR_WAY_WID						W_1_BYTE
#define	FS453_FR_PORCH_WID						W_1_BYTE
#define	FS453_NUM_PIXELS_WID					W_2_BYTE
#define	FS453_1ST_LINE_WID						W_1_BYTE
#define	FS453_MISC_74_WID						W_1_BYTE
#define	FS453_SYNC_LVL_WID						W_1_BYTE
#define	FS453_VBI_BL_LVL_WID					W_2_BYTE
#define	FS453_SOFT_RST_WID						W_1_BYTE
#define	FS453_ENC_VER_WID						W_1_BYTE
#define	FS453_WSS_CONFIG_WID					W_1_BYTE
#define	FS453_WSS_CLK_WID						W_2_BYTE
#define	FS453_WSS_DATAF1_WID					W_3_BYTE
#define	FS453_WSS_DATAF0_WID					W_3_BYTE
#define	FS453_WSS_LNF1_WID						W_1_BYTE
#define	FS453_WSS_LNF0_WID						W_1_BYTE
#define	FS453_WSS_LVL_WID						W_2_BYTE
#define	FS453_MISC_8D_WID						W_1_BYTE
#define	FS453_VID_CNTL0_WID						W_2_BYTE
#define	FS453_HD_FP_SYNC_WID					W_2_BYTE
#define	FS453_HD_YOFF_BP_WID					W_2_BYTE
#define	FS453_SYNC_DL_WID						W_2_BYTE
#define	FS453_LD_DET_WID						W_2_BYTE
#define	FS453_DAC_CNTL_WID						W_2_BYTE
#define	FS453_PWR_MGNT_WID						W_2_BYTE
#define	FS453_RED_MTX_WID						W_2_BYTE
#define	FS453_GRN_MTX_WID						W_2_BYTE
#define	FS453_BLU_MTX_WID						W_2_BYTE
#define	FS453_RED_SCL_WID						W_2_BYTE
#define	FS453_GRN_SCL_WID						W_2_BYTE
#define	FS453_BLU_SCL_WID						W_2_BYTE
#define	FS453_CLOSED_CAPTION_FIELD1_WID 		W_2_BYTE
#define	FS453_CLOSED_CAPTION_FIELD2_WID 		W_2_BYTE
#define	FS453_CLOSED_CAPTION_CNTL_WID			W_2_BYTE
#define	FS453_CLOSED_CAPTION_BLANKING_VALUE_WID	W_2_BYTE
#define	FS453_CLOSED_CAPTION_BLANKING_SAMPLE_WID W_2_BYTE
#define	FS453_HACT_ST_WID						W_2_BYTE
#define	FS453_HACT_WD_WID						W_2_BYTE
#define	FS453_VACT_ST_WID						W_2_BYTE
#define	FS453_VACT_HT_WID						W_2_BYTE
#define	FS453_HACT_ST_WID						W_2_BYTE
#define	FS453_PR_AND_PB_RELATIVE_SCLAING_WID	W_2_BYTE
#define	FS453_LUMA_BANDWIDTH_WID				W_2_BYTE
#define	FS453_QPR_WID							W_2_BYTE


//------------------------------------------------------------------------------
// REGISTER BIT FIELD POSITIONS (LEFT SHIFT)
//------------------------------------------------------------------------------
//0x00
#define FS453_IHO_IHO_LSH						0
//0x02
#define FS453_IVO_IVO_LSH						0
//0x04
#define FS453_IHW_IHW_LSH						0
//0x06
#define FS453_VSC_VSC_LSH						0
//0x08
#define FS453_HSC_HUSC_LSH						8
#define FS453_HSC_HDSC_LSH						0
//0x0A
#define FS453_BYPASS_B_BYPASS_LSH				4
#define FS453_BYPASS_CAC_BYPASS_LSH				3
#define FS453_BYPASS_HDS_BYPASS_LSH				1
//0x0c
#define FS453_CR_GCC_CK_LVL_LSH					13
#define FS453_CR_P656_LVL_LSH					12
#define FS453_CR_P656_IN_LSH					11
#define FS453_CR_P656_OUT_LSH					10
#define FS453_CR_CBAR_480P_LSH					9
#define FS453_CR_PAL_NTSCIN_LSH					8
#define FS453_CR_SYNC_MS_LSH					7
#define FS453_CR_FIFO_CLR_LSH					6
#define FS453_CR_CACQ_CLR_LSH					5
#define FS453_CR_CDEC_BP_LSH					4
#define FS453_CR_NCO_EN_LSH						1
#define FS453_CR_SRESET_LSH						0
//0x0e
#define FS453_MISC_P_ORDER_LSH					11
#define FS453_MISC_BRDG_RST_LSH					10
#define FS453_MISC_UIM_E_LSH					9
#define FS453_MISC_UV_SWAP_LSH					8
#define FS453_MISC_UIM_DEC_LSH					7
#define FS453_MISC_UIM_CCLK_LSH					5
#define FS453_MISC_UIM_DCLK_LSH					4
#define FS453_MISC_UIM_MOD_LSH					0
//0x10
#define FS453_NCONL_NCONL_LSH					0
#define FS453_NCONH_NCONH_LSH					0
//0x14
#define FS453_NCODL_NCODL_LSH					0
#define FS453_NCODH_NCODH_LSH					0
//0x18
//@@#define FS453_PLLM_PUMPCNTL_PLLG_LSH			12
#define FS453_PLLM_PUMPCNTL_PLLM_LSH			0
//0x1A
#define FS453_PLLN_PLLN_LSH						0
//0x1C
#define FS453_PLL_POSTDIV_PLL_EP_LSH			8
#define FS453_PLL_POSTDIV_PLL_IP_LSH			0
//0x24
#define FS453_SHP_SHP_LSH						0
//0x26
#define FS453_FLK_FLK_LSH						0
//0x32
#define FS453_ID_ID_LSH							0
//0x38
#define FS453_FIFO_LAT_FIFO_LAT_LSH				0
//0x47
#define FS453_MISC_47_CHR_BW_LSH				3
#define FS453_MISC_47_COMP_YUV_LSH				2
#define FS453_MISC_47_COMP_GAIN_LSH				0
//0x48
#define FS453_HSYNC_WID_HSYNC_WID_LSH			0
//0x49
#define FS453_BURST_WID_BURST_WID_LSH			0
//0x4A
#define FS453_BPORCH_BPORCH_LSH					0
//0x4B
#define FS453_CB_BURST_CB_BURST_LSH				0
//0x4C
#define FS453_CR_BURST_CR_BURST_LSH				0
//0x4E
#define FS453_BLACK_LVL_BLACK_LVL_LSH			0
//0x50
#define FS453_BLANK_LVL_BLANK_LVL_LSH			0
//0x5E
#define FS453_WHITE_LVL_WHITE_LVL_LSH			0
//0x60
#define FS453_CB_GAIN_CB_GAIN_LSH				0
//0x62
#define FS453_CR_GAIN_CR_GAIN_LSH				0
//0x69
#define FS453_BR_WAY_BR_WAY_LSH					0
//0x6c
#define FS453_FR_PORCH_FR_PORCH_LSH				0
//0x74
#define FS453_MISC_74_UV_ORDER_LSH				7
#define FS453_MISC_74_PAL_MODE_LSH				6
#define FS453_MISC_74_CHR_BW_LSH				5
#define FS453_MISC_74_INVERT_TOP_LSH			4
#define FS453_MISC_74_SYS625_50_LSH				3
#define FS453_MISC_74_CH_PH_R_LSH				1
#define FS453_MISC_74_VSYNC5_LSH				0
//0x75
#define FS453_SYNC_LVL_SYNC_LVL_LSH				0
//0x8D
#define FS453_MISC_8D_NOTCH_EN_LSH				4
#define FS453_MISC_8D_NOTCH_WD_LSH				3
#define FS453_MISC_8D_NOTCH_FREQ_LSH			0
//0x92
#define FS453_VID_CNTL0_TOP_FIELD_LSH			15
#define FS453_VID_CNTL0_OBIN_USIG_LSH			14
#define FS453_VID_CNTL0_PRPB_SYNC_LSH			13
#define FS453_VID_CNTL0_VSYNC5_6_LSH			12
#define FS453_VID_CNTL0_BLANK_INV_LSH			11
#define FS453_VID_CNTL0_FIELD_INV_LSH			10
#define FS453_VID_CNTL0_VSYNC_INV_LSH			9
#define FS453_VID_CNTL0_HSYNC_INV_LSH			8
#define FS453_VID_CNTL0_INT_PROG_LSH			7
#define FS453_VID_CNTL0_FIELD_MS_LSH			6
#define FS453_VID_CNTL0_SYNC_LVL_LSH			5
#define FS453_VID_CNTL0_SYNC_BI_TRI_LSH			4
#define FS453_VID_CNTL0_SYNC_ADD_LSH			3
#define FS453_VID_CNTL0_MATRIX_BYP_LSH			2
#define FS453_VID_CNTL0_VID_MODE_LSH			0
//0x9E
#define FS453_DAC_CNTL_DAC_DMUX_LSH				6
#define FS453_DAC_CNTL_DAC_CMUX_LSH				4
#define FS453_DAC_CNTL_DAC_BMUX_LSH				2
#define FS453_DAC_CNTL_DAC_AMUX_LSH				0
//0xa0
#define FS453_PWR_MGNT_GTLIO_PD_LSH				13
#define FS453_PWR_MGNT_PLL_PD_LSH				12
#define FS453_PWR_MGNT_CLKOFF_LSH				11
#define FS453_PWR_MGNT_CLK_SOFF_LSH				9
#define FS453_PWR_MGNT_DAC_D_LP_LSH				8
#define FS453_PWR_MGNT_DAC_C_LP_LSH				7
#define FS453_PWR_MGNT_DAC_B_LP_LSH				6
#define FS453_PWR_MGNT_DAC_A_LP_LSH				5
#define FS453_PWR_MGNT_BGAP_OFF_LSH				4
#define FS453_PWR_MGNT_DAC_D_OFF_LSH			3
#define FS453_PWR_MGNT_DAC_C_OFF_LSH			2
#define FS453_PWR_MGNT_DAC_B_OFF_LSH			1
#define FS453_PWR_MGNT_DAC_A_OFF_LSH			0
//0xc4
#define FS453_QPR_INITIATE_LSH					12
#define FS453_QPR_QK_UIM_LSH					10
#define FS453_QPR_QK_OS_LSH						8
#define FS453_QPR_QK_YC_IN_LSH					7
#define FS453_QPR_QK_FF_LSH						6
#define FS453_QPR_QK_OM_LSH						4