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MIT的一个数字频综源代码

module: clocked_delay
parameters:
inputs:  double in double clk
outputs:  double out
classes: EdgeDetect edge1();
static_variables: double prev_in
init: prev_in = 0.0;
code:
if (edge1.inp(clk))
  {
   out = prev_in;
   prev_in = in;
  }