iop480_lib.c

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        return;

    // this disables interrupts
    dwIntStatus = IOP480_ReadReg (hPlx, IOP480_PINTENB);
    IOP480_WriteReg (hPlx, IOP480_PINTENB, dwIntStatus & ~BIT0);

    // this calls WD_IntDisable()
    InterruptThreadDisable(hPlx->Int.hThread);
    hPlx->Int.hThread = NULL;
}

IOP480_DMA_HANDLE IOP480_DMAOpen (IOP480_HANDLE hPlx, DWORD dwLocalAddr, PVOID buf, 
    DWORD dwBytes, BOOL fIsRead, IOP480_DMA_CHANNEL dmaChannel)
{
    DWORD dwDMAMODE, dwDMADPR, dwDMALADR, dwDMACOUNT, dwDMAPLADR;
    DWORD dwChannelShift = (dmaChannel==IOP480_DMA_CHANNEL_0) ? 0 : IOP480_DMA_CHANNEL_SHIFT;
    BOOL fAutoinc = TRUE;
    IOP480_DMA_HANDLE hDma;
    
    hDma = malloc (sizeof(IOP480_DMA_STRUCT));
    if (hDma==NULL)
    {
        sprintf( IOP480_ErrorString, "could not allocate memory for dma handle!\n");
        goto Exit;
    }
    BZERO (*hDma);
    hDma->dmaChannel = dmaChannel;
    hDma->dma.dwBytes = dwBytes;
    hDma->dma.pUserAddr = buf; 
    hDma->dma.dwOptions = 0; 
    WD_DMALock (hPlx->hWD, &hDma->dma);
    if (!hDma->dma.hDma) 
    {
        sprintf( IOP480_ErrorString, "could not lock the buffer!\n");
        goto Exit;
    }
    if (hDma->dma.dwPages==1)
    {
        //dma of one page ==> direct dma
        dwDMAMODE = fAutoinc ? 0 : BIT11; 
        dwDMADPR = BIT0 | (fIsRead ? BIT3 : 0);
        dwDMALADR = dwLocalAddr;
        dwDMACOUNT = (hDma->dma.Page[0].dwBytes & 0x007fffff);
        dwDMAPLADR = (DWORD) hDma->dma.Page[0].pPhysicalAddr;

        IOP480_WriteReg (hPlx, IOP480_DMA_MODE    + dwChannelShift, dwDMAMODE);
        IOP480_WriteReg (hPlx, IOP480_DMA_PCILADR + dwChannelShift, dwDMAPLADR);
        IOP480_WriteReg (hPlx, IOP480_DMA_LOCADR  + dwChannelShift, dwDMALADR);
        IOP480_WriteReg (hPlx, IOP480_DMA_COUNT   + dwChannelShift, dwDMACOUNT);
        IOP480_WriteReg (hPlx, IOP480_DMA_DPR     + dwChannelShift, dwDMADPR);
    }
    else
    {
        DWORD dwAlignShift, dwPageNumber, dwMemoryCopied;
        typedef struct {
            DWORD dwSIZ;
            DWORD dwPADR;
            DWORD dwLADR;
            DWORD dwDPR;
        } DMA_LIST;
        DMA_LIST *pList;

        // dma of more then one page ==> chain dma
        // includes extra 0x10 bytes for quadword alignment
        hDma->dmaList.dwBytes = hDma->dma.dwPages * sizeof(DMA_LIST) + 0x10;
        hDma->dmaList.pUserAddr = NULL;
        hDma->dmaList.dwOptions = DMA_KERNEL_BUFFER_ALLOC;
        WD_DMALock (hPlx->hWD, &hDma->dmaList);
        if (!hDma->dmaList.hDma)
        {
            sprintf (IOP480_ErrorString, "could not lock the chain buffer!\n");
            goto Exit;
        }

        //setting chain of dma pages in the memory
        dwMemoryCopied = 0;
        dwAlignShift = 0x10 - ((DWORD) hDma->dmaList.pUserAddr & 0xf);
        // verification that bits 0-3 are zero (quadword aligned)
        pList = (DMA_LIST *) ((DWORD) hDma->dmaList.pUserAddr + dwAlignShift);
        for (dwPageNumber=0; dwPageNumber<hDma->dma.dwPages; dwPageNumber++)
        {
            pList[dwPageNumber].dwPADR = (DWORD) hDma->dma.Page[dwPageNumber].pPhysicalAddr;
            pList[dwPageNumber].dwLADR = dwLocalAddr + (fAutoinc ? dwMemoryCopied : 0);
            pList[dwPageNumber].dwSIZ = hDma->dma.Page[dwPageNumber].dwBytes;
            pList[dwPageNumber].dwDPR = 
                ((DWORD) hDma->dmaList.Page[0].pPhysicalAddr + dwAlignShift + sizeof(DMA_LIST)*(dwPageNumber+1))
                | BIT0 | (fIsRead ? BIT3 : 0);
            dwMemoryCopied += hDma->dma.Page[dwPageNumber].dwBytes;
        }
        pList[dwPageNumber - 1].dwDPR |= BIT1; // mark end of chain
    
        dwDMAMODE = (fAutoinc ? 0 : BIT11) 
                    | BIT9;        // chain transfer

        dwDMADPR = ((DWORD)hDma->dmaList.Page[0].pPhysicalAddr + dwAlignShift) | BIT0; 
        // starting the dma
        IOP480_WriteReg (hPlx, IOP480_DMA_MODE + dwChannelShift, dwDMAMODE);
        IOP480_WriteReg (hPlx, IOP480_DMA_DPR  + dwChannelShift, dwDMADPR);
    }

    return hDma;

Exit:
    if (hDma!=NULL)
        IOP480_DMAClose(hPlx,hDma);
    return NULL;
}

void IOP480_DMAClose (IOP480_HANDLE hPlx, IOP480_DMA_HANDLE hDma)
{
    if (hDma->dma.hDma)
        WD_DMAUnlock(hPlx->hWD, &hDma->dma);
    if (hDma->dmaList.hDma)
        WD_DMAUnlock(hPlx->hWD, &hDma->dmaList);
    free (hDma);
}

BOOL IOP480_DMAIsDone (IOP480_HANDLE hPlx, IOP480_DMA_HANDLE hDma)
{
    return (IOP480_ReadReg (hPlx, IOP480_DMA_CSR + hDma->dmaChannel*IOP480_DMA_CHANNEL_SHIFT) & BIT4)==BIT4;
}

void IOP480_DMAStart (IOP480_HANDLE hPlx, IOP480_DMA_HANDLE hDma, BOOL fBlocking)
{
    IOP480_WriteByte (hPlx, IOP480_ADDR_REG, IOP480_DMA_CSR + 
        hDma->dmaChannel * IOP480_DMA_CHANNEL_SHIFT, BIT0 | BIT1);

    //Busy wait for plx to finish transfer
    if (fBlocking) 
        while (!IOP480_DMAIsDone(hPlx, hDma));
}

BOOL IOP480_DMAReadWriteBlock (IOP480_HANDLE hPlx, DWORD dwLocalAddr, PVOID buf, 
    DWORD dwBytes, BOOL fIsRead, IOP480_DMA_CHANNEL dmaChannel)
{
    IOP480_DMA_HANDLE hDma;
    if (dwBytes==0) 
        return TRUE;

    hDma = IOP480_DMAOpen(hPlx, dwLocalAddr, buf, dwBytes, fIsRead, dmaChannel);
    if (!hDma) 
        return FALSE;

    IOP480_DMAStart(hPlx, hDma, TRUE);
    IOP480_DMAClose(hPlx, hDma);
    return TRUE;
}

BOOL IOP480_EEPROMValid(IOP480_HANDLE hPlx)
{
    return (IOP480_ReadReg(hPlx, IOP480_DEVINIT) & BIT5)==BIT5;
}

BOOL IOP480_EEPROMReadWord(IOP480_HANDLE hPlx, DWORD dwOffset, PWORD pwData)
{
    DWORD dwData;
    DWORD dwAddr;

    if (dwOffset % 2)
    {
        sprintf (IOP480_ErrorString, "The offset is not even\n");
        return FALSE;
    }
    dwAddr = dwOffset - (dwOffset % 4);

    if (!IOP480_EEPROMReadDWord(hPlx, dwAddr, &dwData))
        return FALSE;

    *pwData = (WORD) (dwData >> ((dwOffset % 4)*8));

    return TRUE;
}

BOOL IOP480_EEPROMWriteWord(IOP480_HANDLE hPlx, DWORD dwOffset, WORD wData)
{
    DWORD dwData;
    DWORD dwAddr;

    dwAddr = dwOffset - (dwOffset % 4);

    if (!IOP480_EEPROMReadDWord(hPlx, dwAddr, &dwData))
        return FALSE;

    switch (dwOffset % 4)
    {
    case 0:
        dwData = (dwData & 0xffff0000) | wData;
        break;
    case 2:
        dwData = (dwData & 0x0000ffff) | (wData << 16);
        break;
    default:
        sprintf (IOP480_ErrorString, "The offset is not even\n");
        return FALSE;
    }

    return IOP480_EEPROMWriteDWord(hPlx, dwAddr, dwData);
}

void IOP480_Sleep(IOP480_HANDLE hPlx, DWORD dwMicroSeconds)
{
    WD_SLEEP sleep;

    BZERO (sleep);
    sleep.dwMicroSeconds = dwMicroSeconds;
    WD_Sleep( hPlx->hWD, &sleep);
}

BYTE IOP480_EEPROMEnable(IOP480_HANDLE hPlx, WORD addr)
{
    DWORD dwVal ,dwAddr;
    BYTE bOldValue;
    DWORD mask = BIT8|BIT9|BIT10|BIT11|BIT12|BIT13|BIT14;

    dwVal = IOP480_ReadReg (hPlx, IOP480_DEVINIT);
    bOldValue = (BYTE) ((dwVal & mask) >> 8);
    dwVal = (dwVal & ~mask) ;
    dwAddr = addr / 4; // using LWord (4 bytes) address.
    dwAddr <<= 8;
    dwAddr &= mask;

    dwVal = dwVal | dwAddr ;

    IOP480_WriteReg (hPlx, IOP480_DEVINIT, dwVal) ;
    IOP480_Sleep(hPlx, 10000);

    return bOldValue * 4;
}

void IOP480_EEPROMDataReadWrite(IOP480_HANDLE hPlx, BOOL fIsRead, PDWORD pdwData)
{
    WD_PCI_CONFIG_DUMP pciCnf;

    BZERO (pciCnf);
    pciCnf.pciSlot = hPlx->pciSlot;
    pciCnf.pBuffer = pdwData;
    pciCnf.dwOffset = IOP480_VPD_DATA;
    pciCnf.dwBytes = 4;
    pciCnf.fIsRead = fIsRead;
    WD_PciConfigDump(hPlx->hWD,&pciCnf);
}

void IOP480_EEPROMAddrReadWrite(IOP480_HANDLE hPlx, BOOL fIsRead, PWORD pwAddr)
{
    WD_PCI_CONFIG_DUMP pciCnf;

    BZERO (pciCnf);
    pciCnf.pciSlot = hPlx->pciSlot;
    pciCnf.pBuffer = pwAddr;
    pciCnf.dwOffset = IOP480_VPD_ADDR;
    pciCnf.dwBytes = 2;
    pciCnf.fIsRead = fIsRead;
    WD_PciConfigDump(hPlx->hWD,&pciCnf);
}

BOOL IOP480_EEPROMReadDWord(IOP480_HANDLE hPlx, DWORD dwOffset, PDWORD pdwData)
{
    WORD wVal;
    WORD wAddr;
    int i;

    if (dwOffset % 4)
    {
        sprintf (IOP480_ErrorString, "The offset is not a multiple of 4\n");
        return FALSE;
    }
    wAddr = (((WORD)dwOffset) & (~BIT15)) ;
    
    for (i=0; i<10; i++)
    {
        IOP480_EEPROMAddrReadWrite(hPlx, FALSE, &wAddr);
        IOP480_Sleep(hPlx, 10000);
        IOP480_EEPROMAddrReadWrite(hPlx, TRUE, &wVal);
        if (wVal & BIT15)
            break;
    }
    
    if (i==10)
    {
        sprintf (IOP480_ErrorString, "Acknowledge to EEPROM read was not received\n");
        return FALSE;
    }

    IOP480_EEPROMDataReadWrite(hPlx, TRUE, pdwData);

    return TRUE;
}

BOOL IOP480_EEPROMWriteDWord(IOP480_HANDLE hPlx, DWORD dwOffset, DWORD dwData)
{
    DWORD dwReadback;
    WORD wAddr;
    WORD wVal;
    int i;
    BOOL fRet;
    BOOL fReadOk = FALSE;
    BYTE bEnableOffset;

    if (dwOffset % 4)
    {
        sprintf (IOP480_ErrorString, "The offset is not a multiple of 4\n");
        return FALSE;
    }
    wAddr = (WORD)dwOffset;
    bEnableOffset = IOP480_EEPROMEnable(hPlx, wAddr);
    wAddr |= BIT15;

    for (i=0; i<10; i++)
    {
        IOP480_EEPROMDataReadWrite(hPlx, FALSE, &dwData);
        IOP480_EEPROMAddrReadWrite(hPlx, FALSE, &wAddr);
        IOP480_Sleep(hPlx, 10000);
        IOP480_EEPROMAddrReadWrite(hPlx, TRUE, &wVal);
        if ((wVal & BIT15) == 0)
            break;
    }

    fReadOk = IOP480_EEPROMReadDWord(hPlx, dwOffset, &dwReadback);

    if (fReadOk && dwReadback==dwData)
        fRet = TRUE;
    else
    {
        fRet = FALSE;
        if (fReadOk)
            sprintf (IOP480_ErrorString, "Write 0x%08x, Read 0x%08x\n",dwData, dwReadback);
        else
            sprintf (IOP480_ErrorString, "Error reading EEPROM\n");
    }
    IOP480_EEPROMEnable(hPlx, bEnableOffset); 
    return fRet;
}