os_cpu.h

uCOS-II ports on Tensilica HiFi330 core.

#ifndef OS_CPU_H
#define OS_CPU_H


#ifdef  OS_CPU_GLOBALS
#define OS_CPU_EXT
#else
#define OS_CPU_EXT  extern
#endif

#include <xtensa/hal.h>
#include <xtensa/tie/xt_core.h>

/*
*********************************************************************************************************
*                                              DATA TYPES
*                                         (Compiler Specific)
*********************************************************************************************************
*/

typedef unsigned char  BOOLEAN;
typedef unsigned char  INT8U;                    /* Unsigned  8 bit quantity                           */
typedef signed char    INT8S;                    /* Signed    8 bit quantity                           */
typedef unsigned short INT16U;                   /* Unsigned 16 bit quantity                           */
typedef signed short   INT16S;                   /* Signed   16 bit quantity                           */
typedef unsigned int   INT32U;                   /* Unsigned 32 bit quantity                           */
typedef signed int     INT32S;                   /* Signed   32 bit quantity                           */
typedef float          FP32;                     /* Single precision floating point                    */
typedef double         FP64;                     /* Double precision floating point                    */

typedef INT32U         OS_STK;                   /* Each stack entry is 32-bit wide                    */
typedef INT32U         OS_CPU_SR;                /* Define size of CPU status register (PSW = 32 bits) */

#define BYTE           INT8S                     /* Define data types for backward compatibility ...   */
#define UBYTE          INT8U                     /* ... to uC/OS V1.xx.  Not actually needed for ...   */
#define WORD           INT16S                    /* ... uC/OS-II.                                      */
#define UWORD          INT16U
#define LONG           INT32S
#define ULONG          INT32U

/* 
*********************************************************************************************************
*                              XTENSA T1050.5 Processor
*
* Method #1:  Disable/Enable interrupts using simple instructions.  After critical section, interrupts
*             will be enabled even if they were disabled before entering the critical section.
*
* Method #2:  Disable/Enable interrupts by preserving the state of interrupts.  In other words, if 
*             interrupts were disabled before entering the critical section, they will be disabled when
*             leaving the critical section.
*
* Method #3:  Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
*             would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
*             disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to 
*             disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
*             into the CPU's status register.
*********************************************************************************************************
*/




static INT32U OS_XTENSA_PS;
#define  OS_ENTER_CRITICAL()  OS_XTENSA_PS =XT_RSIL(15) ; XT_ESYNC()   /* Disable interrupts */
#define  OS_EXIT_CRITICAL()   XT_WSR_PS(OS_XTENSA_PS); XT_ESYNC()   /* Enable  interrupts */





/*
*********************************************************************************************************
*                           Xtensa Miscellaneous - Stack and task switching
*
* Stack on Xtensa grows from top to bottom.
* To generate a software interrupt, call the function INTGenerateSwInt()
*
*********************************************************************************************************
*/

#define  OS_STK_GROWTH        1                       /* Stack grows from HIGH to LOW memory */

void INTGenerateSwInt(INT32U swIntMask);
#define  SOFTWARE0_INT_MASK    0x000000080
#define  OS_TASK_SW()          xthal_set_intset(SOFTWARE0_INT_MASK)

/*
*********************************************************************************************************
*                                            GLOBAL VARIABLES
*********************************************************************************************************
*/
OS_CPU_EXT  INT32U   OS_XTENSA_TMP_1;

/* Processor Specific */
/* frame defines in # of bytes */
#define FRAME_SIZE 124
#define FRAME_AR(x) (x * 4)
#define FRAME_LBEG 64
#define FRAME_LEND 68
#define FRAME_LCOUNT 72
#define FRAME_SAR 76
#define FRAME_PS 80
#define FRAME_PC 84

#endif