780537.h
来自「NEC 的无线通讯方案」· C头文件 代码 · 共 443 行
H
443 行
/*
* $Id: 780537.h,v 1.9 2007/08/17 06:21:52 sunny Exp $
*/
//-----------------------------------------------------------------------------
//
// file: 780537.h
// description: demonstration program, definition of registers
// Version: 1.0
//
// 78K0/KE2 NECE N.Shono
//
//-------------------------------------------------------------------------------
#ifndef __78F0537_H__
#define __78F0537_H__
/////////////////////////////////////////////////////////////////////
// CPUS
#define MAIN_CLOCK (16.0000f) // Main Clock MHz (for debug)
#define SUB_CLOCK (32.768f) // Sub Clock 32.768KHz
/////////////////////////////////////////////////////////////////////
// I/O port
//-----------------------------------------------
// P0
// unused port should be set as OUTPUT.
//
//#define P0_DIR 0b01101011
//#define P0_PULLUP 0b01101011
/* P0
|------+------+------+------|------+------+------+------|
| NONE | SFD |SW1_8 | SCLK | SO | SI |SW1_7 |SW1_6 |
|------+------+------+------|------+------+------+------|
PM 0 1 1 0 1 0 1 1
(in=1, out=0)
PD 0 1 0 1 0 0 0 0
PU 0 1 1 0 1 0 1 1
(pup=1)
*/
//#define SW1_8 (P0.5)
//#define SW1_7 (P0.1)
//#define SW1_6 (P0.0)
/* P0
|------+------+------+------|------+------+------+------|
| - | SFD | - | SCLK | SO | SI | - | - |
|------+------+------+------|------+------+------+------|
PM 1 1 0 0 1 0 0 0
(in=1, out=0)
PD 0 1 0 1 0 0 0 0
PU 0 1 0 0 1 0 0 0
(pup=1)
*/
#define P0_DIR 0b11001000
#define P0_PULLUP 0b01001000
//-----------------------------------------------
// P1
//#define P1_DIR 0b00010000
/* P1
|------+------+------+------|------+------+------+------|
| P17 | P16 | P15 | TXD | RXD | P12 | P11 |P10 |
|------+------+------+------|------+------+------+------|
PM 0 0 0 1 0 0 0 0
(in=1, out=0)
PD 0 0 0 0 1 0 0 0
PU 0 0 0 0 0 0 0 0
(pup=1)
*/
/* P1
|------+------+------+------|------+------+------+------|
| - | - | - | TXD | RXD | P12 | P11 |P10 |
|------+------+------+------|------+------+------+------|
PM 0 0 0 1 0 0 0 0
(in=1, out=0)
PD 0 0 0 0 1 0 0 0
PU 0 0 0 0 0 0 0 0
(pup=1)
*/
#define P1_DIR 0b00010010
#define P1_PULLUP 0b00010010
//-----------------------------------------------
// P2
//#define P2_DIR 0b11111111
// P20/ANI0 Power Monitor
// P24-P26 (ext. I/O)
// P21-P27 not use INPUT only
#define P2_DIR 0b01110010
//-----------------------------------------------
// P3
#define P3_DIR 0b11110111
#define P3_PULLUP 0b00000111
/* P3
|------+------+------+------|------+------+------+------|
| NONE | NONE | NONE | NONE | P33 | P32 | P31 |FIFOP |
|------+------+------+------|------+------+------+------|
PM 1 1 1 1 1 1 1 1
(in=1, out=0)
PD 0 0 0 0 0 0 0 0
PU 0 0 0 0 0 0 0 0
(pup=1)
*/
//-----------------------------------------------
// P4
#define P4_DIR 0b11110000
/* P4
|------+------+------+------|------+------+------+------|
| NC | NC | NC | NC | CSn | LED4 | LED3 |LED2 |
|------+------+------+------|------+------+------+------|
PM 0 0 0 0 0 0 0 0
(in=1, out=0)
PD 0 0 0 0 1 0 0 0
PU 0 0 0 0 0 0 0 0
(pup=1)
*/
#define LED_TX_ON_AIR (P2.0)
#define LED_RX_SPI (P2.1)
#define LED_UART_RX (P2.2)
#define LED_UART_TX (P2.3)
#define LED2 (P4.0)
#define LED3 (P4.1)
#define LED4 (P4.2)
//#define LED_STATUS(a) (a)
//#define LED_OFF(a) ((a) = 1)
//////////////////////////////////////
//#if 1
//#define LED_ON(a) ((a) = 0)
//#define LED_TOGGLE(a) ((a) ^= 1)
//#else
//#define LED_ON(a) LED_OFF(a)
//#define LED_TOGGLE(a) LED_OFF(a)
//#endif
//-----------------------------------------------
// P5
#define P5_DIR 0b11111100
#define P5_PULLUP 0b00001100
/* P5
|------+------+------+------|------+------+------+------|
| NC | NC | NC | NC | CCA | FIFO | RESn |VREG |
|------+------+------+------|------+------+------+------|
PM 0 0 0 0 1 1 0 0
(in=1, out=0)
PD 0 0 0 0 0 0 0 1
PU 0 0 0 0 1 0 0 0
(pup=1)
*/
//-----------------------------------------------
// P6
#define P6_DIR 0b11110000
//#define P6_PULLUP 0b00001111
/* P6
|------+------+------+------|------+------+------+------|
| NC | NC | NC | NC | NC |P62 |P61 |P60 |
|------+------+------+------|------+------+------+------|
PM 0 0 0 0 0 0 0 0
(in=1, out=0)
PD 0 0 0 0 0 0 0 0
PU 0 0 0 0 0 0 0 0
(pup=1)
*/
//-----------------------------------------------
// P7
#define P7_DIR 0b10000000
#define P7_PUP 0b10000000
//#define SW_DETECT 0b01111111
//#define TACT_SW4 ((P7.1)==0)
//#define TACT_SW3 ((P7.0)==0)
/* P7
|------+------+------+------|------+------+------+------|
|FLMD0 |SW1 |SW1 |SW1 |SW1E |SW1 |SW4 |SW3 |
|------+------+------+------|------+------+------+------|
PM 1 1 1 1 1 1 1 1
(in=1, out=0)
PD 0 0 0 0 0 0 0 0
PU 0 1 1 1 1 1 1 1
(pup=1)
*/
//-----------------------------------------------
// P12
#define P12_DIR 0b00000000
#define P12_PULLUP 0b00000000
//-----------------------------------------------
// P14
#define P14_DIR 0b11111101
#define P14_PULLUP 0b00000001
/* P14
|------+------+------+------|------+------+------+------|
|NONE |NONE |NC |NC |NC |NC |P141 |P140 |
|------+------+------+------|------+------+------+------|
PM 0 0 0 0 0 0 0 0
(in=1, out=0)
PD 0 0 0 0 0 0 0 0
PU 0 0 0 0 0 0 0 0
(pup=1)
*/
/////////////////////////////////////////////////////////////////////
// Port
#define PORT_INPUT 1
#define PORT_OUTPUT 0
#define PORT_HI 1
#define PORT_LO 0
#define PORT_PULLUP_ON 1
#define PORT_PULLUP_OFF 0
/////////////////////////////////////////////////////////////////////
// UART
//-----------------------------------------------
// Consts (bit)
// serial interface status register
#define ASIS_PE 0x04 // parity error
#define ASIS_FE 0x02 // framing error
#define ASIS_OVE 0x01 // overrun error
// serial interface tx status register
#define ASIF_TXBF 0x02 // tx buffer data flag
#define ASIF_TXSF 0x01 // tx shift regster data flag
// serial interface mode register
#define ASIM_POWER 0x80 // clock enable
#define ASIM_TXE 0x40 // tx enable
#define ASIM_RXE 0x20 // rx enable
#define ASIM_PS0 0x10 // parity 1
#define ASIM_PS1 0x08 // parity 0
#define ASIM_CL 0x04 // data length
#define ASIM_SL 0x02 // stop bit
#define ASIM_ISRM 0x01 // rx error interrupt siganl
// baudrate sertting
#define CKSEL_9600 2
#define CKSEL_19200 1
#define CKSEL_38400 0
#define CKSEL_57600 0
#define CKSEL_115200 0
#define BRGC_9600 208
#define BRGC_19200 208
#define BRGC_38400 208
#define BRGC_57600 139
#define BRGC_115200 69
//-----------------------------------------------
// Registers for UART debug port
#define UART6_RX RXB6
#define UART6_TX TXB6
#define UART6_RX_STATUS ASIS6
#define UART6_TX_STATUS ASIF6
#define UART6_BRGC BRGC6
#define UART6_MODE ASIM6
#define UART6_CLOCK CKSR6
#define UART6_TX_INT_MASK STMK6 // INTST6
#define UART6_RX_INT_MASK SRMK6 // INTSR6
#define UARTD_ER_INT_MASK SREMK6
//-----------------------------------------------
// Ports
#define UART6_RX_PM PM1.4
#define UART6_TX_PM PM1.3
#define UARTD_RX_PORT P1.4
#define UART6_TX_PORT P1.3
//-----------------------------------------------
// Registers for usrt COM port
#define UART0_RX RXB0
#define UART0_TX TXS0
#define UARTC_RX_STATUS ASIS0
#define UARTC_BRGC BRGC0
#define UART0_MODE ASIM0
//#define UARTC_CLOCK CKSR0
#define UART0_TX_INT_MASK STMK0 // INTST0
#define UART0_RX_INT_MASK SRMK0 // INTSR0
#define UARTC_ER_INT_MASK SREMK0
//-----------------------------------------------
// Ports
#define UART0_RX_PM PM1.1
#define UART0_TX_PM PM1.0
#define UARTC_RX_PORT P1.1
#define UART0_TX_PORT P1.0
/////////////////////////////////////////////////////////////////////
// CSI
//-----------------------------------------------
// Consts (bit)
// serial interface mode register
#define CSIM_CSIE 0x80
#define CSIM_TRMD 0x40
#define CSIM_SSE 0x20
#define CSIM_DIR 0x10
#define CSIM_CSOT 0x01
// baudrate sertting
#define CSIC_SPEED_DIV2 0x00
#define CSIC_SPEED_DIV4 0x01
#define CSIC_SPEED_DIV8 0x02
#define CSIC_SPEED_DIV16 0x03
#define CSIC_SPEED_DIV32 0x04
#define CSIC_SPEED_DIV64 0x05
#define CSIC_SPEED_DIV128 0x06
#define CSIC_SPEED_SLAVE 0x07
// timing type
#define CSIC_TIMING_1 0x00
#define CSIC_TIMING_2 0x08
#define CSIC_TIMING_3 0x10
#define CSIC_TIMING_4 0x18
//-----------------------------------------------
// Registers
#define CSI10_RX SIO10
#define CSI10_TX SOTB10
#define CSI10_MODE CSIM10
#define CSI10_CLOCK CSIC10
#define CSI11_RX SIO11
#define CSI11_TX SOTB11
#define CSI11_MODE CSIM11
#define CSI11_CLOCK CSIC11
//-----------------------------------------------
// Ports
#define CSI10_RX_PM PM1.1
#define CSI10_TX_PM PM1.2
#define CSI10_CLK_PM PM1.0
#define CSI10_RX_PORT P1.1
#define CSI10_TX_PORT P1.2
#define CSI10_CLK_PORT P1.0
#define CSI11_RX_PM PM0.3
#define CSI11_TX_PM PM0.2
#define CSI11_CLK_PM PM0.4
#define CSI11_RX_PORT P0.3
#define CSI11_TX_PORT P0.2
#define CSI11_CLK_PORT P0.4
/////////////////////////////////////////////////////////////////////
// UBEC CHIP
//#define UBEC_GPIO0_PM PM5.0
//#define UBEC_GPIO0_PORT P5.0
//#define UBEC_GPIO1_PM PM5.2
//#define UBEC_GPIO1_PORT P5.2
//#define UBEC_GPIO2_PM PM5.3
//#define UBEC_GPIO2_PORT P5.3
#define UBEC_RESETn_PM PM5.1
#define UBEC_RESETn_PORT P5.1
#define UBEC_INT_PM PM3.0
#define UBEC_INT_PORT P3.0
#define UBEC_WAKE_PM PM0.6
#define UBEC_WAKE_PORT P0.6
#define UBEC_SEN_PM PM4.3
#define UBEC_SEN_PORT P4.3
#define UBEC_INT_MASK PMK1
#define UBEC_INT_EGP1 EGP1
#define UBEC_INT_EGN1 EGN1
/////////////////////////////////////////////////////////////////////
// Interrupt MASK
// UART
//#define SET_UARTD_MASK() { UART6_TX_INT_MASK=1; UART6_RX_INT_MASK=1; }
//#define CLEAR_UARTD_MASK() { UART6_TX_INT_MASK=0; UART6_RX_INT_MASK=0; }
// Timer 5
#define SET_TIMER50_MASK() { TMMK50 = 1; }
#define CLEAR_TIMER50_MASK() { TMMK50 = 0; }
// Key input
#define SET_KEY_MASK() { KRMK = 1; }
#define CLEAR_KEY_MASK() { KRMK = 0; }
#endif // __78F0537_H__
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