📄 main.c
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/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*---------------------------------------------------------------------------
MAIN.C
- description
- See README.TXT for project description and disclaimer.
/*---------------------------------------------------------------------------*/
#include "mb90425.h"
/*---------------------------------------------------------------------------
#Defines
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
Globals
/*---------------------------------------------------------------------------*/
#define TIMEOUT 50000 /* <<< timeout value, if CAN-data can not be send */
/*---------------------------------------------------------------------------
Functions
/*---------------------------------------------------------------------------*/
/* Note:
The -A and -B versions include a CPU Detection Reset Circuit.
This must be cleared periodically to prevent program reset.
The conditions for clearing the counter of this circuit are given below:
1. Writing 0 to CL bit of LVRC register
2. Internal reset
3. Stopping main oscillation clock
4. Transition to sleep mode
5. Transition to time-base timer mode or timer mode
6. Starting hold
*/
void clear_CPU_operation_detection (void)
{
LVRC = 0x35; /* clears CPU operation detection */
}
/*---------------------------------------------------------------------------
CAN
/*---------------------------------------------------------------------------*/
/* Search for "<<<" There changes by the user may be required */
#define SENT_DATA 0x0102030405060708
#define BTR_4M_250k 0x4980 /* BTR config 250 kBaud */
//#define BTR_16M_20k8_24_66_2 0x7EDF /* BTR config 20.8 kBaud */
//#define BTR_16M_33K0_22_68_3 0x6DD5 /* BTR config 33.0 kBaud */
//#define BTR_16M_33K3_22_68_3 0x4DD5 /* BTR config 33.3 kBaud */
//#define BTR_16M_83K3_24_66_2 0x7EC7 /* BTR config 83.3 kBaud */
//#define BTR_16M_100k_20_70_3 0x5CC7 /* BTR config 100 kBaud */
//#define BTR_16M_125k_16_68_2 0x4987 /* BTR config 125 kBaud */
//#define BTR_16M_500k_16_68_2 0x4981 /* BTR config 500 kBaud */
//#define BTR_16M_1M00_16_68_2 0x4980 /* BTR config 1.0 MBaud */
// The following macros convert from identifier value to the appropriate
// I/O register value and vise versa. These macros should be used for
// constant identifier values.
// The actual order of ID bits in the register can be found in the manual.
// ID (11bit-IDs uses Bit 28..18
// (29bit-IDs uses Bit 28...0
/*#define MSG2STD(msg) ( (unsigned short )(msg) >> 3 & 0x000000FF \
| (unsigned short )(msg) << 13 & 0x0000FF00 )
#define MSG2EXT(msg) ( (unsigned long )(msg) >> 21 & 0x000000FF \
| (unsigned long )(msg) >> 5 & 0x0000FF00 \
| (unsigned long )(msg) << 11 & 0x00FF0000 \
| (unsigned long )(msg) << 27 & 0xFF000000 )
#define STD2MSG(reg) ( ((unsigned short)(reg) & 0x000000FF) << 3 \
| ((unsigned short)(reg) & 0x0000FF00) >> 13 )
#define EXT2MSG(reg) ( ((unsigned long )(reg) & 0x000000FF) << 21 \
| ((unsigned long )(reg) & 0x0000FF00) << 5 \
| ((unsigned long )(reg) & 0x00FF0000) >> 11 \
| ((unsigned long )(reg) & 0xFF000000) >> 27 )
*/
void CAN_init(void)
{
*(unsigned*)(0x003D00) = 0x81;
CSR = 0x81; /* bit 7: enable transmit output pin */
/* bit 0: stop bus operation */
while (!CSR_HALT)
clear_CPU_operation_detection();
TCANR = 0xffff; /* cancel all Transmissions */
BVALR = 0; /* all message buffer are invalid */
// it is default.
BTR = BTR_4M_250k; /* <<< set bit timing */
*(unsigned*)(0x003D07) = 0x49;
*(unsigned*)(0x003D06) = 0x80;
*(unsigned*)(0x003D00) = 0x80;
CSR = 0x0080; /* activate can bus operation */
while (CSR_HALT) /* wait for Bus-connection */
clear_CPU_operation_detection();
AMR0 = 0; /* <<< acceptance mask definition 0 */
AMR1 = 0; /* <<< acceptance mask definition 1 */
}
/*===== CAN Buffer ======= */
/* it is recommended not to use Buffer0 in general,
in order to prevent from Hit&Away trap */
#define buffer1 1 // receive buffer
void CAN_buffer1(void)
{
/* CAN: messagebuffer 1 will be used as receive-buffer */
*(unsigned*)(0x000070) = 0x00; /* message buffer are invalid */
*(unsigned*)(0x003D09) = 0x00; /* <<< 0:11bit */
*(unsigned*)(0x003D08) = 0x02; // 1:29bit indentifier
*(unsigned*)(0x003B24) = 0xc7; // Enable IDR1
*(unsigned*)(0x003B25) = 0xf8;
*(unsigned*)(0x003B26) = 0x02;
*(unsigned*)(0x003B27) = 0x38;
// IDR(1) = 0x2000; /* <<< ID e.g. 0x2000 = ID #1 */
/* (11bit-IDs uses Bit 28..18 */
/* (29bit-IDs uses Bit 28...0 */
/* see Utility Bitmixer
/* or use defines: e.g. IDR(1) = MSG2STD(1); */
*(unsigned*)(0x003D10) = 0x00; /* <<< Acceptance Mask: */
/* 0 : full bit compare (full can) */
/* 1 : full bit mask (basic can) */
/* 2 : use acceptance mask 0 */
/* 3 : use acceptance mask 1 */
*(unsigned*)(0x003D0E) = 0x00; //disable Trx-Interrupt
// TIER_TIE1 = 0; /* <<< 0: disable / 1: enable Trx-Interrupt */
// RFWTR_RFWT1 = 0; /* <<< 0: no wait for remote requeset */
// TRTRR_TRTR1 = 0; /* <<< 0: Data / 1: Remote frame Trx */
*(unsigned*)(0x000070) = 0x02; /* message buffer are valid */
*(unsigned*)(0x003b62) = 0x08; // Data Length Code; 8-byte length data register
}
#define buffer0 0 // send buffer
void CAN_buffer0(void)
{
/* CAN: messagebuffer 0 will be used as send-buffer */
BVALR_BVAL0 = 0; /* message buffer are invalid */
IDER_IDE0 = 1; /* <<< 0:11bit 1:29bit indentifier */
IDR(0) = 0xc7f80238; /* <<< ID e.g. 0x4000 = ID #2 */
/* (11bit-IDs uses Bit 28..18 */
/* (29bit-IDs uses Bit 28...0 */
/* see Utility Bitmixer
/* or use defines: e.g. IDR(1) = MSG2STD(1); */
AMSR_AMS0 = 0; /* <<< Acceptance Mask: */
/* 0 : full bit compare (full can) */
/* 1 : full bit mask (basic can) */
/* 2 : use acceptance mask 0 */
/* 2 : use acceptance mask 1 */
TIER_TIE0 = 0; /* <<< 0: diasble / 1: enable Trx-Interrupt */
// study the interrupt handling program first!!!
RFWTR_RFWT0 = 0; /* <<< 0: no wait for remote requeset */
TRTRR_TRTR0 = 0; /* <<< 0: Data / 1: Remote frame Trx */
BVALR_BVAL0 = 1; /* message buffer are valid */
DLCR(0) = 0x08; // 8-byte length data register
}
/*===== Readout Buffer x ======= */
unsigned char GetCanData (char x, unsigned char *BufPtr)
{
char Len, pos;
*BufPtr++ = Len = DLCR(x);
for (pos=0; pos<=Len;pos++)
*BufPtr++ = DTR_BYTE(x, pos);
return (Len);
}
/*---------------------------------------------------------------------------
Interrupts
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------
MAIN.C
/*---------------------------------------------------------------------------*/
volatile short k = 0xffff,kk;
void disp( int x , int y );
void sub(void);
void key(int z);
void super( int m ,int l );
void sub2(void);
void delay(int m);
void sent(void);
void receive(void);
void main(void)
{
unsigned char CanDataBuffer[9];
unsigned long timeout; /* timeout-counter */
unsigned int i;
InitIrqLevels();
__set_il(7); //allow all interrupt levels
__EI(); // enable interrupts at all levels
/* User LEDs of Evaluation-Board: Flash-Can-100P */
// PDR4 = 0xff;
// DDR4 = 0xff;
/* Initialisation of LCD-controller */
LCRL = 0x2d; /* internal Resistor, Main Clock , 1/4 duty */
LCRH = 0x07; /* use all 24 segment-lines SEG00...SEG23, DTCH=0 */
PDR7 = 0xFF;
DDR7 = 0x00;
PDR8 = 0xFF;
DDR8 = 0x00;
*(volatile unsigned char __far*)(0x3970) = 0x00;
*(volatile unsigned char __far*)(0x3969) = 0x00;
*(volatile unsigned char __far*)(0x3968) = 0x00;
*(volatile unsigned char __far*)(0x3967) = 0x00;
*(volatile unsigned char __far*)(0x3966) = 0x00;
*(volatile unsigned char __far*)(0x3965) = 0xda;
*(volatile unsigned char __far*)(0x3964) = 0xfa; //???
*(volatile unsigned char __far*)(0x3963) = 0x0e;
*(volatile unsigned char __far*)(0x3962) = 0xfe;
*(volatile unsigned char __far*)(0x3961) = 0xde;
*(volatile unsigned char __far*)(0x3960) = 0xbe;
/* initialize CAN */
CAN_init();
CAN_buffer1();
CAN_buffer0();
delay(1);
while(1)
{
clear_CPU_operation_detection();
if(*(unsigned*)(0x000078)) //if RCR = 1
receive();
k=PDR8;
k=k<<8;
k+=PDR7;
kk=k;
if(k == 0x0fff)
{
continue;
}
delay(1);
k=PDR8;
k=k<<8;
k+=PDR7;
if(k != kk)
{
continue;
}
key(k);
} //while(1)
} // main()
void send(void)
{
// DTR_DWORD(0,0) = 0x01020304 ;
// DTR_DWORD(0,1) = 0x05060708 ;
*(volatile unsigned char __far*)(0x3964) = 0xda;
DTR_DWORD(0,0) = 0x05060708;
TREQR = 1 ;
}
void receive(void)
{
*(volatile unsigned char __far*)(0x3960) = 0xc6;
// = 003b8f
// 003b8e
// 003b8d
// 003b8c
// 003b8b
// 003b8a
// 003b89
super(*(unsigned*)(0x003b88),2) ;
*(unsigned*)(0x000078) = 0;
}
/* Keypad operation program */
void key(int z)
{
switch(z)
{
case 0x0ffe : send() ; break;
case 0x0ffd : super(z,4) ; break;
case 0x0ffb : super(z,4) ; break;
case 0x0ff7 : super(z,4) ; break;
case 0x0fef : super(z,4) ; break;
case 0x0fdf : super(z,4) ; break;
case 0x0fbf : super(z,4) ; break;
case 0x0f7f : super(z,4) ; break;
case 0x0eff : super(z,4) ; break;
case 0x0dff : super(z,4) ; break;
case 0x0bff : super(z,4) ; break;
case 0x07ff : super(z,4) ; break;
}
}
/*display number*/
void disp( int x , int y ) /* x=addr , y=num */
{
switch(y)
{case 0 : *(volatile unsigned short __far*) x = 0xbe; break;
case 1 : *(volatile unsigned short __far*) x = 0x06; break;
case 2 : *(volatile unsigned short __far*) x = 0x7c; break;
case 3 : *(volatile unsigned short __far*) x = 0x5e; break;
case 4 : *(volatile unsigned short __far*) x = 0xc6; break;
case 5 : *(volatile unsigned short __far*) x = 0xda; break;
case 6 : *(volatile unsigned short __far*) x = 0xfa; break;
case 7 : *(volatile unsigned short __far*) x = 0x0e; break;
case 8 : *(volatile unsigned short __far*) x = 0xfe; break;
case 9 : *(volatile unsigned short __far*) x = 0xde; break;
case 0xa : *(volatile unsigned short __far*) x = 0xee; break;
case 0xb : *(volatile unsigned short __far*) x = 0xf2; break;
case 0xc : *(volatile unsigned short __far*) x = 0xb8; break;
case 0xd : *(volatile unsigned short __far*) x = 0x76; break;
case 0xe : *(volatile unsigned short __far*) x = 0xf8; break;
case 0xf : *(volatile unsigned short __far*) x = 0xe8; break;
}
}
/*Display multi-bit number*/
void super( int m ,int l ) /*m=the content of the number , l=the length of the number */
{
int i,j,addr;
for(addr=0x3960;addr<0x3966;addr++)
{
disp(addr,0);
}
addr=0x3960;
for(i=0;i<l;i++,addr++)
{
j=0x000f<<4*i;
j=j&m;
j=j>>4*i;
disp(addr,j);
} /*display k, use the lower 4 segments*/
*(volatile unsigned char __far*)addr = 0xbe;
}
void delay(int m)
{ register long int i;
volatile register long int j=0;
int n;
for(n=0;n<m;n++)
{
for(i=0;i<50000;i++)
{
j++;
}
clear_CPU_operation_detection();
}
}
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