zxb.fit.smsg

步进电机的控制程序

Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Sun Mar 16 22:55:40 2008
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off zxb -c zxb
Info: Selected device EP1C6Q240C8 for design "zxb"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: The Fitter has identified 1 logical partitions of which 0 have a previous placement to use
    Info: Previous placement does not exist for 99 of 99 atoms in partition Top
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
    Info: Device EP1C12Q240C8 is compatible
Info: Fitter converted 2 user pins into dedicated programming pins
    Info: Pin ~nCSO~ is reserved at location 24
    Info: Pin ~ASDO~ is reserved at location 37
Warning: No exact pin location assignment(s) for 51 pins of 51 total pins
    Info: Pin second_pulse_out[15] not assigned to an exact location on the device
    Info: Pin second_pulse_out[14] not assigned to an exact location on the device
    Info: Pin second_pulse_out[13] not assigned to an exact location on the device
    Info: Pin second_pulse_out[12] not assigned to an exact location on the device
    Info: Pin second_pulse_out[11] not assigned to an exact location on the device
    Info: Pin second_pulse_out[10] not assigned to an exact location on the device
    Info: Pin second_pulse_out[9] not assigned to an exact location on the device
    Info: Pin second_pulse_out[8] not assigned to an exact location on the device
    Info: Pin second_pulse_out[7] not assigned to an exact location on the device
    Info: Pin second_pulse_out[6] not assigned to an exact location on the device
    Info: Pin second_pulse_out[5] not assigned to an exact location on the device
    Info: Pin second_pulse_out[4] not assigned to an exact location on the device
    Info: Pin second_pulse_out[3] not assigned to an exact location on the device
    Info: Pin second_pulse_out[2] not assigned to an exact location on the device
    Info: Pin second_pulse_out[1] not assigned to an exact location on the device
    Info: Pin second_pulse_out[0] not assigned to an exact location on the device
    Info: Pin speed[15] not assigned to an exact location on the device
    Info: Pin speed[14] not assigned to an exact location on the device
    Info: Pin speed[13] not assigned to an exact location on the device
    Info: Pin speed[12] not assigned to an exact location on the device
    Info: Pin speed[11] not assigned to an exact location on the device
    Info: Pin speed[10] not assigned to an exact location on the device
    Info: Pin speed[9] not assigned to an exact location on the device
    Info: Pin speed[8] not assigned to an exact location on the device
    Info: Pin speed[7] not assigned to an exact location on the device
    Info: Pin speed[6] not assigned to an exact location on the device
    Info: Pin speed[5] not assigned to an exact location on the device
    Info: Pin speed[4] not assigned to an exact location on the device
    Info: Pin speed[3] not assigned to an exact location on the device
    Info: Pin speed[2] not assigned to an exact location on the device
    Info: Pin speed[1] not assigned to an exact location on the device
    Info: Pin speed[0] not assigned to an exact location on the device
    Info: Pin acele_decre not assigned to an exact location on the device
    Info: Pin Reset not assigned to an exact location on the device
    Info: Pin Clk_1Hz not assigned to an exact location on the device
    Info: Pin acceleration[15] not assigned to an exact location on the device
    Info: Pin acceleration[14] not assigned to an exact location on the device
    Info: Pin acceleration[13] not assigned to an exact location on the device
    Info: Pin acceleration[12] not assigned to an exact location on the device
    Info: Pin acceleration[11] not assigned to an exact location on the device
    Info: Pin acceleration[10] not assigned to an exact location on the device
    Info: Pin acceleration[9] not assigned to an exact location on the device
    Info: Pin acceleration[8] not assigned to an exact location on the device
    Info: Pin acceleration[7] not assigned to an exact location on the device
    Info: Pin acceleration[6] not assigned to an exact location on the device
    Info: Pin acceleration[5] not assigned to an exact location on the device
    Info: Pin acceleration[4] not assigned to an exact location on the device
    Info: Pin acceleration[3] not assigned to an exact location on the device
    Info: Pin acceleration[2] not assigned to an exact location on the device
    Info: Pin acceleration[1] not assigned to an exact location on the device
    Info: Pin acceleration[0] not assigned to an exact location on the device
Info: Fitter is using the Classic Timing Analyzer
Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time.
Info: Completed User Assigned Global Signals Promotion Operation
Info: DQS I/O pins require 0 global routing resources
Info: Automatically promoted signal "Clk_1Hz" to use Global clock in PIN 29
Info: Completed Auto Global Promotion Operation
Info: Starting register packing
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Finished moving registers into I/O cells, LUTs, and RAM blocks
Info: Finished register packing: elapsed time is 00:00:00
Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement
    Info: Number of I/O pins in group: 50 (unused VREF, 3.30 VCCIO, 34 input, 16 output, 0 bidirectional)
        Info: I/O standards used: 3.3-V LVTTL.
Info: I/O bank details before I/O pin placement
    Info: Statistics of I/O banks
        Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 3 total pin(s) used --  41 pins available
        Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  48 pins available
        Info: I/O bank number 3 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  45 pins available
        Info: I/O bank number 4 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  48 pins available
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Fitter placement operations ending: elapsed time is 00:00:00
Info: Estimated most critical path is register to register delay of 4.615 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X4_Y3; Fanout = 7; REG Node = 'second_pulse_latch:inst|second_pulse_out[4]'
    Info: 2: + IC(1.465 ns) + CELL(0.575 ns) = 2.040 ns; Loc. = LAB_X2_Y4; Fanout = 2; COMB Node = 'second_pulse_latch:inst|Add1~369COUT1'
    Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 2.120 ns; Loc. = LAB_X2_Y4; Fanout = 2; COMB Node = 'second_pulse_latch:inst|Add1~367COUT1'
    Info: 4: + IC(0.000 ns) + CELL(0.080 ns) = 2.200 ns; Loc. = LAB_X2_Y4; Fanout = 2; COMB Node = 'second_pulse_latch:inst|Add1~365COUT1'
    Info: 5: + IC(0.000 ns) + CELL(0.608 ns) = 2.808 ns; Loc. = LAB_X2_Y4; Fanout = 1; COMB Node = 'second_pulse_latch:inst|Add1~362'
    Info: 6: + IC(1.069 ns) + CELL(0.738 ns) = 4.615 ns; Loc. = LAB_X4_Y3; Fanout = 5; REG Node = 'second_pulse_latch:inst|second_pulse_out[7]'
    Info: Total cell delay = 2.081 ns ( 45.09 % )
    Info: Total interconnect delay = 2.534 ns ( 54.91 % )
Info: Fitter routing operations beginning
Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 2%
    Info: The peak interconnect region extends from location X0_Y0 to location X11_Y10
Info: Fitter routing operations ending: elapsed time is 00:00:00
Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time.
    Info: Optimizations that may affect the design's routability were skipped
    Info: Optimizations that may affect the design's timing were skipped
Info: Completed Fixed Delay Chain Operation
Info: Started post-fitting delay annotation
Info: Delay annotation completed successfully
Info: Completed Auto Delay Chain Operation
Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'.
Info: Quartus II Fitter was successful. 0 errors, 2 warnings
    Info: Allocated 169 megabytes of memory during processing
    Info: Processing ended: Sun Mar 16 22:55:45 2008
    Info: Elapsed time: 00:00:05