📄 zxb.tan.qmsg
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{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "Clk_1Hz register second_pulse_latch:inst\|second_pulse_out\[5\] register second_pulse_latch:inst\|second_pulse_out\[9\] 197.63 MHz 5.06 ns Internal " "Info: Clock \"Clk_1Hz\" has Internal fmax of 197.63 MHz between source register \"second_pulse_latch:inst\|second_pulse_out\[5\]\" and destination register \"second_pulse_latch:inst\|second_pulse_out\[9\]\" (period= 5.06 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.799 ns + Longest register register " "Info: + Longest register to register delay is 4.799 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns second_pulse_latch:inst\|second_pulse_out\[5\] 1 REG LC_X4_Y3_N7 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X4_Y3_N7; Fanout = 7; REG Node = 'second_pulse_latch:inst\|second_pulse_out\[5\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { second_pulse_latch:inst|second_pulse_out[5] } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.589 ns) + CELL(0.575 ns) 2.164 ns second_pulse_latch:inst\|Add1~367COUT1 2 COMB LC_X2_Y4_N7 2 " "Info: 2: + IC(1.589 ns) + CELL(0.575 ns) = 2.164 ns; Loc. = LC_X2_Y4_N7; Fanout = 2; COMB Node = 'second_pulse_latch:inst\|Add1~367COUT1'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.164 ns" { second_pulse_latch:inst|second_pulse_out[5] second_pulse_latch:inst|Add1~367COUT1 } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 45 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 2.244 ns second_pulse_latch:inst\|Add1~365COUT1 3 COMB LC_X2_Y4_N8 2 " "Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 2.244 ns; Loc. = LC_X2_Y4_N8; Fanout = 2; COMB Node = 'second_pulse_latch:inst\|Add1~365COUT1'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { second_pulse_latch:inst|Add1~367COUT1 second_pulse_latch:inst|Add1~365COUT1 } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 45 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.258 ns) 2.502 ns second_pulse_latch:inst\|Add1~363 4 COMB LC_X2_Y4_N9 6 " "Info: 4: + IC(0.000 ns) + CELL(0.258 ns) = 2.502 ns; Loc. = LC_X2_Y4_N9; Fanout = 6; COMB Node = 'second_pulse_latch:inst\|Add1~363'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "0.258 ns" { second_pulse_latch:inst|Add1~365COUT1 second_pulse_latch:inst|Add1~363 } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 45 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.679 ns) 3.181 ns second_pulse_latch:inst\|Add1~358 5 COMB LC_X2_Y3_N1 1 " "Info: 5: + IC(0.000 ns) + CELL(0.679 ns) = 3.181 ns; Loc. = LC_X2_Y3_N1; Fanout = 1; COMB Node = 'second_pulse_latch:inst\|Add1~358'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "0.679 ns" { second_pulse_latch:inst|Add1~363 second_pulse_latch:inst|Add1~358 } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 45 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.140 ns) + CELL(0.478 ns) 4.799 ns second_pulse_latch:inst\|second_pulse_out\[9\] 6 REG LC_X4_Y3_N4 7 " "Info: 6: + IC(1.140 ns) + CELL(0.478 ns) = 4.799 ns; Loc. = LC_X4_Y3_N4; Fanout = 7; REG Node = 'second_pulse_latch:inst\|second_pulse_out\[9\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "1.618 ns" { second_pulse_latch:inst|Add1~358 second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.070 ns ( 43.13 % ) " "Info: Total cell delay = 2.070 ns ( 43.13 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.729 ns ( 56.87 % ) " "Info: Total interconnect delay = 2.729 ns ( 56.87 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "4.799 ns" { second_pulse_latch:inst|second_pulse_out[5] second_pulse_latch:inst|Add1~367COUT1 second_pulse_latch:inst|Add1~365COUT1 second_pulse_latch:inst|Add1~363 second_pulse_latch:inst|Add1~358 second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "4.799 ns" { second_pulse_latch:inst|second_pulse_out[5] second_pulse_latch:inst|Add1~367COUT1 second_pulse_latch:inst|Add1~365COUT1 second_pulse_latch:inst|Add1~363 second_pulse_latch:inst|Add1~358 second_pulse_latch:inst|second_pulse_out[9] } { 0.000ns 1.589ns 0.000ns 0.000ns 0.000ns 1.140ns } { 0.000ns 0.575ns 0.080ns 0.258ns 0.679ns 0.478ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clk_1Hz destination 2.902 ns + Shortest register " "Info: + Shortest clock path from clock \"Clk_1Hz\" to destination register is 2.902 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clk_1Hz 1 CLK PIN_29 16 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 16; CLK Node = 'Clk_1Hz'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { Clk_1Hz } "NODE_NAME" } } { "zxb.bdf" "" { Schematic "E:/TEST/TEXT12/zxb.bdf" { { 160 184 352 176 "Clk_1Hz" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.722 ns) + CELL(0.711 ns) 2.902 ns second_pulse_latch:inst\|second_pulse_out\[9\] 2 REG LC_X4_Y3_N4 7 " "Info: 2: + IC(0.722 ns) + CELL(0.711 ns) = 2.902 ns; Loc. = LC_X4_Y3_N4; Fanout = 7; REG Node = 'second_pulse_latch:inst\|second_pulse_out\[9\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "1.433 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 75.12 % ) " "Info: Total cell delay = 2.180 ns ( 75.12 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.722 ns ( 24.88 % ) " "Info: Total interconnect delay = 0.722 ns ( 24.88 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[9] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clk_1Hz source 2.902 ns - Longest register " "Info: - Longest clock path from clock \"Clk_1Hz\" to source register is 2.902 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clk_1Hz 1 CLK PIN_29 16 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 16; CLK Node = 'Clk_1Hz'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { Clk_1Hz } "NODE_NAME" } } { "zxb.bdf" "" { Schematic "E:/TEST/TEXT12/zxb.bdf" { { 160 184 352 176 "Clk_1Hz" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.722 ns) + CELL(0.711 ns) 2.902 ns second_pulse_latch:inst\|second_pulse_out\[5\] 2 REG LC_X4_Y3_N7 7 " "Info: 2: + IC(0.722 ns) + CELL(0.711 ns) = 2.902 ns; Loc. = LC_X4_Y3_N7; Fanout = 7; REG Node = 'second_pulse_latch:inst\|second_pulse_out\[5\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "1.433 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[5] } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 75.12 % ) " "Info: Total cell delay = 2.180 ns ( 75.12 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.722 ns ( 24.88 % ) " "Info: Total interconnect delay = 0.722 ns ( 24.88 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[5] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[5] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[9] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[5] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[5] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" { } { { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" { } { { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "4.799 ns" { second_pulse_latch:inst|second_pulse_out[5] second_pulse_latch:inst|Add1~367COUT1 second_pulse_latch:inst|Add1~365COUT1 second_pulse_latch:inst|Add1~363 second_pulse_latch:inst|Add1~358 second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "4.799 ns" { second_pulse_latch:inst|second_pulse_out[5] second_pulse_latch:inst|Add1~367COUT1 second_pulse_latch:inst|Add1~365COUT1 second_pulse_latch:inst|Add1~363 second_pulse_latch:inst|Add1~358 second_pulse_latch:inst|second_pulse_out[9] } { 0.000ns 1.589ns 0.000ns 0.000ns 0.000ns 1.140ns } { 0.000ns 0.575ns 0.080ns 0.258ns 0.679ns 0.478ns } "" } } { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[9] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[5] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[5] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_TSU_RESULT" "second_pulse_latch:inst\|second_pulse_out\[9\] acceleration\[3\] Clk_1Hz 9.130 ns register " "Info: tsu for register \"second_pulse_latch:inst\|second_pulse_out\[9\]\" (data pin = \"acceleration\[3\]\", clock pin = \"Clk_1Hz\") is 9.130 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "11.995 ns + Longest pin register " "Info: + Longest pin to register delay is 11.995 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.475 ns) 1.475 ns acceleration\[3\] 1 PIN PIN_237 6 " "Info: 1: + IC(0.000 ns) + CELL(1.475 ns) = 1.475 ns; Loc. = PIN_237; Fanout = 6; PIN Node = 'acceleration\[3\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { acceleration[3] } "NODE_NAME" } } { "zxb.bdf" "" { Schematic "E:/TEST/TEXT12/zxb.bdf" { { 192 176 352 208 "acceleration\[15..0\]" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(7.293 ns) + CELL(0.432 ns) 9.200 ns second_pulse_latch:inst\|Add1~371COUT1 2 COMB LC_X2_Y4_N5 2 " "Info: 2: + IC(7.293 ns) + CELL(0.432 ns) = 9.200 ns; Loc. = LC_X2_Y4_N5; Fanout = 2; COMB Node = 'second_pulse_latch:inst\|Add1~371COUT1'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "7.725 ns" { acceleration[3] second_pulse_latch:inst|Add1~371COUT1 } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 45 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 9.280 ns second_pulse_latch:inst\|Add1~369COUT1 3 COMB LC_X2_Y4_N6 2 " "Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 9.280 ns; Loc. = LC_X2_Y4_N6; Fanout = 2; COMB Node = 'second_pulse_latch:inst\|Add1~369COUT1'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { second_pulse_latch:inst|Add1~371COUT1 second_pulse_latch:inst|Add1~369COUT1 } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 45 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 9.360 ns second_pulse_latch:inst\|Add1~367COUT1 4 COMB LC_X2_Y4_N7 2 " "Info: 4: + IC(0.000 ns) + CELL(0.080 ns) = 9.360 ns; Loc. = LC_X2_Y4_N7; Fanout = 2; COMB Node = 'second_pulse_latch:inst\|Add1~367COUT1'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { second_pulse_latch:inst|Add1~369COUT1 second_pulse_latch:inst|Add1~367COUT1 } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 45 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 9.440 ns second_pulse_latch:inst\|Add1~365COUT1 5 COMB LC_X2_Y4_N8 2 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 9.440 ns; Loc. = LC_X2_Y4_N8; Fanout = 2; COMB Node = 'second_pulse_latch:inst\|Add1~365COUT1'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { second_pulse_latch:inst|Add1~367COUT1 second_pulse_latch:inst|Add1~365COUT1 } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 45 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.258 ns) 9.698 ns second_pulse_latch:inst\|Add1~363 6 COMB LC_X2_Y4_N9 6 " "Info: 6: + IC(0.000 ns) + CELL(0.258 ns) = 9.698 ns; Loc. = LC_X2_Y4_N9; Fanout = 6; COMB Node = 'second_pulse_latch:inst\|Add1~363'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "0.258 ns" { second_pulse_latch:inst|Add1~365COUT1 second_pulse_latch:inst|Add1~363 } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 45 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.679 ns) 10.377 ns second_pulse_latch:inst\|Add1~358 7 COMB LC_X2_Y3_N1 1 " "Info: 7: + IC(0.000 ns) + CELL(0.679 ns) = 10.377 ns; Loc. = LC_X2_Y3_N1; Fanout = 1; COMB Node = 'second_pulse_latch:inst\|Add1~358'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "0.679 ns" { second_pulse_latch:inst|Add1~363 second_pulse_latch:inst|Add1~358 } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 45 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.140 ns) + CELL(0.478 ns) 11.995 ns second_pulse_latch:inst\|second_pulse_out\[9\] 8 REG LC_X4_Y3_N4 7 " "Info: 8: + IC(1.140 ns) + CELL(0.478 ns) = 11.995 ns; Loc. = LC_X4_Y3_N4; Fanout = 7; REG Node = 'second_pulse_latch:inst\|second_pulse_out\[9\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "1.618 ns" { second_pulse_latch:inst|Add1~358 second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.562 ns ( 29.70 % ) " "Info: Total cell delay = 3.562 ns ( 29.70 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.433 ns ( 70.30 % ) " "Info: Total interconnect delay = 8.433 ns ( 70.30 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "11.995 ns" { acceleration[3] second_pulse_latch:inst|Add1~371COUT1 second_pulse_latch:inst|Add1~369COUT1 second_pulse_latch:inst|Add1~367COUT1 second_pulse_latch:inst|Add1~365COUT1 second_pulse_latch:inst|Add1~363 second_pulse_latch:inst|Add1~358 second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "11.995 ns" { acceleration[3] acceleration[3]~out0 second_pulse_latch:inst|Add1~371COUT1 second_pulse_latch:inst|Add1~369COUT1 second_pulse_latch:inst|Add1~367COUT1 second_pulse_latch:inst|Add1~365COUT1 second_pulse_latch:inst|Add1~363 second_pulse_latch:inst|Add1~358 second_pulse_latch:inst|second_pulse_out[9] } { 0.000ns 0.000ns 7.293ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.140ns } { 0.000ns 1.475ns 0.432ns 0.080ns 0.080ns 0.080ns 0.258ns 0.679ns 0.478ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" { } { { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clk_1Hz destination 2.902 ns - Shortest register " "Info: - Shortest clock path from clock \"Clk_1Hz\" to destination register is 2.902 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clk_1Hz 1 CLK PIN_29 16 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 16; CLK Node = 'Clk_1Hz'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { Clk_1Hz } "NODE_NAME" } } { "zxb.bdf" "" { Schematic "E:/TEST/TEXT12/zxb.bdf" { { 160 184 352 176 "Clk_1Hz" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.722 ns) + CELL(0.711 ns) 2.902 ns second_pulse_latch:inst\|second_pulse_out\[9\] 2 REG LC_X4_Y3_N4 7 " "Info: 2: + IC(0.722 ns) + CELL(0.711 ns) = 2.902 ns; Loc. = LC_X4_Y3_N4; Fanout = 7; REG Node = 'second_pulse_latch:inst\|second_pulse_out\[9\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "1.433 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 75.12 % ) " "Info: Total cell delay = 2.180 ns ( 75.12 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.722 ns ( 24.88 % ) " "Info: Total interconnect delay = 0.722 ns ( 24.88 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[9] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "11.995 ns" { acceleration[3] second_pulse_latch:inst|Add1~371COUT1 second_pulse_latch:inst|Add1~369COUT1 second_pulse_latch:inst|Add1~367COUT1 second_pulse_latch:inst|Add1~365COUT1 second_pulse_latch:inst|Add1~363 second_pulse_latch:inst|Add1~358 second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "11.995 ns" { acceleration[3] acceleration[3]~out0 second_pulse_latch:inst|Add1~371COUT1 second_pulse_latch:inst|Add1~369COUT1 second_pulse_latch:inst|Add1~367COUT1 second_pulse_latch:inst|Add1~365COUT1 second_pulse_latch:inst|Add1~363 second_pulse_latch:inst|Add1~358 second_pulse_latch:inst|second_pulse_out[9] } { 0.000ns 0.000ns 7.293ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.140ns } { 0.000ns 1.475ns 0.432ns 0.080ns 0.080ns 0.080ns 0.258ns 0.679ns 0.478ns } "" } } { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[9] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[9] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "Clk_1Hz second_pulse_out\[1\] second_pulse_latch:inst\|second_pulse_out\[1\] 7.367 ns register " "Info: tco from clock \"Clk_1Hz\" to destination pin \"second_pulse_out\[1\]\" through register \"second_pulse_latch:inst\|second_pulse_out\[1\]\" is 7.367 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clk_1Hz source 2.902 ns + Longest register " "Info: + Longest clock path from clock \"Clk_1Hz\" to source register is 2.902 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clk_1Hz 1 CLK PIN_29 16 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 16; CLK Node = 'Clk_1Hz'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { Clk_1Hz } "NODE_NAME" } } { "zxb.bdf" "" { Schematic "E:/TEST/TEXT12/zxb.bdf" { { 160 184 352 176 "Clk_1Hz" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.722 ns) + CELL(0.711 ns) 2.902 ns second_pulse_latch:inst\|second_pulse_out\[1\] 2 REG LC_X3_Y4_N1 7 " "Info: 2: + IC(0.722 ns) + CELL(0.711 ns) = 2.902 ns; Loc. = LC_X3_Y4_N1; Fanout = 7; REG Node = 'second_pulse_latch:inst\|second_pulse_out\[1\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "1.433 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[1] } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 75.12 % ) " "Info: Total cell delay = 2.180 ns ( 75.12 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.722 ns ( 24.88 % ) " "Info: Total interconnect delay = 0.722 ns ( 24.88 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[1] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[1] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" { } { { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.241 ns + Longest register pin " "Info: + Longest register to pin delay is 4.241 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns second_pulse_latch:inst\|second_pulse_out\[1\] 1 REG LC_X3_Y4_N1 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X3_Y4_N1; Fanout = 7; REG Node = 'second_pulse_latch:inst\|second_pulse_out\[1\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { second_pulse_latch:inst|second_pulse_out[1] } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.133 ns) + CELL(2.108 ns) 4.241 ns second_pulse_out\[1\] 2 PIN PIN_76 0 " "Info: 2: + IC(2.133 ns) + CELL(2.108 ns) = 4.241 ns; Loc. = PIN_76; Fanout = 0; PIN Node = 'second_pulse_out\[1\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "4.241 ns" { second_pulse_latch:inst|second_pulse_out[1] second_pulse_out[1] } "NODE_NAME" } } { "zxb.bdf" "" { Schematic "E:/TEST/TEXT12/zxb.bdf" { { 144 720 935 160 "second_pulse_out\[15..0\]" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.108 ns ( 49.71 % ) " "Info: Total cell delay = 2.108 ns ( 49.71 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.133 ns ( 50.29 % ) " "Info: Total interconnect delay = 2.133 ns ( 50.29 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "4.241 ns" { second_pulse_latch:inst|second_pulse_out[1] second_pulse_out[1] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "4.241 ns" { second_pulse_latch:inst|second_pulse_out[1] second_pulse_out[1] } { 0.000ns 2.133ns } { 0.000ns 2.108ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[1] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[1] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "4.241 ns" { second_pulse_latch:inst|second_pulse_out[1] second_pulse_out[1] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "4.241 ns" { second_pulse_latch:inst|second_pulse_out[1] second_pulse_out[1] } { 0.000ns 2.133ns } { 0.000ns 2.108ns } "" } } } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "ITDB_TH_RESULT" "second_pulse_latch:inst\|second_pulse_out\[13\] acceleration\[13\] Clk_1Hz -3.935 ns register " "Info: th for register \"second_pulse_latch:inst\|second_pulse_out\[13\]\" (data pin = \"acceleration\[13\]\", clock pin = \"Clk_1Hz\") is -3.935 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clk_1Hz destination 2.902 ns + Longest register " "Info: + Longest clock path from clock \"Clk_1Hz\" to destination register is 2.902 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clk_1Hz 1 CLK PIN_29 16 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 16; CLK Node = 'Clk_1Hz'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { Clk_1Hz } "NODE_NAME" } } { "zxb.bdf" "" { Schematic "E:/TEST/TEXT12/zxb.bdf" { { 160 184 352 176 "Clk_1Hz" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.722 ns) + CELL(0.711 ns) 2.902 ns second_pulse_latch:inst\|second_pulse_out\[13\] 2 REG LC_X2_Y3_N8 7 " "Info: 2: + IC(0.722 ns) + CELL(0.711 ns) = 2.902 ns; Loc. = LC_X2_Y3_N8; Fanout = 7; REG Node = 'second_pulse_latch:inst\|second_pulse_out\[13\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "1.433 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[13] } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 75.12 % ) " "Info: Total cell delay = 2.180 ns ( 75.12 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.722 ns ( 24.88 % ) " "Info: Total interconnect delay = 0.722 ns ( 24.88 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[13] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[13] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TH_DELAY" "0.015 ns + " "Info: + Micro hold delay of destination is 0.015 ns" { } { { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.852 ns - Shortest pin register " "Info: - Shortest pin to register delay is 6.852 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns acceleration\[13\] 1 PIN PIN_152 6 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 6; PIN Node = 'acceleration\[13\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { acceleration[13] } "NODE_NAME" } } { "zxb.bdf" "" { Schematic "E:/TEST/TEXT12/zxb.bdf" { { 192 176 352 208 "acceleration\[15..0\]" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.069 ns) + CELL(0.590 ns) 6.128 ns second_pulse_latch:inst\|Add1~350 2 COMB LC_X2_Y3_N5 1 " "Info: 2: + IC(4.069 ns) + CELL(0.590 ns) = 6.128 ns; Loc. = LC_X2_Y3_N5; Fanout = 1; COMB Node = 'second_pulse_latch:inst\|Add1~350'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "4.659 ns" { acceleration[13] second_pulse_latch:inst|Add1~350 } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 45 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.415 ns) + CELL(0.309 ns) 6.852 ns second_pulse_latch:inst\|second_pulse_out\[13\] 3 REG LC_X2_Y3_N8 7 " "Info: 3: + IC(0.415 ns) + CELL(0.309 ns) = 6.852 ns; Loc. = LC_X2_Y3_N8; Fanout = 7; REG Node = 'second_pulse_latch:inst\|second_pulse_out\[13\]'" { } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "0.724 ns" { second_pulse_latch:inst|Add1~350 second_pulse_latch:inst|second_pulse_out[13] } "NODE_NAME" } } { "zxb.v" "" { Text "E:/TEST/TEXT12/zxb.v" 25 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.368 ns ( 34.56 % ) " "Info: Total cell delay = 2.368 ns ( 34.56 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.484 ns ( 65.44 % ) " "Info: Total interconnect delay = 4.484 ns ( 65.44 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "6.852 ns" { acceleration[13] second_pulse_latch:inst|Add1~350 second_pulse_latch:inst|second_pulse_out[13] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "6.852 ns" { acceleration[13] acceleration[13]~out0 second_pulse_latch:inst|Add1~350 second_pulse_latch:inst|second_pulse_out[13] } { 0.000ns 0.000ns 4.069ns 0.415ns } { 0.000ns 1.469ns 0.590ns 0.309ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} } { { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "2.902 ns" { Clk_1Hz second_pulse_latch:inst|second_pulse_out[13] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "2.902 ns" { Clk_1Hz Clk_1Hz~out0 second_pulse_latch:inst|second_pulse_out[13] } { 0.000ns 0.000ns 0.722ns } { 0.000ns 1.469ns 0.711ns } "" } } { "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/programs/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "6.852 ns" { acceleration[13] second_pulse_latch:inst|Add1~350 second_pulse_latch:inst|second_pulse_out[13] } "NODE_NAME" } } { "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/programs/altera/70/quartus/bin/Technology_Viewer.qrui" "6.852 ns" { acceleration[13] acceleration[13]~out0 second_pulse_latch:inst|Add1~350 second_pulse_latch:inst|second_pulse_out[13] } { 0.000ns 0.000ns 4.069ns 0.415ns } { 0.000ns 1.469ns 0.590ns 0.309ns } "" } } } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
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