plx9656head.h

这是一个驱动程序的案例

// Interrupt Control/Status
#define PLX9656_INTCSR					ULONG(0x0068)
#define PLX9656_INTCSR_ELBTL			ULONG(1 << 0)
#define PLX9656_INTCSR_ELBTLP			ULONG(1 << 1)
#define PLX9656_INTCSR_GSI				ULONG(1 << 2)
#define PLX9656_INTCSR_MIE				ULONG(1 << 3)
#define PLX9656_INTCSR_PMIE				ULONG(1 << 4)
#define PLX9656_INTCSR_PMI				ULONG(1 << 5)
#define PLX9656_INTCSR_DMWDSRPE			ULONG(1 << 6)
#define PLX9656_INTCSR_DMWDSRP			ULONG(1 << 7)
#define PLX9656_INTCSR_IE				ULONG(1 << 8)
#define PLX9656_INTCSR_DIE				ULONG(1 << 9)
#define PLX9656_INTCSR_AIE				ULONG(1 << 10)
#define PLX9656_INTCSR_LIIE				ULONG(1 << 11)
#define PLX9656_INTCSR_RAE				ULONG(1 << 12)
#define PLX9656_INTCSR_DIA				ULONG(1 << 13)
#define PLX9656_INTCSR_AIA				ULONG(1 << 14)
#define PLX9656_INTCSR_LIIA				ULONG(1 << 15)
#define PLX9656_INTCSR_LIOE				ULONG(1 << 16)
#define PLX9656_INTCSR_LDIE				ULONG(1 << 17)
#define PLX9656_INTCSR_DMA0IE			ULONG(1 << 18)
#define PLX9656_INTCSR_DMA1IE			ULONG(1 << 19)
#define PLX9656_INTCSR_LDIA				ULONG(1 << 20)
#define PLX9656_INTCSR_DMA0IA			ULONG(1 << 21)
#define PLX9656_INTCSR_DMA1IA			ULONG(1 << 22)
#define PLX9656_INTCSR_BISTIA			ULONG(1 << 23)
#define PLX9656_INTCSR_DMBM				ULONG(1 << 24)
#define PLX9656_INTCSR_DMA0BM			ULONG(1 << 25)
#define PLX9656_INTCSR_DMA1BM			ULONG(1 << 26)
#define PLX9656_INTCSR_TA256			ULONG(1 << 27)				
#define PLX9656_INTCSR_MBOX0			ULONG(1 << 28)
#define PLX9656_INTCSR_MBOX1			ULONG(1 << 29)
#define PLX9656_INTCSR_MBOX2			ULONG(1 << 30)
#define PLX9656_INTCSR_MBOX3			ULONG(1 << 31)


// DMA Channel 0 Mode
#define PLX9656_DMAMODE0				ULONG(0x0080)
#define PLX9656_DMAMODE0_LBW			ULONG(3 << 0)
#define PLX9656_DMAMODE0_IWS			ULONG(0xF << 2)
#define PLX9656_DMAMODE0_TARIE			ULONG(1 << 6)
#define PLX9656_DMAMODE0_BIE			ULONG(1 << 7)
#define PLX9656_DMAMODE0_LBE			ULONG(1 << 8)
#define PLX9656_DMAMODE0_SGM			ULONG(1 << 9)
#define PLX9656_DMAMODE0_DIE			ULONG(1 << 10)
#define PLX9656_DMAMODE0_LAM			ULONG(1 << 11)
#define PLX9656_DMAMODE0_DM				ULONG(1 << 12)
#define PLX9656_DMAMODE0_MWIM			ULONG(1 << 13)
#define PLX9656_DMAMODE0_EOTE			ULONG(1 << 14)
#define PLX9656_DMAMODE0_FSTMS			ULONG(1 << 15)
#define PLX9656_DMAMODE0_CCM			ULONG(1 << 16)
#define PLX9656_DMAMODE0_IS				ULONG(1 << 17)
#define PLX9656_DMAMODE0_DACCL			ULONG(1 << 18)
#define PLX9656_DMAMODE0_EOTEL			ULONG(1 << 19)
#define PLX9656_DMAMODE0_VME			ULONG(1 << 20)
#define PLX9656_DMAMODE0_VSC			ULONG(1 << 21)

// DMA Channel 0 PCI Address
#define PLX9656_DMAPADR0				ULONG(0x0084)

// DMA Channel 0 Local Address
#define PLX9656_DMALADR0				ULONG(0x0088)

// DMA Channel 0 Transfer Size
#define PLX9656_DMASIZ0					ULONG(0x008C)
#define PLX9656_DMASIZ0_S				ULONG(0x007FFFFF)
#define PLX9656_DMASIZ0_V				ULONG(1 << 31)

// DMA Channel 0 Descriptor Pointer
#define PLX9656_DMADPR0					ULONG(0x0090)
#define PLX9656_DMADPR0_DL				ULONG(1 << 0)//Descriptor Location
#define PLX9656_DMADPR0_EC				ULONG(1 << 1)//End of Descriptor Chain
#define PLX9656_DMADPR0_ITC				ULONG(1 << 2)
#define PLX9656_DMADPR0_DT				ULONG(1 << 3)//Direction of Transfer
#define PLX9656_DMADPR0_NDA				ULONG(0xFFFFFFF0)


#define	Plx9656BitSize32                ULONG(3 << 0)


// DMA Channel 0 PCI Dual Address Cycle Upper Address
#define PLX9656_DMADAC0					ULONG(0x00B4)

// DMA Channel 0 Command/Status
#define PLX9656_DMACSR0					ULONG(0x00A8)
#define PLX9656_DMACSR0_E				UCHAR(1 << 0)
#define PLX9656_DMACSR0_S				UCHAR(1 << 1)
#define PLX9656_DMACSR0_A				UCHAR(1 << 2)
#define PLX9656_DMACSR0_CI				UCHAR(1 << 3)
#define PLX9656_DMACSR0_D				UCHAR(1 << 4)

//千万不要修改下面_PLX9656_DESCRIPTOR的定义

typedef struct _PLX9656_DESCRIPTOR
{
	ULONG		PciAddrLow;
	ULONG		LocalAddr;
	ULONG		Size;
	ULONG		NextDescPtr;
	ULONG		PciAddrHigh;
	ULONG       Reserved1;
	ULONG       Reserved2;
	ULONG       Reserved3;
} PLX9656_DESCRIPTOR, *PPLX9656_DESCRIPTOR;

IO_ALLOCATION_ACTION AdapterControl (IN PDEVICE_OBJECT pDevObj,
				IN PIRP pIrp,IN PVOID MapRegisterBase,IN PVOID pContext);