📄 isrtramp.asm
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;;; Bounce DMA2 and DMA3 isr's to their C implementations after saving
;;; DSP/BIOS state
;; DSP/BIOS includes
.include c54.h54
.include gbl.h54
.include hwi.h54
.ref _firTxPrime, _firRxPrime
.global dma2isr, dma3isr
dma2isr:
HWI_enter C54_CNOTPRESERVED, 0ffffh
; cpl = 0
; dp = GBL_A_SYSPAGE
; We need to set cpl bit when going to C
ssbx cpl
nop ; cpl latency
nop ; cpl latency
nop ; cpl latency
call _firRxPrime
rsbx cpl ; HWI_exit precondition
nop ; cpl latency
nop ; cpl latency
nop ; cpl latency
ld #GBL_A_SYSPAGE, dp
HWI_exit C54_CNOTPRESERVED, 0ffffh
dma3isr:
HWI_enter C54_CNOTPRESERVED, 0ffffh
; cpl = 0
; dp = GBL_A_SYSPAGE
; We need to set cpl bit when going to C
ssbx cpl
nop ; cpl latency
nop ; cpl latency
nop ; cpl latency
call _firTxPrime
rsbx cpl ; HWI_exit precondition
nop ; cpl latency
nop ; cpl latency
nop ; cpl latency
ld #GBL_A_SYSPAGE, dp
HWI_exit C54_CNOTPRESERVED, 0ffffh
.end
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