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📄 bioslab.c

📁 SEED_TMS320vc5402dsk是在TI的TMS320VC5402DSK板基础上简化开发出来的
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/*
 *  Copyright 1999 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *  U.S. Patent Nos. 5,283,900  5,392,448
 */
/* "@(#) DSP/BIOS 3.84 02-09-00 (barracuda-d04)" */
/*
 *  ======== audio.c ========
 */

/* DSP/BIOS includes */
#include <std.h>
#include <pip.h>    
#include <swi.h>
#include <log.h>
#include <trc.h>

/* 5402 support library includes */
#include <type.h>
#include <board.h>
#include <codec.h>
#include <mcbsp54.h>
#include <dma54xx.h>
#include <intr.h>

/* DSPLIB include */
#include <dsplib.h>

/*******************************************/
/* DSP/BIOS objects defined in config tool */
/*******************************************/
extern far PIP_Obj firRxPip, firTxPip;
extern far LOG_Obj trace;           /* application printf() log */ 

#define FRAME_SIZE 256 /* size of each pipe frame */

/*****************************************************************************/
/* Global Variables                                                          */
/*****************************************************************************/

HANDLE hHandset;
unsigned int dmsefc, dmmcr, dmctr, src_addr, dst_addr;
unsigned int dmpre, dmsrcp, dmdstp, dmidx0, dmidx1, dmfri0, dmfri1, dmgsa, dmgda, dmgcr, dmgfr;

/* Create specific data section for coeffiecients */
#define NUM_COEFS 16
#pragma DATA_SECTION(coeffs,"coefficients");
/* Low  Pass Filter */ 
   int coeffs[NUM_COEFS]={-1299,-994,-182,1067,2567,4055,5249,5914,5914,5249,4055,2567,1067,-182,-994,-1299}; 
/* High Pass Filter */ 
/* int coeffs[NUM_COEFS]={-120,5245,-3421,2451,-11216,40,-24657,29610,29610,-24657,40,-11216,2451,-3421,5245,-120};  */
/* Band Pass Filter */ 
/* int coeffs[NUM_COEFS]={921,-2494,137,-3654,-2485,-2063,-9015,16165,16165,-9015,-2063,-2485,-3654,137,-2494,921};  */
/* Band Stop Filter */
/* int coeffs[NUM_COEFS]={491,165,-2159,772,-6697,10044,648,12297,12297,648,10044,-6697,772,-2159,165,491}; */ 
/* All  Pass Filter */
/* int coeffs[NUM_COEFS] ={32767,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};  */

/* Create specific data section for delay buffer  */
#pragma DATA_SECTION(delaybuff,"delay");
int delaybuff[NUM_COEFS]={0}; 
/* delayptr holds the address of the start of the delay buffer */
int *delayptr = &(delaybuff[0]); 

/* declare and initialize two variables for DMAC ISRs */
int frame=0; 
int flag=0;
int temp;

static Void fir_codec_init()
{
    /* Open Handset Codec */
    HANDLE hHandset = codec_open(HANDSET_CODEC); /* Acquire handle to codec */

    /* Set codec parameters */
    codec_dac_mode(hHandset, CODEC_DAC_15BIT);   /* DAC in 15-bit mode */
    codec_adc_mode(hHandset, CODEC_ADC_15BIT);   /* ADC in 15-bit mode */
    codec_ain_gain(hHandset, CODEC_AIN_6dB);     /* 6dB gain on input to ADC */
    codec_aout_gain(hHandset, CODEC_AOUT_MINUS_6dB); /* -6dB gain output */
    codec_sample_rate(hHandset,SR_16000);        /* 16KHz sampling rate */

    /*
     * The FREE bit must be set in SPCR2 so that RTDX
     * does not interfere;
     */
    *(unsigned *)SPSA_ADDR(HANDSET_CODEC) = SPCR2_SUBADDR;
    *(unsigned *)SPSD_ADDR(HANDSET_CODEC) |= 0x200;
    
}

static Void fir_dma_init()
{
    /* Reset all DMA channels */ 
    dma_reset_all();

    /* Initialize DMA channel 2. Transfers from McBSP 1 to a buffer */
    dmsefc = ((DSYNC_REVT1 <<12));
    dmmcr = ((DINM_ENABLE << 14)
	     | (IMOD_BLOCK <<13)
	     | (CTMOD_DEC <<12)
	     | (INDEXMODE_NOMOD << 8)
	     | (SPACE_DATA << 6)
	     | (INDEXMODE_INC << 2)
	     | (SPACE_DATA));
    dmctr = 0;
    src_addr = DRR1_ADDR(HANDSET_CODEC);
    dst_addr = 0;

    dma_init(DMA_CH2, dmsefc, dmmcr, dmctr,
	     SPACE_DATA, src_addr,
	     SPACE_DATA, dst_addr);

    /* Global autoinit registers not used */
    dmgsa = 0;
    dmgda = 0;
    dmgcr = 0;
    dmgfr = 0;
    
    /* Set up global priority and enable control register for Ch2 & 3*/
    dmpre = ((HIGH_PRIORITY << 11) | (HIGH_PRIORITY << 10) | (INTSEL_01 << 6));
    dmsrcp = SPACE_DATA;
    dmdstp = SPACE_DATA;
    dmidx0 = 0;
    dmidx1 = 0;
    dmfri0 = 0;
    dmfri1 = 0;

    dma_global_init(dmpre, dmsrcp, dmdstp, dmidx0, dmidx1,
		    dmfri0, dmfri1, dmgsa, dmgda, dmgcr, dmgfr);

    /* Initialize channel 3 */
    dmsefc = ((DSYNC_XEVT1 <<12));
    dmmcr = ((DINM_ENABLE << 14)
	     | (IMOD_BLOCK <<13)
	     | (CTMOD_DEC <<12)
	     | (INDEXMODE_INC << 8)
	     | (SPACE_DATA << 6)
	     | (INDEXMODE_NOMOD << 2)
	     | (SPACE_DATA));
    dmctr = 0;
    src_addr = 0;
    dst_addr = DXR1_ADDR(HANDSET_CODEC);

    dma_init(DMA_CH3, dmsefc, dmmcr, dmctr,
	     SPACE_DATA, src_addr,
	     SPACE_DATA, dst_addr);

    /*
     * The FREE bit must be set in DMPREC so that RTDX does not interfere.
     */
    DMPREC |= 0x8000;
    
}

static Void fir_start_codec(void)
{
    /* Clear IFR */
    INTR_CLR_FLAG(DMAC2);
    INTR_CLR_FLAG(DMAC3); 
      
    /* Enable DMAC2 and DMAC3 interrupts */
    INTR_ENABLE(DMAC2);
    INTR_ENABLE(DMAC3);

    /* prime the serial port to begin input buffer stream */
    temp = *(volatile u16*)DRR1_ADDR(HANDSET_CODEC);
}

/* definitions in regs54xx.h do not match data book, redefining here */
#define DMSA *(volatile unsigned *)0x55
#define DMSDI *(volatile unsigned *)0x56
#define DMSDN *(volatile unsigned *)0x57

#define DMA2_SUBADDR 0xa
#define DMA3_SUBADDR 0xf

#define DMA3COMPLETE ((DMPREC & 8) == 0)
#define DMA2COMPLETE ((DMPREC & 4) == 0)

/* Set the DMA2 dest address. Assumes DMA2 is disabled (has completed
   previous block). */
#define fir_set_recv_buffer(addr, size) \
{ \\
    DMSA = 0x0a + DMSRC_ADDR; \\
    DMSDN = addr; \\
    DMSA = 0x0a + DMCTR_ADDR; \\
    DMSDN = size; \\
    DMA_ENABLE(DMA_CH2); \\
}

/* Set the DMA3 dest address. Assumes DMA3 is disabled (has completed
   previous block). */
#define fir_set_xmit_buffer(addr, size) \\
{ \\
    DMSA = 0x10 + DMSRC_ADDR; \\
    DMSDN = addr; \\
    DMSA = 0x10 + DMCTR_ADDR; \\
    DMSDN = size; \\
    DMA_ENABLE(DMA_CH3); \\
}

void firRxPrime(void)
{
    PIP_Obj    *rxPipe = &firRxPip;
    static Int nested = 0;
    static Int primed = 0;

    if (nested) {       /* ignore recursive call via PIP_alloc() */
        return;
    }

    nested = 1;

    if (DMA2COMPLETE) {

	if (primed) {
	    PIP_put(rxPipe);
	    primed = 0;
	}

	if (PIP_getWriterNumFrames(rxPipe) > 0) {
	    PIP_alloc(rxPipe);
	    //	fir_set_recv_buffer(PIP_getWriterAddr(rxPipe),
	    //	    PIP_getWriterSize(rxPipe))
	    DMSA = DMA2_SUBADDR + DMDST_SUBADDR; 
	    DMSDN = (unsigned)PIP_getWriterAddr(rxPipe); 
	    DMSA = DMA2_SUBADDR + DMCTR_SUBADDR; 
	    DMSDN = PIP_getWriterSize(rxPipe);
	    DMA_ENABLE(DMA_CH2);

	    primed = 1;
	}
    }

    nested = 0;
}

void firTxPrime(void)
{
    PIP_Obj  *txPipe = &firTxPip;
    static Int nested = 0;
    static int primed = 0;
    int wasPrimed = primed;

    if (nested) {       /* prohibit recursive call via PIP_get() */
        return;
    }

    nested = 1;

    if (DMA3COMPLETE) {

	if (primed) {
	    PIP_free(txPipe);
	    primed = 0;
	}
	
	if (PIP_getReaderNumFrames(txPipe) > 0) {

	    PIP_get(txPipe);

	    DMSA = DMA3_SUBADDR + DMSRC_SUBADDR; 
	    DMSDN = (unsigned)PIP_getReaderAddr(txPipe);
	    DMSA = DMA3_SUBADDR + DMCTR_SUBADDR; 
	    DMSDN = PIP_getReaderSize(txPipe);
	    DMA_ENABLE(DMA_CH3);

	    if (!wasPrimed) {
		/* We dropped a sample or this is the first time
		   through. Either way we need to prime the serial port
		   to generate a XEVT. */
		*(unsigned *)DXR1_ADDR(HANDSET_CODEC) = 0;
	    }
	    primed = 1;
	}
    }

    nested = 0;
}


/*
 *  ======== main ========
 */
Void main()
{
    if (brd_init_bios()) {
		exit();
    }
    
    fir_codec_init();
    fir_dma_init();

    firRxPrime();

    fir_start_codec();
    
    LOG_printf(&trace, "FIR Lab started!!\n");    
    
    /* fall into BIOS idle loop */
    return;                 
}

/*
 * Sub-routine of blink. Toggles the state of led indicated by the argument. 
 * Valid values are 0, 1, and 2
 * */
Void toggleLed(int led)
{
    switch (led) {
       case 0 :
	   brd_led_toggle(BRD_LED0);
	   break;
       case 1 :
	   brd_led_toggle(BRD_LED1);
	   break;
       case 2 :
	   brd_led_toggle(BRD_LED2);
	   break;
    }
}

/*
 * Called from a DPS/BIOS PRD object to periodically blink the leds in
 * sequence.
 * */
Void blink(void)
{
    static int led = -1;

    if (led >= 0) {
		toggleLed(led); /* turn current led off */
    }
    
    led = (led + 1) % 3; 
    
    toggleLed(led); /* turn next led on */
}

Void firSwiFxn(void)
{
    if (PIP_getReaderNumFrames(&firRxPip) <= 0
	|| PIP_getWriterNumFrames(&firTxPip) <= 0) {
	LOG_printf(&trace, "firSwiFxn called in error");
	LOG_error("firSwiFxn called in error",0);
	SYS_abort();
    }

    PIP_get(&firRxPip);
    PIP_alloc(&firTxPip);
	    
    /* check DIP switch */
    if (port1 & 0x20)     {
	/* switch up, filter */
	
    LOG_printf(&trace, "FIR filter enabled\n"); 
    
	fir(PIP_getReaderAddr(&firRxPip), (DATA *)coeffs,
	    PIP_getWriterAddr(&firTxPip), (DATA **)&delayptr,
	    NUM_COEFS, FRAME_SIZE);
}


     else {

	/* switch down, loopback */
	int i;
	unsigned *src, *dst;
	
    LOG_printf(&trace, "Loopback enabled\n");
    
	src = PIP_getReaderAddr(&firRxPip);
	dst = PIP_getWriterAddr(&firTxPip);

	memcpy(dst, src, FRAME_SIZE); 
}

  
    PIP_free(&firRxPip);
    PIP_put(&firTxPip);
}

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