packetdriver.c

一个ARM7 芯片Bootload中几个重要的实用代码。比如DHCP

     		pLastFrameDescriptor = pFrameDescriptor;
     		pFrameDescriptor++;
    	}

    	// Make Frame descriptor to ring buffer type.
    	pFrameDescriptor--;
    	pFrameDescriptor->NextFrameDescriptor = (UINT32)pStartFrameDescriptor;
   	}
}



// Initialize Rx frame descriptor area-buffers.
void RxFDInitialize(INT num)
{
 	sFrameDescriptor 	*pFrameDescriptor;
 	sFrameDescriptor 	*pStartFrameDescriptor;
 	sFrameDescriptor 	*pLastFrameDescriptor = NULL;
 	UINT32 			i;

 	if (num == 0)
   	{
    	// Get Frame descriptor's base address.
    	RXDLSA_0 = (UINT32)RxFDBaseAddr0 | 0x80000000;
    	gCRxFDPtr[0] = RXDLSA_0;

    	// Generate linked list.
    	pFrameDescriptor = (sFrameDescriptor *) gCRxFDPtr[0];
    	pStartFrameDescriptor = pFrameDescriptor;

    	for (i = 0; i < MaxRxFrameDescriptors; i++)
    	{
     		if (pLastFrameDescriptor == NULL)
       			pLastFrameDescriptor = pFrameDescriptor;
     		else
       			pLastFrameDescriptor->NextFrameDescriptor = (UINT32)pFrameDescriptor;

     		pFrameDescriptor->Status1 = RXfOwnership_DMA;
     		pFrameDescriptor->FrameDataPtr = (UINT32)(NetBuf_Allocate());
     		pFrameDescriptor->Status2 = (UINT32)0x0;
     		pFrameDescriptor->NextFrameDescriptor = NULL;

     		pLastFrameDescriptor = pFrameDescriptor;
     		pFrameDescriptor++;
    	}

    	// Make Frame descriptor to ring buffer type.
    	pFrameDescriptor--;
    	pFrameDescriptor->NextFrameDescriptor = (UINT32)pStartFrameDescriptor;
   	}
 	else 
 	if (num == 1)
   	{
    	// Get Frame descriptor's base address.
    	RXDLSA_1 = (UINT32)RxFDBaseAddr1 | 0x80000000;
    	gCRxFDPtr[1] = RXDLSA_1;

    	// Generate linked list.
    	pFrameDescriptor = (sFrameDescriptor *) gCRxFDPtr[1];
    	pStartFrameDescriptor = pFrameDescriptor;

    	for (i = 0; i < MaxRxFrameDescriptors; i++)
    	{
     		if (pLastFrameDescriptor == NULL)
       			pLastFrameDescriptor = pFrameDescriptor;
     		else
       			pLastFrameDescriptor->NextFrameDescriptor = (UINT32)pFrameDescriptor;

     		pFrameDescriptor->Status1 = RXfOwnership_DMA;
     		pFrameDescriptor->FrameDataPtr = (UINT32)(NetBuf_Allocate());
     		pFrameDescriptor->Status2 = (UINT32)0x0;
     		pFrameDescriptor->NextFrameDescriptor = NULL;

     		pLastFrameDescriptor = pFrameDescriptor;
     		pFrameDescriptor++;
    	}

    	// Make Frame descriptor to ring buffer type.
    	pFrameDescriptor--;
    	pFrameDescriptor->NextFrameDescriptor = (UINT32)pStartFrameDescriptor;
   	}
}



// set Registers related with MAC.
void ReadyMac(INT num)
{
 	if (num == 0)
   	{
    	MIEN_0 = gMIEN ;
    	if( _rmii==1 )
    	{
	    	MCMDR_0 = gMCMDR | MCMDR_EnRMII;
	    }
	    else
	    {
	    	MCMDR_0 = gMCMDR ;
	    }
	    	
   	}
 	else 
 	if (num == 1)
   	{
    	MIEN_1 = gMIEN ;
    	if( _rmii==1 )
    	{
	    	MCMDR_1 = gMCMDR | MCMDR_EnRMII;
	    }
	    else
	    {
	    	MCMDR_1 = gMCMDR ;
	    }
   }
}



// MAC Transfer Start for interactive mode
void MacTxGo(INT num)
{
 	// Enable MAC Transfer
 	if (num == 0)
   	{
    	if (!(MCMDR_0&MCMDR_TXON))
      		MCMDR_0 |= MCMDR_TXON ;

    	if (TDU_Flag0==1)
      	{         
       		TDU_Flag0=0;
       		TSDR_0 = 0;  
      	}         
   	} 
 	else 
 	if (num == 1)
   	{
    	if (!(MCMDR_1&MCMDR_TXON))
      		MCMDR_1 |= MCMDR_TXON ;

    	if (TDU_Flag1==1)
      	{	         
       		TDU_Flag1=0;
       		TSDR_1 = 0;
      	}         
   	} 
}



// Initialize MAC Controller
void Mac_Initialize()
{
 	INT num;
 
 	num = MAC_NUM;	
 
 	if (num == 0)
   	{
		// Reset MAC   
		FIFOTHD_0|=SWR;
		
    	// MAC interrupt vector setup.
    	SysSetInterrupt(EMCTXINT0, MAC0_Tx_isr) ;
    	SysSetInterrupt(EMCRXINT0, MAC0_Rx_isr) ;

    	// Set the Tx and Rx Frame Descriptor
    	TxFDInitialize(num) ;
    	RxFDInitialize(num) ;

    	// Set the CAM Control register and the MAC address value
    	FillCamEntry(0, 0, gCam0M_0, gCam0L_0);
    	CAMCMR_0 = gCAMCMR ;

    	// Enable MAC Tx and Rx interrupt.
    	Enable_Int(EMCTXINT0);
    	Enable_Int(EMCRXINT0);

    	TDU_Flag0=0;

    	// Configure the MAC control registers.
    	ReadyMac(num) ;
   	}
 	else 
 	if (num == 1)
   	{
		// Reset MAC   
		FIFOTHD_1|=SWR;

    	// MAC interrupt vector setup.
    	SysSetInterrupt(EMCTXINT1, MAC1_Tx_isr) ;
    	SysSetInterrupt(EMCRXINT1, MAC1_Rx_isr) ;

    	// Set the Tx and Rx Frame Descriptor
    	TxFDInitialize(num) ;
    	RxFDInitialize(num) ;

    	// Set the CAM Control register and the MAC address value
    	FillCamEntry(1, 0, gCam0M_1, gCam0L_1);
    	CAMCMR_1 = gCAMCMR ;

    	// Enable MAC Tx and Rx interrupt.
    	Enable_Int(EMCTXINT1);
    	Enable_Int(EMCRXINT1);
    
    	TDU_Flag1=0;
    
    	// Configure the MAC control registers.
    	ReadyMac(num) ;
   	}

 	// Set PHY operation mode
 	ResetPhyChip(num) ;

 	// Set MAC address to CAM
 	SetMacAddr(num) ;

// 	uHALir_NewIRQ((PrHandler)IRQ_IntHandler, NULL);
// 	uHALir_EnableInt();
	{
		INT tmp;
		*((volatile UINT32 *)0x38)=(UINT32)IRQ_IntHandler;
		__asm
		{
			MRS	tmp, CPSR
			BIC	tmp, tmp, 0x80
			MSR	CPSR_c, tmp
		}
	}

}



void  Mac_ShutDown()
{
#if 1 //CMN
 	if (MAC_NUM == 0)
   		MCMDR_0 &= ~(MCMDR_RXON|MCMDR_TXON) ;
 	else 
 	if (MAC_NUM == 1)
   		MCMDR_1 &= ~(MCMDR_RXON|MCMDR_TXON) ;
#endif   
}       



// Send ethernet frame function
INT Mac_SendPacket(NETBUF *netbuf)
{
 	sFrameDescriptor *psTxFD;
 	UINT32         *pTXFDStatus1;

	netbuf->txNext = NULL;

	Mac_DisableInt();

 	if (MAC_NUM == 0)
   	{
    	// Get Tx frame descriptor & data pointer
    	psTxFD = (sFrameDescriptor *)gWTxFDPtr[0] ;

    	pTXFDStatus1 = (UINT32 *)&psTxFD->Status1;

		if (!TxReady0) // || (*pTXFDStatus1 & TXfOwnership_DMA))
		{
			//uprintf("\nTXFSM0=0x%08x\n", TXFSM_0);
			if (_TxQueue0 == NULL)
				_TxQueue0 = netbuf;
			else
			{			
				NETBUF	*ptr = _TxQueue0;
				
				while (ptr->txNext != NULL)
					ptr = ptr->txNext;
				ptr->txNext = netbuf;
			}
			Mac_EnableInt();
			return 1;
		}
		
		//uHALr_printf("Tx %x - %d\n", (INT)netbuf, netbuf->len);
		//HexDumpBuffer(netbuf->packet, netbuf->len);
    
    	psTxFD->FrameDataPtr=(UINT32)netbuf->packet;

    	// Set TX Frame flag & Length Field
    	//netbuf->len += 60;
    	psTxFD->Status2 = (UINT32)(netbuf->len & 0xffff);

    	// Cheange ownership to DMA
    	psTxFD->Status1 |= TXfOwnership_DMA;

    	TxReady0 = 0;

    	// Enable MAC Tx control register
    	MacTxGo(0);

    	// Change the Tx frame descriptor for next use
    	gWTxFDPtr[0] = (UINT32)(psTxFD->NextFrameDescriptor);
   	}
 	else 
 	if (MAC_NUM == 1)
   	{
    	// Get Tx frame descriptor & data pointer
    	psTxFD = (sFrameDescriptor *)gWTxFDPtr[1] ;

    	pTXFDStatus1 = (UINT32 *)&psTxFD->Status1;

		if (!TxReady1)  // || (*pTXFDStatus1 & TXfOwnership_DMA))
		{
//			uprintf("\nTXFSM1=0x%08x\n", TXFSM_1);
			if (_TxQueue1 == NULL)
				_TxQueue1 = netbuf;
			else
			{			
				NETBUF	*ptr = _TxQueue1;
				
				while (ptr->txNext != NULL)
					ptr = ptr->txNext;
				ptr->txNext = netbuf;
			}
			Mac_EnableInt();
			return 1;
		}

    	psTxFD->FrameDataPtr=(UINT32)netbuf->packet;

    	// Set TX Frame flag & Length Field
    	psTxFD->Status2 = (UINT32)(netbuf->len & 0xffff);

    	// Cheange ownership to DMA
    	psTxFD->Status1 |= TXfOwnership_DMA;

    	TxReady1 = 0;

    	// Enable MAC Tx control register
    	MacTxGo(1);

    	// Change the Tx frame descriptor for next use
    	gWTxFDPtr[1] = (UINT32)(psTxFD->NextFrameDescriptor);
   	}
   	Mac_EnableInt();
 	return 1 ;
}



// Interrupt Service Routine for MAC0 Tx
void MAC0_Tx_isr(void)
{   
 	sFrameDescriptor 	*pTxFDptr;
 	UINT32 			Status, RdValue;

 	//if (TxReady0 == 1) //CWS
   	//	return;

 	RdValue = MISTA_0;
 	MISTA_0 = RdValue&0xffff0000;

 	if (RdValue & MISTA_TDU)
   		TDU_Flag0 = 1;
 
 	if (RdValue & MISTA_TxBErr)
   	{
    	FIFOTHD_0|=SWR;
    	Mac_Initialize();
   	}
 	else
   	{
    	pTxFDptr = (sFrameDescriptor *) gCTxFDPtr[0];

    	Status = (pTxFDptr->Status2 >> 16) & 0xffff;
    	if (Status & TXFD_TXCP)
      	{
       		TxReady0 = 1;

       		if (Status & ( TXFD_TXABT | TXFD_DEF | TXFD_PAU | TXFD_EXDEF |
                      TXFD_NCS | TXFD_SQE | TXFD_LC | TXFD_TXHA) )
         		; //uHALr_printf("\nTx error, status:%x\n\n",Status) ;

       		// Clear Framedata pointer already used.
       		pTxFDptr->Status2 = (UINT32)0x0;

       		NetBuf_FreeIR((NETBUF *)pTxFDptr->FrameDataPtr);
       		gCTxFDPtr[0] = (UINT32)pTxFDptr->NextFrameDescriptor ;
       		
       		if (_TxQueue0 != NULL)
       		{
       			NETBUF	*netbuf = _TxQueue0;
       			
       			_TxQueue0 = _TxQueue0->txNext;
       			netbuf->txNext = NULL;
       			
       			Mac_SendPacket(netbuf);
       		}
      	}
   	}
}



// Interrupt Service Routine for MAC1 Tx
void MAC1_Tx_isr(void)
{   
 	sFrameDescriptor 	*pTxFDptr;
 	UINT32 			Status, RdValue;

 	//if (TxReady1 == 1) //CWS
   	//	return;

 	RdValue = MISTA_1;
 	MISTA_1 = RdValue&0xffff0000;

 	if (RdValue & MISTA_TDU)
   		TDU_Flag1 = 1;
 
 	if (RdValue & MISTA_TxBErr)
   	{
    	FIFOTHD_1|=SWR;
    	Mac_Initialize();
    	TxReady1 = 0;
   	}
 	else
   	{
    	pTxFDptr = (sFrameDescriptor *) gCTxFDPtr[1];

    	Status = (pTxFDptr->Status2 >> 16) & 0xffff;
    	if (Status & TXFD_TXCP)
      	{
       		TxReady1 = 1;

       		if (Status & ( TXFD_TXABT | TXFD_DEF | TXFD_PAU | TXFD_EXDEF |
                      TXFD_NCS | TXFD_SQE | TXFD_LC | TXFD_TXHA) )
         		; //uHALr_printf("Tx error, status:%x\n",Status) ;

       		// Clear Framedata pointer already used.
       		pTxFDptr->Status2 = (UINT32)0x0;

       		NetBuf_FreeIR((NETBUF *)pTxFDptr->FrameDataPtr);
       		gCTxFDPtr[1] = (UINT32)pTxFDptr->NextFrameDescriptor ;

       		if (_TxQueue1 != NULL)
       		{
       			NETBUF	*netbuf = _TxQueue1;
       			
       			_TxQueue1 = _TxQueue1->txNext;
       			netbuf->txNext = NULL;
       			
       			Mac_SendPacket(netbuf);
       		}
      	}
   	}
}



//#define MAC0_DEBUG
// Interrupt Service Routine for MAC0 Rx
void MAC0_Rx_isr(void)
{
 	sFrameDescriptor 	*pRxFDptr ;
 	UINT32 			RxStatus ;
 	UINT32 			CRxPtr;
 	UINT32 			RdValue;
 	NETBUF   			*netbuf;
#ifdef MAC0_DEBUG
 static UINT32 	i=0;
#endif 

 	RdValue = MISTA_0;
 	MISTA_0 = RdValue&0x0000ffff;
 
 	if (RdValue & MISTA_RxBErr)
   	{
    	FIFOTHD_0|=SWR;
    	Mac_Initialize();
   	} 
 	else
   	{
    	if (RdValue & (MISTA_CFR | MISTA_CRCE | MISTA_PTLE | MISTA_ALIE | MISTA_RP))
      		uprintf("Rx error, status:%x\n",RdValue) ;
    	else
    	{
     		// Get current frame descriptor
     		CRxPtr = CRXDSA_0 ;

     		do
     		{
      			// Get Rx Frame Descriptor
      			pRxFDptr = (sFrameDescriptor *)gCRxFDPtr[0];

      			if ((pRxFDptr->Status1|RXfOwnership_CPU)==RXfOwnership_CPU)
        		{
#ifdef MAC0_DEBUG
        			if( (i & 0xF)== 0x0 )
             			uprintf("\nMAC0 - %03d", pRxFDptr->Status1 & 0xffff);
          			else
          				uprintf(" %03d", pRxFDptr->Status1 & 0xffff);
          			i++;
#endif  
         			RxStatus = (pRxFDptr->Status1 >> 16) & 0xffff;

         			// If Rx frame is good, then process received frame
         			if (RxStatus & RXFD_RXGD)
         			{
         				if (PacketProcessor((UCHAR *)pRxFDptr->FrameDataPtr, pRxFDptr->Status1 & 0xffff) == 0)
         					;
          				else
          				if ((netbuf = NetBuf_AllocateIR()) == NULL)
            				; //uprintf("No free buffer\n");
          				else
          				{
           					if (_iqueue_last == NULL)
             				{
              					_iqueue_last = (NETBUF *)pRxFDptr->FrameDataPtr;
              					_iqueue_first = _iqueue_last;
             				}
           					else
             				{
              					_iqueue_last->next = (NETBUF *)pRxFDptr->FrameDataPtr;
              					_iqueue_last = _iqueue_last->next;
             				}
           					_iqueue_last->len = pRxFDptr->Status1 & 0xffff;
           					_iqueue_last->next = NULL;
          					//uHALr_printf("Rx - %d\n", _iqueue_last->len);
             
           					pRxFDptr->FrameDataPtr = (unsigned long)netbuf;
          				}
         			}
        		}
      			else
        			break;

      			// Change ownership to DMA for next use
      			pRxFDptr->Status1 = RXfOwnership_DMA;

      			// Get Next Frame Descriptor pointer to process
      			gCRxFDPtr[0] = (UINT32)(pRxFDptr->NextFrameDescriptor) ;
     		
     		} 	while (CRxPtr != gCRxFDPtr[0]);
    	}

    	if (RdValue & MISTA_RDU)
      		RSDR_0 = 0;
   	}
}



// Interrupt Service Routine for MAC1 Rx
void MAC1_Rx_isr(void)
{
 	sFrameDescriptor 	*pRxFDptr ;
 	UINT32 			RxStatus;
 	UINT32 			CRxPtr;
 	UINT32 			RdValue;
 	NETBUF   			*netbuf;

 	RdValue = MISTA_1;
 	MISTA_1 = RdValue & 0x0000ffff;
 
 	if (RdValue & MISTA_RxBErr)
   	{
    	FIFOTHD_1|=SWR;
    	Mac_Initialize();
   	} 
 	else
   	{
    	if (RdValue & (MISTA_CFR | MISTA_CRCE | MISTA_PTLE | MISTA_ALIE | MISTA_RP))
      		uprintf("Rx error, status:%x\n",RdValue) ;
    	else
    	{
     		// Get current frame descriptor
     		CRxPtr = CRXDSA_1 ;

     		do
     		{
      			// Get Rx Frame Descriptor
      			pRxFDptr = (sFrameDescriptor *)gCRxFDPtr[1];

      			if ((pRxFDptr->Status1|RXfOwnership_CPU)==RXfOwnership_CPU)
        		{
         			//uHALr_printf("MAC1 - %d\n", pRxFDptr->Status1 & 0xffff);
         			RxStatus = (pRxFDptr->Status1 >> 16) & 0xffff;

         			// If Rx frame is good, then process received frame
         			if (RxStatus & RXFD_RXGD)
         			{
         				if (PacketProcessor((UCHAR *)pRxFDptr->FrameDataPtr, pRxFDptr->Status1 & 0xffff) == 0)
         					;
         				else
          				if ((netbuf = NetBuf_AllocateIR()) == NULL)
            				; //uprintf("No free buffer\n");
          				else
          				{
           					if (_iqueue_last == NULL)
             				{
              					_iqueue_last = (NETBUF *)pRxFDptr->FrameDataPtr;
              					_iqueue_first = _iqueue_last;
             				}
           					else
             				{
              					_iqueue_last->next = (NETBUF *)pRxFDptr->FrameDataPtr;
              					_iqueue_last = _iqueue_last->next;
             				}
           						_iqueue_last->len = pRxFDptr->Status1 & 0xffff;
           						_iqueue_last->next = NULL;
             
           					pRxFDptr->FrameDataPtr = (unsigned long)netbuf;
          				}
         			}
        		}
      			else
        			break;

      			// Change ownership to DMA for next use
      			pRxFDptr->Status1 = RXfOwnership_DMA;

      			// Get Next Frame Descriptor pointer to process
      			gCRxFDPtr[1] = (UINT32)(pRxFDptr->NextFrameDescriptor) ;
     		
     		} 	while (CRxPtr != gCRxFDPtr[1]);
    	}

    	if (RdValue & MISTA_RDU)
      		RSDR_1 = 0;
   	}
}